LGS63040EP

@@ -0,0 +1,49 @@+# LGS63040EP++**Legend Si** · LED Drivers · ESOP-8++LGS63040EP from Legend Si, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | NC | unconnected | No external component required. Recommended to be grounded. |+| 2 | GND | power_in | Ground pin. Return for power switch and control circuitry. |+| 3 | SW | power_out | Internal power switch node (drain of the 350mΩ low-side NMOS, RDS(on) typ 350mΩ). Externally connected to power inductor and Schottky diode. Peak current limit ~1.7A typ. Pins 3 and 4 are internally tied and must both connect to the switching node. |+| 4 | SW | power_out | Internal power switch node (second SW pin, internally tied to pin 3). Connect together with pin 3 to the inductor/Schottky junction. |+| 5 | VIN/OUT | power_in | Combined output-voltage sense / input-voltage supply pin (3.0-60V operating range, 60V absolute max). Acts as VIN in boost/lift topologies and as the output-voltage sense point in buck topologies; connects to the top of the RSENCE current-sense resistor. |+| 6 | CSN | input | LED current-sense (sampling) pin. Connect to the low side of external sampling resistor RSENCE. Regulation loop forces V(VIN)−V(CSN) ≈ 0.2V typ (0.195-0.205V), giving IOUT = (V(VIN)−V(CSN))/RSENCE. |+| 7 | OVP | input | Output overvoltage-protection sense pin. Tie to a resistor divider from the output (RH/RL); OVP triggers at 1.0V typ (recovery 0.9V). Absolute max −0.3V to 6V. Used in boost/lift applications to protect against open-LED faults; VOUT_OVP = (1 + RH/RL) × 1.0V. |+| 8 | EN | input | Enable / dimming input. Rising threshold >0.5V enables the output, falling <0.4V shuts the chip down (IS ~10µA). Analog dimming range 0.6-1.2V on LGS63040 sets LED current proportionally; above 1.2V (up to 6V max) gives 100% current. Internal ~800kΩ pull-down; do not leave floating. IEN typ 5µA at VEN=5V. |+| EP | GND | power_in | Exposed thermal pad on package bottom, internally connected to GND. Must be soldered to the PCB ground plane for thermal dissipation (θJB ≈ 33.2°C/W, θJA ≈ 173°C/W). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Legend Si |+| Package | ESOP-8 |+| Category | LED-drv |+| Pins | 9 |++## Ordering variants++- `LGS63040EPEP`+- `LGS63040EPB5`++## CAD (KiCad official)++- Symbol: `LGS63040EP`+- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`+- 3D model: ESOP-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Legend Si datasheet](docs/lgs63040ep-datasheet.pdf) (22 pp, sha256 `13f24f98441db88d`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lgs63040ep-datasheet.pdf)

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