component
LGS5145EP
Public Made by Adomby adom
Legend Si DC-DC Converters, ESOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+48@@ -0,0 +1,48 @@+# LGS5145EP++**Legend Si** · DC-DC Converters · ESOP-8++LGS5145EP from Legend Si, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BST | passive | Bootstrap supply pin for the high-side gate driver. A high-quality 100nF ceramic capacitor must be connected between BST and SW to bias the internal high-side MOSFET gate driver. Observe capacitor voltage rating (≥16V recommended). |+| 2 | VIN | power_in | Regulator power input, 4.5V-60V. Bypass with a 2.2µF (or larger) ceramic capacitor placed as close as possible between VIN and GND to minimize ringing and EMI. |+| 3 | EN | input | Regulator enable input. Drive high (>1.4V) to enable the buck output; drive low (<1.0V) to shut down the regulator and enter low-power sleep. Has an internal ~100nA weak pull-down; do not leave floating in noisy environments - tie to VIN for auto-start. |+| 4 | NC | unconnected | No connect. Leave floating. |+| 5 | FB | input | Feedback input to the internal error amplifier. Connect to the tap of an external resistor divider from VOUT to GND; internal reference is 0.812V. VOUT = 0.812 × (RF + RG)/RG; keep RG ≤ 30kΩ. Absolute max FB voltage is -0.3V to 6V. |+| 6 | NC | unconnected | No connect. Leave floating. |+| 7 | GND | power_in | Ground return pin. Must be connected to the exposed pad and to the system ground plane through multiple vias for proper thermal and electrical performance. |+| 8 | SW | output | Internal power-switch node. Connect to the external power inductor, Schottky freewheeling diode (e.g. SS26), and the CBST bootstrap capacitor. Handles the switching waveform at 1.2MHz with peak currents up to 1.7A. |+| EP | GND (Exposed Pad) | power_in | Exposed thermal pad on the bottom of the ESOP-8 package. Must be soldered to the PCB ground plane (connected to GND, pin 7) for thermal dissipation and electrical grounding. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Legend Si |+| Package | ESOP-8 |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++- `LGS5145EP`++## CAD (KiCad official)++- Symbol: `LGS5145EP`+- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`+- 3D model: ESOP-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Legend Si datasheet](docs/lgs5145ep-datasheet.pdf) (23 pp, sha256 `b368131b194cf7e0`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lgs5145ep-datasheet.pdf)
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