component
LDL1117S12R
Public Made by Adomby adom
STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+40@@ -0,0 +1,40 @@+# LDL1117S12R++**STMicroelectronics** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-4++LDL1117S12R from STMicroelectronics, in a SOT-223-4. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GND | power_in | Ground reference connection. |+| 2 | VOUT | power_out | Regulated output voltage of 1.185 V at up to 1.2 A maximum current. |+| 3 | VIN | power_in | Input voltage supply ranging from 2.5 V to 18 V. |+| 4 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SOT-223-4 |+| Category | Power Management (PMIC) |+| Pins | 4 |++## CAD (KiCad official)++- Symbol: `LDL1117S12R`+- Footprint: `Package_TO_SOT_SMD:SOT-223`+- 3D model: SOT-223-4 (KiCad packages3D, STEP)+- 3D model files: `ldl1117s12r-etched.step` / `ldl1117s12r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ldl1117s12r.step` / `ldl1117s12r.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588945830179459072) (23 pp, sha256 `ffbb9e03f7f6d0c4`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ldl1117s12r-datasheet.pdf)
page.jsonadded+120@@ -0,0 +1,120 @@+{+ "slug": "ldl1117s12r",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223-4. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "ldl1117s12r",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ldl1117s12r.kicad_sym",+ "ldl1117s12r.kicad_mod",+ "ldl1117s12r.glb",+ "ldl1117s12r.step",+ "ldl1117s12r.lbr",+ "docs/hero.png",+ "docs/ldl1117s12r-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "LDL1117S12R",+ "manufacturer": "STMicroelectronics",+ "package": "SOT-223-4",+ "pin_count": 4,+ "category": "Power Management (PMIC)",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588945830179459072",+ "parts": {+ "symbol": "ldl1117s12r.kicad_sym",+ "footprint": "ldl1117s12r.kicad_mod",+ "model_3d": "ldl1117s12r-etched.glb",+ "model_3d_plain": "ldl1117s12r.glb",+ "model_3d_step": "ldl1117s12r-etched.step",+ "model_3d_step_plain": "ldl1117s12r.step",+ "lbr": "ldl1117s12r.lbr"+ },+ "distributor_links": {+ "lcsc": "C2926949"+ },+ "pins": [+ {+ "number": "1",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference connection."+ },+ {+ "number": "2",+ "name": "VOUT",+ "type": "power_out",+ "description": "Regulated output voltage of 1.185 V at up to 1.2 A maximum current."+ },+ {+ "number": "3",+ "name": "VIN",+ "type": "power_in",+ "description": "Input voltage supply ranging from 2.5 V to 18 V."+ },+ {+ "number": "4",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Thermal pad/tab is mentioned in the note as connected to VOUT but is not explicitly numbered in Tabl",+ "exposed pad 4 added from the footprint"+ ],+ "pages_sent": 23,+ "cost_usd": 0.1259,+ "at": "2026-09-22T21:51:45"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588945830179459072",+ "pages": 23,+ "sha256": "ffbb9e03f7f6d0c4",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 4,+ "described": 4,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}