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L99DZ100GPTR
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STMicroelectronics Power Management - Specialized, LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+100@@ -0,0 +1,100 @@+# L99DZ100GPTR++**STMicroelectronics** · Power Management - Specialized · LQFP-64(10x10)++L99DZ100GPTR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | WU | input | Wake-up input for static or cyclic monitoring of external contacts, rated for DC wake-up voltage of -0.3 to +28 V (load dump 40 V). |+| 2 | CP2M | passive | Charge pump pin for capacitor 2, negative side. |+| 3 | CP2P | passive | Charge pump pin for capacitor 2, positive side. |+| 4 | CP | power_out | Charge pump output. |+| 5 | CP1P | passive | Charge pump pin for capacitor 1, positive side. |+| 6 | CP1M | passive | Charge pump pin for capacitor 1, negative side. |+| 7 | GHheater | output | Gate driver for an external power N-channel MOSFET in high-side configuration to control the heater. |+| 8 | SHheater | passive | Source of the high-side MOSFET used to control the heater. |+| 9 | OUT14 | output | High-side driver output to drive LEDs. |+| 10 | OUT13 | output | High-side driver output to drive LEDs. |+| 11 | OUT12 | output | High-side driver output to drive LEDs. |+| 12 | OUT9 | output | High-side driver output to drive LEDs. |+| 13 | OUT10 | output | High-side driver output; besides the OUT10_x bits in CR5, this output can be switched on by the ECON bit for electro-chrome control mode, which has higher priority. |+| 14 | OUT11 | output | High-side driver output to drive LEDs. |+| 15 | LS1_FSO | output | Fail-safe low-side switch (active low); output voltage range -0.3 to 35 V. |+| 16 | LS2_FSO | output | Fail-safe low-side switch (active low); output voltage range -0.3 to 35 V. |+| 17 | VS | power_in | Power supply for the power stage outputs; external reverse battery protection is required, a ceramic capacitor close to GND is recommended, and all VS pins must be connected externally for full output current capability. |+| 18 | VS | power_in | Second VS pin for power stage supply current capability; must be connected externally together with all other VS pins. |+| 19 | OUT7 | output | High-side driver output to drive LEDs or a 10 W bulb (programmable Rdson). |+| 20 | OUT6 | output | Half-bridge output built from an internally connected high-side and low-side power DMOS switch, each with an internal parasitic reverse diode. |+| 21 | OUT1 | output | Half-bridge output built from an internally connected high-side and low-side power DMOS switch, each with an internal parasitic reverse diode. |+| 22 | OUT2 | output | Half-bridge output built from an internally connected high-side and low-side power DMOS switch, each with an internal parasitic reverse diode. |+| 23 | OUT5 | output | Half-bridge output built from an internally connected high-side and low-side power DMOS switch, each with an internal parasitic reverse diode. |+| 24 | OUT5 | output | Second OUT5 pin providing additional current capability for the same half-bridge output. |+| 25 | VSREG | power_in | Power supply for the internal voltage regulators, OUT15 and OUT_HS; external reverse battery protection (diode) is required and an electrolytic back-up capacitor is recommended. |+| 26 | OUT_HS | output | High-side driver output to drive LEDs or to supply contacts (buffered supply). |+| 27 | OUT4 | output | Half-bridge output built from an internally connected high-side and low-side power DMOS switch, each with an internal parasitic reverse diode. |+| 28 | OUT4 | output | Second OUT4 pin providing additional current capability for the same half-bridge output. |+| 29 | OUT3 | output | Half-bridge output built from an internally connected high-side and low-side power DMOS switch, each with an internal parasitic reverse diode. |+| 30 | VS | power_in | Third VS pin for power stage supply current capability; must be connected externally together with all other VS pins. |+| 31 | OUT15 | output | High-side driver output to drive LEDs. |+| 32 | PGND | power_in | Power ground. |+| 33 | OUT8 | output | High-side driver output to drive LEDs or a 5 W bulb (programmable Rdson). |+| 34 | ECDR | output | In EC control mode, this pin drives the gate of an external N-channel MOSFET; absolute maximum output voltage -0.3 to VS+0.3 V. |+| 35 | SGND | power_in | Signal ground. |+| 36 | CM | output | Current monitor output that sources an image of the instantaneous current through the high-side driver selected by CM_SEL_x (CR7) at a fixed ratio. |+| 37 | ECV | input | Voltage monitor input for electro-chrome control mode; an additional low-side switch is implemented for fast discharge. |+| 38 | CLK | input | SPI serial clock input, up to 4 MHz. |+| 39 | DO | output | SPI serial data output (push-pull output stage); high impedance when CSN is high. |+| 40 | DI | input | SPI serial data input, sampled on the rising edge of CLK. |+| 41 | CSN | input | SPI chip select (not) input; a low level starts a communication frame. |+| 42 | TxD_L | input | LIN transmit data input. |+| 43 | RxD_L/NINT | output | RxDL: LIN receive data output; NINT: indicates local/remote wake-up events (push-pull output stage). |+| 44 | TxD_C | input | CAN transmit data input. |+| 45 | RxD_C/NINT | output | CAN receive data output; NINT indicates local/remote wake-up events (push-pull output stage). |+| 46 | DIR1 | input | Direct drive input 1. |+| 47 | PWMH | input | PWMH input used to control the H-bridge gate drivers. |+| 48 | DIRH | input | Direction input controlling the H-bridge drivers for the external MOSFETs. |+| 49 | DIR2 | input | Direct drive input 2. |+| 50 | NRESET | output | Reset output to the microcontroller (reset state LOW); low-side switch with internal pull-up to 5V_1. |+| 51 | 5V_1 | power_out | Voltage regulator 1 output providing 5 V supply, e.g. for the microcontroller and CAN transceiver. |+| 52 | CAN | power_in | CAN supply input allowing an external CAN supply from the V1 or V2 regulator; CAN supply absolute maximum -0.3 to +5.25 V. |+| 53 | NINT | output | Interrupt output (active low, push-pull) indicating VSREG early warning in active mode and wake-up events from V1_standby mode. |+| 54 | CAN_L | bidirectional | CAN low-level bus voltage I/O; bus voltage range -27 to +40 V. |+| 55 | CAN_H | bidirectional | CAN high-level bus voltage I/O; bus voltage range -27 to +40 V. |+| 56 | Debug | input | Debug input to deactivate the window watchdog (active high); debug input voltage range -0.3 to 40 V. |+| 57 | LIN | bidirectional | LIN bus line; LIN bus I/O voltage range -20 to +40 V. |+| 58 | 5V_2 | power_out | Voltage regulator 2 output providing a 5 V supply for external loads (potentiometer, sensors) or the CAN transceiver; protected against reverse supply. |+| 59 | GL1 | output | Gate driver for the PowerMOS low-side switch in half-bridge 1. |+| 60 | SH1 | passive | Source of the high-side switch in half-bridge 1. |+| 61 | GH1 | output | Gate driver for the PowerMOS high-side switch in half-bridge 1. |+| 62 | GH2 | output | Gate driver for the PowerMOS high-side switch in half-bridge 2. |+| 63 | SH2 | passive | Source of the high-side switch in half-bridge 2. |+| 64 | GL2 | output | Gate driver for the PowerMOS low-side switch in half-bridge 2. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-64(10x10) |+| Category | Power Management (PMIC) |+| Pins | 64 |++## CAD (KiCad official)++- Symbol: `L99DZ100GPTR`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)+- 3D model files: `l99dz100gptr-etched.step` / `l99dz100gptr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l99dz100gptr.step` / `l99dz100gptr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588925414249009152) (197 pp, sha256 `d078940241be0c50`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/l99dz100gptr-datasheet.pdf)
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besides the OUT10_x bits in CR5, this output can be switched on by the ECON bit for electro-chrome control mode, which has higher priority."+ },+ {+ "number": "14",+ "name": "OUT11",+ "type": "output",+ "description": "High-side driver output to drive LEDs."+ },+ {+ "number": "15",+ "name": "LS1_FSO",+ "type": "output",+ "description": "Fail-safe low-side switch (active low); output voltage range -0.3 to 35 V."+ },+ {+ "number": "16",+ "name": "LS2_FSO",+ "type": "output",+ "description": "Fail-safe low-side switch (active low); output voltage range -0.3 to 35 V."+ },+ {+ "number": "17",+ "name": "VS",+ "type": "power_in",+ "description": "Power supply for the power stage outputs; external reverse battery protection is required, a ceramic capacitor close to GND is recommended, and all VS pins must be connected externally for full output current capability."+ },+ {+ "number": "18",+ "name": "VS",+ "type": "power_in",+ "description": "Second VS pin for power stage supply current capability; must be connected externally together with all other VS pins."+ },+ {+ "number": "19",+ "name": "OUT7",+ "type": "output",+ "description": "High-side driver output to drive LEDs or a 10 W bulb (programmable Rdson)."+ },+ {+ "number": "20",+ "name": "OUT6",+ "type": "output",+ "description": "Half-bridge output built from an internally connected high-side and low-side power DMOS switch, each with an internal parasitic reverse diode."+ },+ {+ "number": "21",+ "name": "OUT1",+ "type": "output",+ "description": "Half-bridge output built from an internally connected high-side and low-side power DMOS switch, each with an internal parasitic reverse diode."+ },+ {+ "number": "22",+ "name": "OUT2",+ "type": "output",+ "description": "Half-bridge output built from an internally connected high-side and low-side power DMOS switch, each with an internal parasitic reverse diode."+ },+ {+ "number": "23",+ "name": "OUT5",+ "type": "output",+ "description": "Half-bridge output built from an internally connected high-side and low-side power DMOS switch, each with an internal parasitic reverse diode."+ },+ {+ "number": "24",+ "name": "OUT5",+ "type": "output",+ "description": "Second OUT5 pin providing additional current capability for the same half-bridge output."+ },+ {+ "number": "25",+ "name": "VSREG",+ "type": "power_in",+ "description": "Power supply for the internal voltage regulators, OUT15 and OUT_HS; external reverse battery protection (diode) is required and an electrolytic back-up capacitor is recommended."+ },+ {+ "number": "26",+ "name": "OUT_HS",+ "type": "output",+ "description": "High-side driver output to drive LEDs or to supply contacts (buffered supply)."+ },+ {+ "number": "27",+ "name": "OUT4",+ "type": "output",+ "description": "Half-bridge output built from an internally connected high-side and low-side power DMOS switch, each with an internal parasitic reverse diode."+ },+ {+ "number": "28",+ "name": "OUT4",+ "type": "output",+ "description": "Second OUT4 pin providing additional current capability for the same half-bridge output."+ },+ {+ "number": "29",+ "name": "OUT3",+ "type": "output",+ "description": "Half-bridge output built from an internally connected high-side and low-side power DMOS switch, each with an internal parasitic reverse diode."+ },+ {+ "number": "30",+ "name": "VS",+ "type": "power_in",+ "description": "Third VS pin for power stage supply current capability; must be connected externally together with all other VS pins."+ },+ {+ "number": "31",+ "name": "OUT15",+ "type": "output",+ "description": "High-side driver output to drive LEDs."+ },+ {+ "number": "32",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground."+ },+ {+ "number": "33",+ "name": "OUT8",+ "type": "output",+ "description": "High-side driver output to drive LEDs or a 5 W bulb (programmable Rdson)."+ },+ {+ "number": "34",+ "name": "ECDR",+ "type": "output",+ "description": "In EC control mode, this pin drives the gate of an external N-channel MOSFET; absolute maximum output voltage -0.3 to VS+0.3 V."+ },+ {+ "number": "35",+ "name": "SGND",+ "type": "power_in",+ "description": "Signal ground."+ },+ {+ "number": "36",+ "name": "CM",+ "type": "output",+ "description": "Current monitor output that sources an image of the instantaneous current through the high-side driver selected by CM_SEL_x (CR7) at a fixed ratio."+ },+ {+ "number": "37",+ "name": "ECV",+ "type": "input",+ "description": "Voltage monitor input for electro-chrome control mode; an additional low-side switch is implemented for fast discharge."+ },+ {+ "number": "38",+ "name": "CLK",+ "type": "input",+ "description": "SPI serial clock input, up to 4 MHz."+ },+ {+ "number": "39",+ "name": "DO",+ "type": "output",+ "description": "SPI serial data output (push-pull output stage); high impedance when CSN is high."+ },+ {+ "number": "40",+ "name": "DI",+ "type": "input",+ "description": "SPI serial data input, sampled on the rising edge of CLK."+ },+ {+ "number": "41",+ "name": "CSN",+ "type": "input",+ "description": "SPI chip select (not) input; a low level starts a communication frame."+ },+ {+ "number": "42",+ "name": "TxD_L",+ "type": "input",+ "description": "LIN transmit data input."+ },+ {+ "number": "43",+ "name": "RxD_L/NINT",+ "type": "output",+ "description": "RxDL: LIN receive data output; NINT: indicates local/remote wake-up events (push-pull output stage)."+ },+ {+ "number": "44",+ "name": "TxD_C",+ "type": "input",+ "description": "CAN transmit data input."+ },+ {+ "number": "45",+ "name": "RxD_C/NINT",+ "type": "output",+ "description": "CAN receive data output; NINT indicates local/remote wake-up events (push-pull output stage)."+ },+ {+ "number": "46",+ "name": "DIR1",+ "type": "input",+ "description": "Direct drive input 1."+ },+ {+ "number": "47",+ "name": "PWMH",+ "type": "input",+ "description": "PWMH input used to control the H-bridge gate drivers."+ },+ {+ "number": "48",+ "name": "DIRH",+ "type": "input",+ "description": "Direction input controlling the H-bridge drivers for the external MOSFETs."+ },+ {+ "number": "49",+ "name": "DIR2",+ "type": "input",+ "description": "Direct drive input 2."+ },+ {+ "number": "50",+ "name": "NRESET",+ "type": "output",+ "description": "Reset output to the microcontroller (reset state LOW); low-side switch with internal pull-up to 5V_1."+ },+ {+ "number": "51",+ "name": "5V_1",+ "type": "power_out",+ "description": "Voltage regulator 1 output providing 5 V supply, e.g. for the microcontroller and CAN transceiver."+ },+ {+ "number": "52",+ "name": "CAN",+ "type": "power_in",+ "description": "CAN supply input allowing an external CAN supply from the V1 or V2 regulator; CAN supply absolute maximum -0.3 to +5.25 V."+ },+ {+ "number": "53",+ "name": "NINT",+ "type": "output",+ "description": "Interrupt output (active low, push-pull) indicating VSREG early warning in active mode and wake-up events from V1_standby mode."+ },+ {+ "number": "54",+ "name": "CAN_L",+ "type": "bidirectional",+ "description": "CAN low-level bus voltage I/O; bus voltage range -27 to +40 V."+ },+ {+ "number": "55",+ "name": "CAN_H",+ "type": "bidirectional",+ "description": "CAN high-level bus voltage I/O; bus voltage range -27 to +40 V."+ },+ {+ "number": "56",+ "name": "Debug",+ "type": "input",+ "description": "Debug input to deactivate the window watchdog (active high); debug input voltage range -0.3 to 40 V."+ },+ {+ "number": "57",+ "name": "LIN",+ "type": "bidirectional",+ "description": "LIN bus line; LIN bus I/O voltage range -20 to +40 V."+ },+ {+ "number": "58",+ "name": "5V_2",+ "type": "power_out",+ "description": "Voltage regulator 2 output providing a 5 V supply for external loads (potentiometer, sensors) or the CAN transceiver; protected against reverse supply."+ },+ {+ "number": "59",+ "name": "GL1",+ "type": "output",+ "description": "Gate driver for the PowerMOS low-side switch in half-bridge 1."+ },+ {+ "number": "60",+ "name": "SH1",+ "type": "passive",+ "description": "Source of the high-side switch in half-bridge 1."+ },+ {+ "number": "61",+ "name": "GH1",+ "type": "output",+ "description": "Gate driver for the PowerMOS high-side switch in half-bridge 1."+ },+ {+ "number": "62",+ "name": "GH2",+ "type": "output",+ "description": "Gate driver for the PowerMOS high-side switch in half-bridge 2."+ },+ {+ "number": "63",+ "name": "SH2",+ "type": "passive",+ "description": "Source of the high-side switch in half-bridge 2."+ },+ {+ "number": "64",+ "name": "GL2",+ "type": "output",+ "description": "Gate driver for the PowerMOS low-side switch in half-bridge 2."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin types are assigned by me from the functional descriptions in Table 2; the datasheet does not sta; Several pin names repeat (VS on 17/18/30, OUT5 on 23/24, OUT4 on 27/28). They are the same net bonde; The LQFP-64 exposed pad (epad) is referenced in the title and order code, but Table 2 gives no numbe"+ ],+ "pages_sent": 32,+ "cost_usd": 0.2053,+ "at": "2026-10-08T15:38:07"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588925414249009152",+ "pages": 197,+ "sha256": "d078940241be0c50",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 64,+ "described": 64,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "l99dz100gptr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "l99dz100gptr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "befce1c7629ecdbd13dc0f0c2f586fe039f7d8f7d1b5f916d2c2d6448cb5607f",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}