← Commit history

Initial commit: component/l78m12abdt-tr

Ray ·fc1f96c250 ·1mo ago
2 files changed +153
README.mdadded+39
@@ -0,0 +1,39 @@+# L78M12ABDT-TR++**STMicroelectronics** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-252-2(DPAK)++L78M12ABDT-TR from STMicroelectronics, in a TO-252-2(DPAK). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | INPUT | power_in | Unregulated DC input to the regulator; for the 12 V grade the datasheet specifies operation with VI = 14.5 to 27 V (AB grade, IO = 5 to 350 mA) and an absolute maximum DC input voltage of 35 V, with a 0.33 µF input bypass capacitor recommended if the regulator is far from the supply filter. |+| 2 | GND | power_in | Ground/common reference pin, formed by the DPAK tab; thermal path to the package tab with junction-to-case thermal resistance RthJC = 8 °C/W and junction-to-ambient RthJA = 100 °C/W for the DPAK package. |+| 3 | OUTPUT | power_out | Regulated +12 V output (11.75 to 12.25 V at TJ = 25 °C for the AB grade), capable of delivering output current up to 0.5 A with internal current limiting, thermal shutdown and safe-area protection; a 0.1 µF output capacitor improves transient response though it is not required for stability. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | TO-252-2(DPAK) |+| Category | Power Management (PMIC) |+| Pins | 3 |++## CAD (KiCad official)++- Symbol: `L78M12ABDT-TR`+- Footprint: `Package_TO_SOT_SMD:TO-252-2`+- 3D model: TO-252-2(DPAK) (KiCad packages3D, STEP)+- 3D model files: `l78m12abdt-tr-etched.step` / `l78m12abdt-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l78m12abdt-tr.step` / `l78m12abdt-tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586175025845690368) (46 pp, sha256 `bf25de1549fb4045`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-sonnet-5` (text+vision), consensus `claude-opus-4-8` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/l78m12abdt-tr-datasheet.pdf)
page.jsonadded+114
@@ -0,0 +1,114 @@+{+  "slug": "l78m12abdt-tr",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-252-2(DPAK). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "l78m12abdt-tr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "l78m12abdt-tr.kicad_sym",+    "l78m12abdt-tr.kicad_mod",+    "l78m12abdt-tr.glb",+    "l78m12abdt-tr.step",+    "l78m12abdt-tr.lbr",+    "docs/hero.png",+    "docs/l78m12abdt-tr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "L78M12ABDT-TR",+    "manufacturer": "STMicroelectronics",+    "package": "TO-252-2(DPAK)",+    "pin_count": 3,+    "category": "Power Management (PMIC)",+    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586175025845690368",+    "parts": {+      "symbol": "l78m12abdt-tr.kicad_sym",+      "footprint": "l78m12abdt-tr.kicad_mod",+      "model_3d": "l78m12abdt-tr-etched.glb",+      "model_3d_plain": "l78m12abdt-tr.glb",+      "model_3d_step": "l78m12abdt-tr-etched.step",+      "model_3d_step_plain": "l78m12abdt-tr.step",+      "lbr": "l78m12abdt-tr.lbr"+    },+    "distributor_links": {+      "lcsc": "C61534"+    },+    "pins": [+      {+        "number": "1",+        "name": "INPUT",+        "type": "power_in",+        "description": "Unregulated DC input to the regulator; for the 12 V grade the datasheet specifies operation with VI = 14.5 to 27 V (AB grade, IO = 5 to 350 mA) and an absolute maximum DC input voltage of 35 V, with a 0.33 µF input bypass capacitor recommended if the regulator is far from the supply filter."+      },+      {+        "number": "2",+        "name": "GND",+        "type": "power_in",+        "description": "Ground/common reference pin, formed by the DPAK tab; thermal path to the package tab with junction-to-case thermal resistance RthJC = 8 °C/W and junction-to-ambient RthJA = 100 °C/W for the DPAK package."+      },+      {+        "number": "3",+        "name": "OUTPUT",+        "type": "power_out",+        "description": "Regulated +12 V output (11.75 to 12.25 V at TJ = 25 °C for the AB grade), capable of delivering output current up to 0.5 A with internal current limiting, thermal shutdown and safe-area protection; a 0.1 µF output capacitor improves transient response though it is not required for stability."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-sonnet-5",+        "primary_mode": "text+vision",+        "consensus_model": "claude-opus-4-8",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The DPAK pin diagram in Figure 2 (page 4) labels the three terminals only by function (GND on the ta",+          "vision extraction: provenance cannot be text-verified; needs consensus"+        ],+        "pages_sent": 46,+        "cost_usd": 1.0174,+        "at": "2026-09-22T18:17:56"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586175025845690368",+        "pages": 46,+        "sha256": "bf25de1549fb4045",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 3,+        "described": 3,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file