component
L78M05ACDT-TR
Public Made by Adomby adom
STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-252-2(DPAK). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (DIGIKEY_PN 497-1202-2-ND, LCSC_PN C173987, MOUSER_PN 511-L78M05ACDT-TR). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+30−6
l78m05acdt-tr.lbr+22−2@@ -57,6 +57,18 @@ <smd name="1" x="-5.0400" y="2.2800" dx="2.2000" dy="1.2000" layer="1"/> <smd name="2" x="1.2600" y="-0.0000" dx="6.4000" dy="5.8000" layer="1"/> <smd name="3" x="-5.0400" y="-2.2800" dx="2.2000" dy="1.2000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-5.0400" y="3.1400"/>+ <vertex x="-5.3800" y="3.6100"/>+ <vertex x="-4.7000" y="3.6100"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="3.1100" y="3.2500"/>+ <vertex x="3.1100" y="-3.2500"/>+ <vertex x="-3.1100" y="-3.2500"/>+ <vertex x="-3.1100" y="2.2500"/>+ <vertex x="-2.1100" y="3.2500"/>+ </polygon> <wire x1="-3.3100" y1="3.4500" x2="-3.3100" y2="3.1800" width="0.1200" layer="21"/> <wire x1="-3.3100" y1="-3.4500" x2="-3.3100" y2="-3.1800" width="0.1200" layer="21"/> <wire x1="3.1100" y1="3.4500" x2="-3.3100" y2="3.4500" width="0.1200" layer="21"/>@@ -72,7 +84,7 @@ <wire x1="4.1100" y1="-2.7000" x2="3.1100" y2="-2.7000" width="0.1000" layer="51"/> <text x="0" y="4.050" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-4.050" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-5.0400" y="3.1400"/><vertex x="-5.3800" y="3.6100"/><vertex x="-4.7000" y="3.6100"/></polygon></package>+</package> </packages> <symbols> <symbol name="L78M05ACDT-TR">@@ -100,7 +112,15 @@ <connect gate="G$1" pin="GND" pad="2"/> <connect gate="G$1" pin="OUTPUT" pad="3"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="L78M05ACDT-TR" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="MOUSER_PN" value="511-L78M05ACDT-TR" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-1202-2-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C173987" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>
page.json+8−4@@ -26,25 +26,29 @@ "model_3d_step": "l78m05acdt-tr.step", "lbr": "l78m05acdt-tr.lbr" },- "distributor_links": {},+ "distributor_links": {+ "digikey": "497-1202-2-ND",+ "mouser": "511-L78M05ACDT-TR",+ "lcsc": "C173987"+ }, "pins": [ { "number": "1", "name": "INPUT", "type": "power_in",- "description": "Unregulated DC input voltage. For a 5 V output, VI must be at least ~7 V (dropout ≈ 2 V typ). Absolute max VI = 35 V. A 0.33 µF ceramic bypass capacitor to GND is recommended close to this pin."+ "description": "Unregulated DC input voltage. For a 5 V output, VI must be at least ~7 V (dropout \u2248 2 V typ). Absolute max VI = 35 V. A 0.33 \u00b5F ceramic bypass capacitor to GND is recommended close to this pin." }, { "number": "2", "name": "GND", "type": "power_in",- "description": "Ground / common reference for input and output. On the DPAK package the GND pin is electrically and thermally common with the exposed metal tab, which serves as the primary heat-sinking surface (RthJC = 8 °C/W, RthJA = 100 °C/W)."+ "description": "Ground / common reference for input and output. On the DPAK package the GND pin is electrically and thermally common with the exposed metal tab, which serves as the primary heat-sinking surface (RthJC = 8 \u00b0C/W, RthJA = 100 \u00b0C/W)." }, { "number": "3", "name": "OUTPUT", "type": "power_out",- "description": "Regulated +5 V output, 4.8 V to 5.2 V over line/load/temperature. Delivers up to 500 mA (guaranteed 350 mA test condition) with internal short-circuit current limit (~300 mA typ, 700 mA peak). A 0.1 µF ceramic capacitor to GND improves transient response."+ "description": "Regulated +5 V output, 4.8 V to 5.2 V over line/load/temperature. Delivers up to 500 mA (guaranteed 350 mA test condition) with internal short-circuit current limit (~300 mA typ, 700 mA peak). A 0.1 \u00b5F ceramic capacitor to GND improves transient response." }, { "number": "TAB",