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l7812cd2t-tr: factory component page (tier=mfr)

Ray ·7bf1265dcd ·1mo ago ·parent 7f6f063
1 file changed +86−8
page.json+86−8
@@ -1,13 +1,96 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "l7812cd2t-tr",+  "title": "L7812CD2T-TR",+  "brief": "STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-263-2. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-263-2. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "pmic",     "l7812cd2t-tr"   ],+  "component": {+    "mpn": "L7812CD2T-TR",+    "manufacturer": "STMicroelectronics",+    "package": "TO-263-2",+    "pin_count": 3,+    "category": "PMIC",+    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+    "datasheet": "https://www.st.com/resource/en/datasheet/l7812cd2t-tr.pdf",+    "parts": {+      "symbol": "l7812cd2t-tr.kicad_sym",+      "footprint": "l7812cd2t-tr.kicad_mod",+      "model_3d": "l7812cd2t-tr.glb",+      "model_3d_step": "l7812cd2t-tr.step",+      "lbr": "l7812cd2t-tr.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "INPUT",+        "type": "power_in",+        "description": "Unregulated DC input voltage (V_I). Must be at least ~2 V above V_O (typ. 14.5-35 V for the 12 V variant); absolute maximum 35 V. Bypass to GND with a 0.33 uF ceramic capacitor placed close to the pin."+      },+      {+        "number": "2",+        "name": "GROUND",+        "type": "power_in",+        "description": "Common ground reference for the regulator. Electrically connected to the package tab on D2PAK; the tab must be soldered to a ground copper pour that also serves as the primary heat-sinking path."+      },+      {+        "number": "3",+        "name": "OUTPUT",+        "type": "power_out",+        "description": "Regulated +12 V output (V_O), 2% tolerance for A-grade, 4% for standard C-grade. Deliverable current up to 1.5 A with adequate heat sinking. Bypass to GND with a 0.1 uF ceramic capacitor for stability and transient response."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.st.com/resource/en/datasheet/l7812cd2t-tr.pdf",+        "pages": 58,+        "sha256": "32a4d2208c478c95",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 3,+        "described": 3,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "STMicroelectronics",+      "Package": "TO-263-2",+      "Category": "PMIC",+      "Pins": "3"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "l7812cd2t-tr"+  ],+  "discovery_pitch": "L7812CD2T-TR (STMicroelectronics) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +108,5 @@     "docs/l7812cd2t-tr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file