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Initial commit: component/l6398dtr

Ray ·cc7068ab5e ·19h ago
2 files changed +244
README.mdadded+44
@@ -0,0 +1,44 @@+# L6398DTR++**STMicroelectronics** · Gate Drivers · SO-8++L6398DTR from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | LIN | input | Low-side driver logic input, active low; the datasheet gives VIL of 0.8 V (min) to 1.1 V and VIH of 1.9 V to 2.25 V, with CMOS/TTL compatibility down to 3.3 V. |+| 2 | HIN | input | High-side driver logic input, active high; the datasheet gives VIL of 0.8 V (min) to 1.1 V and VIH of 1.9 V to 2.25 V, with CMOS/TTL compatibility down to 3.3 V. |+| 3 | VCC | power_in | Lower section supply voltage, recommended operating range 10 V to 20 V with an absolute maximum of 21 V. |+| 4 | GND | power_in | Ground reference for the device. |+| 5 | LVG | output | Low-side driver output; the circuit guarantees less than 1 V on LVG at Isink = 10 mA with VCC > 3 V, so an external gate-to-source bleeder resistor can be omitted. |+| 6 | OUT | power_in | High-side (floating) common voltage, recommended range up to 580 V with an absolute range of VBOOT - 21 V to VBOOT + 0.3 V. |+| 7 | HVG | output | High-side driver output referenced to OUT; the circuit guarantees less than 1 V on HVG at Isink = 10 mA with VCC > 3 V, so an external gate-to-source bleeder resistor can be omitted. |+| 8 | BOOT | power_in | Bootstrapped supply voltage for the high-side section, recommended floating supply 9.8 V to 20 V, with an absolute maximum VBOOT of 620 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SO-8 |+| Category | Motor Driver ICs |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `L6398DTR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SO-8 (KiCad packages3D, STEP)+- 3D model files: `l6398dtr-etched.step` / `l6398dtr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l6398dtr.step` / `l6398dtr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939830516994048) (16 pp, sha256 `1d82c19ce841bdb0`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/l6398dtr-datasheet.pdf)
page.jsonadded+200
@@ -0,0 +1,200 @@+{+  "slug": "l6398dtr",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics Gate Drivers, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "motor driver ics",+    "l6398dtr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "l6398dtr.kicad_sym",+    "l6398dtr.kicad_mod",+    "l6398dtr.glb",+    "l6398dtr.step",+    "l6398dtr.lbr",+    "docs/hero.png",+    "docs/l6398dtr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "l6398dtr-hero.glb",+    "l6398dtr-hero.overlay.json"+  ],+  "component": {+    "mpn": "L6398DTR",+    "manufacturer": "STMicroelectronics",+    "package": "SO-8",+    "pin_count": 8,+    "category": "Motor Driver ICs",+    "subcategory": "Gate Drivers",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939830516994048",+    "parts": {+      "symbol": "l6398dtr.kicad_sym",+      "footprint": "l6398dtr.kicad_mod",+      "model_3d": "l6398dtr-hero.glb",+      "model_3d_plain": "l6398dtr.glb",+      "model_3d_step": "l6398dtr-etched.step",+      "model_3d_step_plain": "l6398dtr.step",+      "lbr": "l6398dtr.lbr"+    },+    "distributor_links": {+      "lcsc": "C2676941",+      "digikey": "497-11127-2-ND",+      "mouser": "511-L6398DTR"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T19:32:24Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "497-11127-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "511-L6398DTR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "LIN",+        "type": "input",+        "description": "Low-side driver logic input, active low; the datasheet gives VIL of 0.8 V (min) to 1.1 V and VIH of 1.9 V to 2.25 V, with CMOS/TTL compatibility down to 3.3 V."+      },+      {+        "number": "2",+        "name": "HIN",+        "type": "input",+        "description": "High-side driver logic input, active high; the datasheet gives VIL of 0.8 V (min) to 1.1 V and VIH of 1.9 V to 2.25 V, with CMOS/TTL compatibility down to 3.3 V."+      },+      {+        "number": "3",+        "name": "VCC",+        "type": "power_in",+        "description": "Lower section supply voltage, recommended operating range 10 V to 20 V with an absolute maximum of 21 V."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference for the device."+      },+      {+        "number": "5",+        "name": "LVG",+        "type": "output",+        "description": "Low-side driver output; the circuit guarantees less than 1 V on LVG at Isink = 10 mA with VCC > 3 V, so an external gate-to-source bleeder resistor can be omitted."+      },+      {+        "number": "6",+        "name": "OUT",+        "type": "power_in",+        "description": "High-side (floating) common voltage, recommended range up to 580 V with an absolute range of VBOOT - 21 V to VBOOT + 0.3 V."+      },+      {+        "number": "7",+        "name": "HVG",+        "type": "output",+        "description": "High-side driver output referenced to OUT; the circuit guarantees less than 1 V on HVG at Isink = 10 mA with VCC > 3 V, so an external gate-to-source bleeder resistor can be omitted."+      },+      {+        "number": "8",+        "name": "BOOT",+        "type": "power_in",+        "description": "Bootstrapped supply voltage for the high-side section, recommended floating supply 9.8 V to 20 V, with an absolute maximum VBOOT of 620 V."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Pin 6 (OUT) and pin 8 (BOOT) are typed 'P' (power) in the datasheet pin table; mapped to power_in he; The Table 1 pin list is the only source for the pin-to-name mapping; the top-view figure (Figure 2) ; The spec field has no slot in this output schema, so the headline ratings (VCC 10-20 V, Iqcc 380-440"+        ],+        "pages_sent": 16,+        "cost_usd": 0.0539,+        "at": "2026-10-08T19:31:46"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939830516994048",+        "pages": 16,+        "sha256": "1d82c19ce841bdb0",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "l6398dtr.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          4.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "l6398dtr-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          4.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "44948039870f32135d619480fd5f60049fd720ad6b91e4c34c0d25215255e813",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file