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L4931ABD33-TR
Public Made by Adomby adom
STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# L4931ABD33-TR++**STMicroelectronics** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8++L4931ABD33-TR from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VOUT | power_out | Regulated 3.3 V output (L4931ABD33) delivering up to 250 mA, needing a 2 to 10 µF output capacitor with ESR 0.1 to 10 Ω for stability. |+| 2 | GND | power_in | Ground pin, connected internally to the other GND pins (3, 6, 7). |+| 3 | GND | power_in | Ground pin, connected internally to the other GND pins (2, 6, 7). |+| 4 | NC | unconnected | No internal connection. |+| 5 | INHIBIT | input | TTL-compatible logic shutdown control input; logic low of 0.8 V max enables the regulator, logic high of 2 V min turns it OFF (about 50 µA typ. in OFF mode). |+| 6 | GND | power_in | Ground pin, connected internally to the other GND pins (2, 3, 7). |+| 7 | GND | power_in | Ground pin, connected internally to the other GND pins (2, 3, 6). |+| 8 | VIN | power_in | Regulator input supply, with operating input voltage up to 20 V (absolute maximum DC input 20 V), decoupled with a 0.1 µF input capacitor in the test circuit. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `L4931ABD33-TR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `l4931abd33-tr-etched.step` / `l4931abd33-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l4931abd33-tr.step` / `l4931abd33-tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588911853342351360) (32 pp, sha256 `42bf56a6e95ed577`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/l4931abd33-tr-datasheet.pdf)
page.jsonadded+201@@ -0,0 +1,201 @@+{+ "slug": "l4931abd33-tr",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "l4931abd33-tr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "l4931abd33-tr.kicad_sym",+ "l4931abd33-tr.kicad_mod",+ "l4931abd33-tr.glb",+ "l4931abd33-tr.step",+ "l4931abd33-tr.lbr",+ "docs/hero.png",+ "docs/l4931abd33-tr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "l4931abd33-tr-hero.glb",+ "l4931abd33-tr-hero.overlay.json"+ ],+ "component": {+ "mpn": "L4931ABD33-TR",+ "manufacturer": "STMicroelectronics",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Power Management (PMIC)",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588911853342351360",+ "parts": {+ "symbol": "l4931abd33-tr.kicad_sym",+ "footprint": "l4931abd33-tr.kicad_mod",+ "model_3d": "l4931abd33-tr-hero.glb",+ "model_3d_plain": "l4931abd33-tr.glb",+ "model_3d_step": "l4931abd33-tr-etched.step",+ "model_3d_step_plain": "l4931abd33-tr.step",+ "lbr": "l4931abd33-tr.lbr"+ },+ "distributor_links": {+ "lcsc": "C443844",+ "digikey": "497-1155-2-ND",+ "mouser": "511-L4931ABD33-TR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T01:12:37Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-1155-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-L4931ABD33-TR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VOUT",+ "type": "power_out",+ "description": "Regulated 3.3 V output (L4931ABD33) delivering up to 250 mA, needing a 2 to 10 µF output capacitor with ESR 0.1 to 10 Ω for stability."+ },+ {+ "number": "2",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin, connected internally to the other GND pins (3, 6, 7)."+ },+ {+ "number": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin, connected internally to the other GND pins (2, 6, 7)."+ },+ {+ "number": "4",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection."+ },+ {+ "number": "5",+ "name": "INHIBIT",+ "type": "input",+ "description": "TTL-compatible logic shutdown control input; logic low of 0.8 V max enables the regulator, logic high of 2 V min turns it OFF (about 50 µA typ. in OFF mode)."+ },+ {+ "number": "6",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin, connected internally to the other GND pins (2, 3, 7)."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin, connected internally to the other GND pins (2, 3, 6)."+ },+ {+ "number": "8",+ "name": "VIN",+ "type": "power_in",+ "description": "Regulator input supply, with operating input voltage up to 20 V (absolute maximum DC input 20 V), decoupled with a 0.1 µF input capacitor in the test circuit."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-sonnet-5-5",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin 5 INHIBIT polarity is inferred from the VIL/VIH control input specs (low = on, high = off); the ; Datasheet figure shows the SO-8 GND pins (2, 3, 6, 7) without describing them further; the statement",+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 32,+ "cost_usd": 0.3978,+ "at": "2026-10-08T01:12:21"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588911853342351360",+ "pages": 32,+ "sha256": "42bf56a6e95ed577",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "l4931abd33-tr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "l4931abd33-tr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "abd02aaf693a5b603181d15947bd1edcf322227c628d742f70529ebe943ce781",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}