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Set visibility: public

Ray ·28467384b1 · ·parent a6e5d5c
1 file changed +6−3
page.json+6−3
@@ -56,13 +56,13 @@         "number": "5",         "name": "RST",         "type": "input",-        "description": "Active-low reset / chip-enable input (labeled with overline on datasheet). Must be driven high to initiate any data transfer and held high for the entire transaction; a low level aborts the transfer and forces the I/O pin to high-impedance. TTL-compatible (VIH \u2265 2.0 V, VIL \u2264 +0.8 V at VCC=5 V)."+        "description": "Active-low reset / chip-enable input (labeled with overline on datasheet). Must be driven high to initiate any data transfer and held high for the entire transaction; a low level aborts the transfer and forces the I/O pin to high-impedance. TTL-compatible (VIH ≥ 2.0 V, VIL ≤ +0.8 V at VCC=5 V)."       },       {         "number": "6",         "name": "I/O",         "type": "bidirectional",-        "description": "Serial data input/output pin of the 3-wire interface. Data is clocked in on the rising edge of SCLK and clocked out on the falling edge. Pin goes to high-impedance when RST is low. I/O capacitance is 15 pF typical; leakage up to 500 \u00b5A."+        "description": "Serial data input/output pin of the 3-wire interface. Data is clocked in on the rising edge of SCLK and clocked out on the falling edge. Pin goes to high-impedance when RST is low. I/O capacitance is 15 pF typical; leakage up to 500 µA."       },       {         "number": "7",@@ -138,5 +138,8 @@     "docs/jsm1302z-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file