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docs/HERO.mdadded+8
@@ -0,0 +1,8 @@+Generate `hero.png` for this folder in Hero Studio. It is the page-header image, reused on the homepage and the screensaver; the page overlays live stats on its lower third, so the image carries the title and artwork only.++New app/skill heroes MUST come from Hero Studio (the server rejects anything else with HERO_STUDIO_REQUIRED; the studio stamps provenance into the PNG and exports at 2000x1250):++1. `adom-wiki pkg install adom/hero-studio`+2. start it (`hero-studio`, port 8846) and open the webview so the human sees it+3. pose the hero (the UI, or POST /state), then Generate+4. copy `generated/latest.png` here as `docs/hero.png`
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package.jsonadded+20
@@ -0,0 +1,20 @@+{+  "slug": "jon-chung-nameplate",+  "title": "Jon Chung \u2014 Adom Molecule LED Nameplate",+  "type": "component",+  "version": "0.1.0",+  "description": "Describe jon-chung-nameplate: what it does, who it is for, and how to use it.",+  "tags": [+    "molecule",+    "nameplate",+    "led",+    "tscircuit",+    "soldermask",+    "pcb-art"+  ],+  "dependencies": {},+  "hero": {+    "path": "docs/hero.png"+  },+  "brief": "Jon Chung's name etched out of the soldermask over the top-layer ground plane, lit by side-view LEDs firing inward across the board. A real Adom molecule: large machine pins on the 32 mm base-scaffold grid, USB-C powered. Every LED returns its current through the letters \u2014 there is no second ground path."+}\ No newline at end of file
plan.mdadded+47
@@ -0,0 +1,47 @@+# Jon Chung nameplate: design brief++## Intent++A desk nameplate for Jon Chung that is also a legitimate Adom molecule: it mounts+in a probing workcell on the 32 mm base-scaffold grid, and it makes one idea+physical  **the name is the ground plane**.++## Hard constraints++1. Name in Familjen Grotesk Bold (Adom brand headline face), 40 mm ink height,+   width free to follow.+2. The name is a **soldermask opening over a rectangular GND copper pour**, not+   silkscreen and not letter-shaped copper.+3. **No second ground path.** Every LED returns through the letters. This is+   the whole point and must not be traded away for routing convenience.+4. Large machine pin at each corner, pin box an exact multiple of 32 mm.+5. Board hugs the pins minimal wings.+6. Side-view (not top-view, not reverse-mount) LEDs at the edges firing inward.+7. USB-C on an edge, mouth clear of the board edge, all four anchors present.+8. **Top-side placement only** single-sided PnP.++## Resulting geometry++- Board 268 x 76 mm; pin box 256 x 64 mm (8 x 2 on the grid)+- Name 209.2 x 40 mm, 478 mask-opening polygons+- 15 LEDs at 12 mA = 180 mA total++## Things that bit, so they do not bite again++- The autorouter solves `to="net.GND"` as a spanning tree and will daisy-chain+  LED cathodes to each other, routing return current *around* the plate and+  silently dropping a device. Fix: size the pour to contain every ground pad so+  ground bonds by geometry.+- `adom-tsci lint` counts `pcb_trace` objects and cannot see a pad that is+  bonded by nothing. `scripts/check-connectivity.mjs` is the real gate.+- A via whose *centre* lands inside an SMD pad raises `pcb_placement_error` and+  tscircuit then **skips autorouting for the whole board** while still exiting+  0. Keep via centres outside pads; let only the ring overlap.+- The USB-C model's mouth is at local -Y, and `rotationOffset.z: 180` is+  load-bearing. Lint derives the mouth vector from the same assumption, so a+  180 deg error cancels out of the check. Look at the 3D view.+- tscircuit's texture baker does not shade exposed copper, so the name is+  invisible in the 3D tab. A generated gold decal GLB, built from the same+  polygons as the mask openings, makes it visible without touching fab output.++See the `adom-nameplate` skill for the full write-up.
src/Nameplate.tsxadded+352
@@ -0,0 +1,352 @@+/**+ * The parametric Adom molecule nameplate.+ *+ * Give it a name's polygon geometry and it sizes and builds the whole board.+ * `boards/<slug>/index.tsx` is a five-line entrypoint; everything real is here+ * so a fix lands on every nameplate at once.+ *+ * ── The one idea ──────────────────────────────────────────────────────────+ *+ * The name IS the ground plane. A rectangular GND copper pour covers the top+ * layer and the soldermask is etched away in the shape of the name, so bare+ * plated copper shows through. There is deliberately NO second ground path —+ * no bottom ground pour — so every LED's return current physically crosses+ * the letters. "Your name is part of the electrical path that lights up the+ * LEDs" is a statement about the netlist, not a slogan. Do not add a bottom+ * ground pour "for good measure"; it would quietly make the claim false.+ *+ * ── Molecule rules (adom/molecule-design-guide, adom/base-scaffold-system) ─+ *+ *   - a large machine pin at every corner+ *   - pin box spans are exact multiples of 32 mm, the base scaffold's+ *     large-contact pitch (18 x 18 field over 576 x 576 mm)+ *   - minimal wings: WING mm from corner pin to board edge+ *   - the lower-left corner pin is the conventional molecule XY origin; the+ *     board is drawn about its centre, so that origin is (-PIN_X, -PIN_Y)+ *+ * Assembly: EVERYTHING is top side. The line does single-sided PnP, so the+ * bottom carries copper and silkscreen only.+ */++import { MachinePinLargeStandard } from "@tsci/adom-inc.library"+import { SideViewLed } from "./SideViewLed"+import { UsbCReceptacle, usbCPadRowForEdge } from "./UsbCReceptacle"+import { modelUrlFor } from "./model-url"++export type NamePolygon = { x: number; y: number }[]++export interface NameGeometry {+  NAME_TEXT: string+  NAME_INK_WIDTH_MM: number+  NAME_INK_HEIGHT_MM: number+  NAME_POLYGONS: NamePolygon[]+}++/**+ * Board edge to corner pin.+ *+ * Bounded from below by the pin: a 3.45 mm press-fit hole carries a 5.2 mm+ * annular ring, so 2.6 mm of the wing is already pad. 6 mm leaves 3.4 mm of+ * solid laminate outboard of the ring — about 2x board thickness, which is+ * what a press-fit needs so insertion force does not crack the edge out.+ * Do not go below ~5.5.+ */+export const WING = 6+export const SCAFFOLD_PITCH = 32+/** Clear space wanted between the ink and the corner pins, per side. */+const NAME_CLEARANCE = 12+const LED_PITCH = 20+/** 5 V through 150 R into a 3.2 V green side-view LED = 12 mA. */+const LED_SERIES_R = "150"+const R_BEHIND = 4++/** Smallest pin-box half-span, on the 32 mm grid, that clears the ink. */+export const pinXForInk = (inkWidth: number) =>+  (Math.ceil((inkWidth + 2 * NAME_CLEARANCE) / SCAFFOLD_PITCH) * SCAFFOLD_PITCH) / 2++type Led = {+  ref: string+  x: number+  y: number+  rot: 0 | 90 | 180 | 270+  schX: number+  schY: number+}++const rect = (hx: number, hy: number) => [+  { x: -hx, y: -hy },+  { x: hx, y: -hy },+  { x: hx, y: hy },+  { x: -hx, y: hy },+]++export const Nameplate = ({ geometry, slug }: { geometry: NameGeometry; slug: string }) => {+  const modelUrl = modelUrlFor(slug)+  const { NAME_TEXT, NAME_INK_WIDTH_MM, NAME_INK_HEIGHT_MM, NAME_POLYGONS } = geometry++  // ---- sizing, all derived from the ink box ----+  const PIN_X = pinXForInk(NAME_INK_WIDTH_MM)+  const PIN_Y = 32 // 64 mm apart = 2 x 32; fits a 40 mm cap height with room for the LED ring+  const BOARD_W = 2 * (PIN_X + WING)+  const BOARD_H = 2 * (PIN_Y + WING)++  // The plate is sized to physically contain EVERY ground pad, so they bond by+  // geometry and the router never touches the ground net. See the trap note in+  // the skill: left to itself the router solves `to="net.GND"` as a spanning+  // tree, daisy-chains cathode to cathode and routes the return current around+  // the plate instead of through it.+  const PLATE_X = BOARD_W / 2 - 3+  const PLATE_Y = BOARD_H / 2 - 3++  const LED_ROW_Y = 27+  const LED_END_X = PIN_X - 6+  const LED_END_Y = [-14, 14]+  const maxRowX = PIN_X - 22+  const nRow = Math.floor((2 * maxRowX) / LED_PITCH) + 1+  const rowSpan = ((nRow - 1) * LED_PITCH) / 2+  const LED_ROW_X = Array.from({ length: nRow }, (_, i) => -rowSpan + i * LED_PITCH)++  const USB_X = usbCPadRowForEdge(BOARD_W / 2)++  const leds: Led[] = [+    ...LED_ROW_X.map((x, i) => ({+      ref: `D${i + 1}`, x, y: LED_ROW_Y, rot: 180 as const,+      schX: -18 + i * 4, schY: 10,+    })),+    ...LED_END_Y.map((y, i) => ({+      ref: `D${nRow + i + 1}`, x: -LED_END_X, y, rot: 270 as const,+      schX: -18 + i * 4, schY: 2,+    })),+    ...LED_END_Y.map((y, i) => ({+      ref: `D${nRow + 3 + i}`, x: LED_END_X, y, rot: 90 as const,+      schX: -10 + i * 4, schY: 2,+    })),+  ]++  const behind = (led: Led, back: number) => {+    const rad = (led.rot * Math.PI) / 180+    return { x: led.x + back * Math.sin(rad), y: led.y - back * Math.cos(rad) }+  }+  const resistorPos = (led: Led) => behind(led, R_BEHIND)++  /**+   * The +5 V via for a string, placed so its ring OVERLAPS that resistor's+   * pin2 pad rather than sitting near it.+   *+   * Overlap, not proximity. A via is not addressable as a trace endpoint+   * (`to=".V1"` -> "Could not find port") and the router will not route to one,+   * so a via placed a polite 1.5 mm away is dead copper. Same-net copper that+   * physically touches is bonded with no router involvement — the same trick+   * the ground plate uses.+   *+   * But the via CENTRE must stay OUTSIDE the pad. Put it inside and tscircuit+   * raises `pcb_placement_error: Via is inside SMD pad` and then — this is the+   * nasty part — **skips autorouting for the entire board**, so every trace on+   * every net silently disappears. The build still exits 0. Only+   * check-connectivity.mjs catches it.+   *+   * 0402 pin2 centre is 0.51 mm from the part centre and the pad is 0.54 wide,+   * so its outer edge is at 0.78. 0.92 puts the centre 0.14 mm clear of the+   * pad while the 0.6 mm ring still laps 0.16 mm onto it.+   */+  const viaPos = (led: Led) => {+    const rp = resistorPos(led)+    const rad = (led.rot * Math.PI) / 180+    return { x: rp.x + 0.92 * Math.cos(rad), y: rp.y + 0.92 * Math.sin(rad) }+  }++  const Note = (p: { text: string; x: number; y: number; size?: number }) => (+    <silkscreentext text={p.text} pcbX={p.x} pcbY={p.y} fontSize={p.size ?? 1.5} layer="top" />+  )++  return (+    <board+      width={`${BOARD_W}mm`}+      height={`${BOARD_H}mm`}+      layers={2}+      borderRadius="4mm"+      defaultTraceWidth="0.3mm"+      autorouter="auto-local"+    >+      {/* ---- the nameplate: rectangular top-layer GND pour ---- */}+      <copperpour name="NAMEPLATE_GND" layer="top" connectsTo="net.GND"+        outline={rect(PLATE_X, PLATE_Y)} coveredWithSolderMask />++      {/*+        The name, as soldermask openings over that pour. Letters with counters+        are polygons-with-holes, which no PCB primitive expresses, so each is+        ear-clipped into simple polygons whose UNION is the letter; the counters+        are excluded by the decomposition and stay masked. clearance/margins are+        pinned to 0 so abutting pieces stay flush — at the default 0.2 mm each+        piece shrinks away from its neighbours and opens hairline gaps down the+        middle of every stroke.+      */}+      {NAME_POLYGONS.map((points, i) => (+        <copperpour key={i} layer="top" connectsTo="net.GND" outline={points}+          clearance={0} padMargin={0} traceMargin={0} boardEdgeMargin={0}+          coveredWithSolderMask={false} />+      ))}++      {/*+        Render-only decal. tscircuit's texture baker does not give exposed+        copper the bare-metal shading it gives pads — a pour and a polygon pad+        both come out flat pale green — so the name is invisible in the 3D tab+        even though the gerbers are right. This lays the SAME polygons down as+        gold geometry 45 um proud of the mask. No footprint, so no copper, no+        pads, no netlist.++        The component is parked in the bottom margin rather than at the centre+        on purpose: the adom-tsci viewer draws a ghost cuboid for a+        footprint-less part, and at (0,0) that ghost sits square on the letters+        and reads as a mystery component. positionOffset puts the ARTWORK back+        at the centre while the ghost stays out of the way.+      */}+      <chip name="ART1" pcbX={0} pcbY={-(PLATE_Y - 2.5)} schX={-30} schY={-20}+        cadModel={{ glbUrl: modelUrl("nameplate.glb"),+                    positionOffset: { x: 0, y: PLATE_Y - 2.5, z: 0 } }}+        footprint={<footprint />} />++      {/* ---- +5 V lives on the bottom layer ---- */}+      <copperpour name="VBUS_PLANE" layer="bottom" connectsTo="net.V5"+        outline={rect(BOARD_W / 2 - 2, BOARD_H / 2 - 2)} coveredWithSolderMask />++      {/* ---- corner machine pins, on the 32 mm base-scaffold grid ---- */}+      <MachinePinLargeStandard name="MP1" pcbX={-PIN_X} pcbY={-PIN_Y} schX={-30} schY={-12} />+      <MachinePinLargeStandard name="MP2" pcbX={PIN_X} pcbY={-PIN_Y} schX={-24} schY={-12} />+      <MachinePinLargeStandard name="MP3" pcbX={PIN_X} pcbY={PIN_Y} schX={-18} schY={-12} />+      <MachinePinLargeStandard name="MP4" pcbX={-PIN_X} pcbY={PIN_Y} schX={-12} schY={-12} />++      {/* ---- USB-C, east edge ---- */}+      <UsbCReceptacle name="J1" pcbX={USB_X} pcbY={0} pcbRotation={90} schX={12} schY={-12} />++      {/* Rd on both CC lines — without these a charger never enables VBUS. */}+      <resistor name="R_CC1" resistance="4.7k" footprint="0402"+        pcbX={USB_X - 5} pcbY={8} schX={22} schY={-10} />+      <resistor name="R_CC2" resistance="4.7k" footprint="0402"+        pcbX={USB_X - 5} pcbY={-8} schX={26} schY={-10} />+      <capacitor name="C1" capacitance="10uF" footprint="0603"+        pcbX={USB_X - 9.5} pcbY={6} schX={22} schY={-16} />+      <capacitor name="C2" capacitance="100nF" footprint="0402"+        pcbX={USB_X - 9.5} pcbY={-6} schX={26} schY={-16} />+      {/* Same overlap trick as the LED strings, for the connector end's +5 V+          group. pin1 of a cap sits at (pitch/2) from centre and its pad is+          `w` wide, so the pad's outer edge is at pitch/2 + w/2; putting the via+          centre 0.15 mm inside that edge guarantees a solid ring-on-pad bond+          whatever the package. */}+      {/* Same rule: centre 0.13 mm OUTSIDE the cap's pin1 outer edge, ring+          lapping onto it. 0603 pin1 edge = 0.825 + 0.4; 0402 = 0.51 + 0.27. */}+      <via name="VIA_VBUS1" pcbX={USB_X - 9.5 - (0.825 + 0.4 + 0.13)} pcbY={6}+        holeDiameter="0.3mm" outerDiameter="0.6mm" connectsTo="net.V5" />+      <via name="VIA_VBUS2" pcbX={USB_X - 9.5 - (0.51 + 0.27 + 0.13)} pcbY={-6}+        holeDiameter="0.3mm" outerDiameter="0.6mm" connectsTo="net.V5" />++      {/* ---- LED ring + series resistors, all top side ---- */}+      {leds.map((led) => (+        <SideViewLed key={led.ref} name={led.ref} pcbX={led.x} pcbY={led.y}+          pcbRotation={led.rot} schX={led.schX} schY={led.schY}+          glbUrl={modelUrl("side-view-led.glb")} />+      ))}+      {leds.map((led, i) => {+        const rp = resistorPos(led)+        return (+          <resistor key={`R${i + 1}`} name={`R${i + 1}`} resistance={LED_SERIES_R}+            footprint="0402" pcbX={rp.x} pcbY={rp.y} pcbRotation={led.rot}+            schX={led.schX} schY={led.schY - 2} />+        )+      })}+      {leds.map((led, i) => {+        const v = viaPos(led)+        return (+          <via key={`v${i}`} name={`VIA${i + 1}`} pcbX={v.x} pcbY={v.y}+            holeDiameter="0.3mm" outerDiameter="0.6mm" connectsTo="net.V5" />+        )+      })}++      {/* Per-LED silkscreen: refdes plus which way its beam actually points. */}+      {leds.map((led) => {+        const aim = led.rot === 180 ? "v" : led.rot === 0 ? "^" : led.rot === 90 ? "<" : ">"+        const t = behind(led, -2.4)+        return (+          <silkscreentext key={`s${led.ref}`} layer="top" pcbX={t.x} pcbY={t.y}+            fontSize={1.1} text={`${led.ref}${aim}`} />+        )+      })}+      {leds.map((led, i) => {+        const rp = behind(led, R_BEHIND + 2.3)+        return (+          <silkscreentext key={`sr${i}`} layer="top" pcbX={rp.x} pcbY={rp.y}+            fontSize={1.1} text={`R${i + 1} 150R`} />+        )+      })}++      {/* ---- nets ---- */}+      {leds.map((led, i) => (+        <trace key={`ta${i}`} name={`T_${led.ref}_A`}+          from={`.${led.ref} > .anode`} to={`.R${i + 1} > .pin1`} />+      ))}+      {leds.map((led, i) => (+        <trace key={`tk${i}`} name={`T_${led.ref}_K`} from={`.${led.ref} > .cathode`} to="net.GND" />+      ))}+      {leds.map((_, i) => (+        <trace key={`tr${i}`} name={`T_R${i + 1}`} from={`.R${i + 1} > .pin2`} to="net.V5" />+      ))}++      {/* Aim VBUS at the bulk cap's pad, not at "net.V5". Given a net the+          router is free to satisfy it by hopping to the nearest same-net pad —+          here it just bonded adjacent VBUS pads to each other and stopped,+          leaving the connector islanded off the rest of +5 V. A concrete+          pad-to-pad target is also the physically right answer: bulk goes+          straight to the connector. */}+      <trace name="T_VBUS1" from=".J1 > .VBUS1" to=".C1 > .pin1" />+      <trace name="T_VBUS2" from=".J1 > .VBUS2" to=".C2 > .pin1" />+      <trace name="T_GND1" from=".J1 > .GND1" to="net.GND" />+      <trace name="T_GND2" from=".J1 > .GND2" to="net.GND" />+      {/* VBUS1/2 and GND1/2 each land on two pads; the label selector resolves+          only one, so the second is wired by its A/B alias — otherwise the pour+          treats it as foreign copper and rings it instead of bonding it. */}+      <trace name="T_VBUS1B" from=".J1 > .A9" to=".C1 > .pin1" />+      <trace name="T_VBUS2B" from=".J1 > .B4" to=".C2 > .pin1" />+      <trace name="T_GND1B" from=".J1 > .A12" to="net.GND" />+      <trace name="T_GND2B" from=".J1 > .B1" to="net.GND" />+      <trace name="T_CC1A" from=".J1 > .CC1" to=".R_CC1 > .pin1" />+      <trace name="T_CC1B" from=".R_CC1 > .pin2" to="net.GND" />+      <trace name="T_CC2A" from=".J1 > .CC2" to=".R_CC2 > .pin1" />+      <trace name="T_CC2B" from=".R_CC2 > .pin2" to="net.GND" />+      <trace name="T_C1P" from=".C1 > .pin1" to="net.V5" />+      <trace name="T_C1N" from=".C1 > .pin2" to="net.GND" />+      <trace name="T_C2P" from=".C2 > .pin1" to="net.V5" />+      <trace name="T_C2N" from=".C2 > .pin2" to="net.GND" />+      <trace name="T_MP1" from=".MP1 > .pin1" to="net.GND" />+      <trace name="T_MP4" from=".MP4 > .pin1" to="net.GND" />+      <trace name="T_MP2" from=".MP2 > .pin1" to="net.V5" />+      <trace name="T_MP3" from=".MP3 > .pin1" to="net.V5" />++      {/* ---- silkscreen: say what each thing is and what it does ---- */}+      <Note text="WURTH WL-SMSW 155060GS75300 SIDE-VIEW LED — THE BEAM LEAVES THE PACKAGE SIDEWAYS AND GRAZES THE NAME" x={0} y={34.4} size={1.4} />+      <Note text="EACH LED: 150R TO 12mA, THEN A VIA DOWN TO THE +5V PLANE ON THE BACK" x={0} y={-34.4} size={1.4} />+      <Note text={`MP4 GND · LARGE MACHINE PIN · ${SCAFFOLD_PITCH}mm GRID`} x={-PIN_X + 42} y={23.5} size={1.2} />+      <Note text={`MP3 +5V · LARGE MACHINE PIN · ${SCAFFOLD_PITCH}mm GRID`} x={PIN_X - 42} y={23.5} size={1.2} />+      <Note text="MP1 GND" x={-PIN_X + 8} y={-24} size={1.2} />+      <Note text="MP2 +5V" x={PIN_X - 8} y={-24} size={1.2} />+      <Note text="J1 USB-C 5V IN" x={PIN_X - 10} y={-19} size={1.2} />+      <Note text="R_CC1/2 4K7 Rd — TELLS THE CHARGER TO ENABLE VBUS" x={PIN_X - 46} y={-21.5} size={1.2} />+      <Note text="C1 10uF BULK · C2 100nF HF" x={PIN_X - 34} y={-24.5} size={1.2} />+      <Note text={`${NAME_TEXT.toUpperCase()} IS A SOLDERMASK OPENING OVER THE TOP-LAYER GND PLANE —`} x={-26} y={20.5} size={1.4} />+      <Note text="EVERY LED RETURNS ITS CURRENT THROUGH THESE LETTERS. NO SECOND GROUND PATH." x={-22} y={-20.5} size={1.4} />++      {/* ---- back side: build block ---- */}+      <silkscreentext layer="bottom" pcbX={0} pcbY={12} fontSize={2.6}+        text={`ADOM MOLECULE NAMEPLATE — ${NAME_TEXT.toUpperCase()}`} />+      <silkscreentext layer="bottom" pcbX={0} pcbY={7} fontSize={1.7}+        text={`${NAME_INK_WIDTH_MM.toFixed(0)} x ${NAME_INK_HEIGHT_MM} mm · FAMILJEN GROTESK BOLD · BARE ENIG COPPER`} />+      <silkscreentext layer="bottom" pcbX={0} pcbY={2} fontSize={1.7}+        text={`${2 * PIN_X} x ${2 * PIN_Y} mm PIN BOX · ${SCAFFOLD_PITCH}mm BASE SCAFFOLD GRID · 4x LARGE MACHINE PIN`} />+      <silkscreentext layer="bottom" pcbX={0} pcbY={-3} fontSize={1.7}+        text="TOP = GND PLANE (THE NAME) · BOTTOM = +5V PLANE · TOP-SIDE PnP ONLY" />+      <silkscreentext layer="bottom" pcbX={0} pcbY={-8} fontSize={1.7}+        text={`${leds.length}x SIDE-VIEW LED @ 12mA = ${leds.length * 12}mA · USB-C 5V OR MP2/MP3 FROM THE SCAFFOLD`} />+      <silkscreentext layer="bottom" pcbX={0} pcbY={-13} fontSize={1.7}+        text="SPECIFY ENIG — THE LETTERS ARE BARE COPPER AND HASL WILL LEAVE THEM LUMPY" />+    </board>+  )+}
src/SideViewLed.tsxadded+103
@@ -0,0 +1,103 @@+/**+ * Würth Elektronik WL-SMSW 155060GS75300 — SMT mono-colour SIDE VIEW LED.+ *+ * This is the part that makes the nameplate work. A normal 0603 chip LED is a+ * top-view emitter: it fires straight up, away from the board, and the copper+ * you are trying to light up sees nothing. A side-view (right-angle) LED puts+ * the die on its side behind a window in the long face of the package, so the+ * beam leaves PARALLEL to the board surface, ~0.5 mm above the soldermask.+ * Ring the board with them facing inward and the light rakes across the+ * nameplate at a grazing angle instead of escaping to the sky.+ *+ * Package  1.6 × 0.8 × 1.1 mm ("0603 rectangular"), window on a 1.6 × 1.1 face+ * Land     2 pads, 0.6 mm × 0.8 mm, 1.4 mm pitch (2.0 mm overall span)+ * Optical  515 nm peak / 525 nm dominant, 260–560 mcd @ 20 mA, 140° 2θ½+ * Electric VF 3.2 V typ (3.5 max) @ 20 mA, IF 20 mA cont, 30 mA peak+ *+ * Local frame: pads run along X, the emitting window faces local +Y.+ * So pcbRotation aims the beam:  0° → north, 90° → west, 180° → south,+ * 270° → east.+ */++export const SIDE_VIEW_LED_MPN = "155060GS75300"++export const SideViewLed = ({+  name,+  pcbX,+  pcbY,+  pcbRotation = 0,+  schX,+  schY,+  glbUrl,+}: {+  name: string+  pcbX: number+  pcbY: number+  /** Direction the light is thrown, in degrees CCW from north. */+  pcbRotation?: 0 | 90 | 180 | 270+  schX?: number+  schY?: number+  /** Absolute URL of side-view-led.glb for this board. */+  glbUrl: string+}) => (+  <led+    name={name}+    color="green"+    pcbX={pcbX}+    pcbY={pcbY}+    pcbRotation={pcbRotation}+    schX={schX}+    schY={schY}+    manufacturerPartNumber={SIDE_VIEW_LED_MPN}+    // No vendor ships a cadModel for this part, so tscircuit draws nothing+    // on its pads. scripts/gen-models.py builds one: package body plus a+    // translucent cone at the datasheet 140 deg spread, so the 3D view+    // shows WHERE the light actually goes. Model origin is the footprint+    // centre and +Y is the emitting face, matching the footprint below, so+    // pcbRotation carries body and beam together with no positionOffset to+    // drift.+    cadModel={{ glbUrl }}+    footprint={+      <footprint>+        {/* Würth pin 2 = anode. */}+        <smtpad+          portHints={["pin1", "anode", "pos"]}+          shape="rect"+          width="0.6mm"+          height="0.8mm"+          pcbX="0.7mm"+          pcbY="0mm"+        />+        {/* Würth pin 1 = cathode, marked on the package. */}+        <smtpad+          portHints={["pin2", "cathode", "neg"]}+          shape="rect"+          width="0.6mm"+          height="0.8mm"+          pcbX="-0.7mm"+          pcbY="0mm"+        />+        {/* Body outline, with the emitting window on the +Y face. */}+        <silkscreenpath+          route={[+            { x: -0.8, y: -0.4 },+            { x: 0.8, y: -0.4 },+            { x: 0.8, y: 0.4 },+            { x: -0.8, y: 0.4 },+            { x: -0.8, y: -0.4 },+          ]}+        />+        {/* Cathode bar. tscircuit's <led> calls pin1 the anode while Würth+            calls pin 1 the cathode, so the pad-to-package mapping is inverted+            on purpose above. Without a mark on the board an assembler has no+            way to see which end is which — draw it. */}+        <silkscreenpath+          route={[+            { x: -1.05, y: -0.5 },+            { x: -1.05, y: 0.5 },+          ]}+        />+      </footprint>+    }+  />+)
src/UsbCReceptacle.tsxadded+197
@@ -0,0 +1,197 @@+/**+ * TYPE-C-31-M-12 USB-C receptacle (JLCPCB C165948).+ *+ * ── Why the geometry below is what it is ──────────────────────────────────+ *+ * Every constant here was measured off the actual model+ * (modelcdn easyeda C165948, 7872 verts) rather than assumed, because the+ * assumed version renders wrong in a way that still passes lint.+ *+ * Raw model bounding box, in model units (mm):+ *     x  -4.470 .. +4.470     8.94 mm wide  (across the connector)+ *     y  -5.300 .. +2.600     7.90 mm deep  (mouth to back)+ *     z  -0.850 .. +3.250     legs below board, shell 3.25 mm proud+ *+ * The `rotationOffset.z: 180` that the registry packages ship is NOT+ * decoration — it is what aligns the model with this footprint. Reconstructing+ * the registry placement shows the model's raw −5.3 face is the BACK (the end+ * the SMT pads protrude from) and the raw +2.6 face is the MOUTH; the 180°+ * flip puts the mouth at −Y in the footprint's frame. The footprint agrees:+ * its mechanical holes sit at y = −1.04, −1.27 and −5.22 relative to the pad+ * row, i.e. on the −Y side, which is only physically possible if the shell —+ * and therefore the mouth — is also on the −Y side. Anchor legs live inside+ * the shell, never behind it.+ *+ * Drop the 180° and keep the native hole positions and you get a board where+ * the body floats forward of its own pads while the anchors trail out the+ * back. `adom-tsci lint` does not catch this: it derives the mouth vector from+ * `cad.rotation.z` using the same +Y assumption, so a 180° error cancels out+ * of the check and reports a healthy `body_fwd`. Look at the 3D view.+ *+ * ── Placement ─────────────────────────────────────────────────────────────+ *+ * Relative to the pad row, the shell spans +0.06 (back, overlapping the pads+ * slightly) to −7.84 (mouth), and the forward anchor pair sits at −5.22, i.e.+ * 2.6 mm behind the mouth. That last number is the real constraint on how far+ * the connector can hang off the board: overhang the mouth by the ~2.5 mm+ * quoted for a pads-only footprint and the forward anchors land ON the board+ * edge. With the anchors included the honest maximum is well under 1 mm —+ * flush-to-slightly-proud, which is all the mechanical spec asks for anyway.+ */++const USB_C_PN = "C165948"+const USB_C_UUID = "2a4bc2358b36497d9ab2a66ab6419ba3"++/** Model origin -> pad row, along the mouth axis. See the derivation above. */+const BODY_FORWARD_MAG = 2.5034++/** Shell front face, measured forward from the pad row. */+export const USB_C_MOUTH_FROM_PADS = 7.84+/** Forward anchor centre, measured forward from the pad row. */+export const USB_C_FRONT_ANCHOR_FROM_PADS = 5.2232+/** Half-length of the forward anchor pill along the mouth axis. */+export const USB_C_FRONT_ANCHOR_HALF = 0.9++/**+ * Where to put `pcbX`/`pcbY` (the pad row) so the mouth ends up `proud` mm+ * past a board edge that sits `edge` mm from the origin.+ */+export const usbCPadRowForEdge = (edge: number, proud = 0.35) =>+  edge + proud - USB_C_MOUTH_FROM_PADS++const pinLabels = {+  pin1: ["GND1", "A1"],+  pin2: ["GND2", "B12"],+  pin3: ["VBUS1", "A4"],+  pin4: ["VBUS2", "B9"],+  pin5: ["SBU2", "B8"],+  pin6: ["CC1", "A5"],+  pin7: ["DM2", "B7"],+  pin8: ["DP1", "A6"],+  pin9: ["DM1", "A7"],+  pin10: ["DP2", "B6"],+  pin11: ["SBU1", "A8"],+  pin12: ["CC2", "B5"],+  pin13: ["VBUS1", "A9"],+  pin14: ["VBUS2", "B4"],+  pin15: ["GND1", "A12"],+  pin16: ["GND2", "B1"],+} as const++// 16 SMT pads, 0.5 mm pitch, pad row pinned to y = 0.+const PADS: Array<{ port: string; x: number }> = [+  { port: "A1", x: -3.35 },+  { port: "B12", x: -3.05 },+  { port: "A4", x: -2.55 },+  { port: "B9", x: -2.25 },+  { port: "B8", x: -1.75 },+  { port: "A5", x: -1.25 },+  { port: "B7", x: -0.75 },+  { port: "A6", x: -0.25 },+  { port: "A7", x: 0.25 },+  { port: "B6", x: 0.75 },+  { port: "A8", x: 1.25 },+  { port: "B5", x: 1.75 },+  { port: "B4", x: 2.25 },+  { port: "A9", x: 2.55 },+  { port: "B1", x: 3.05 },+  { port: "A12", x: 3.35 },+]++// Mechanical holes. y is measured from the pad row, negative = toward the+// mouth, so all of these sit under the shell.+const PLATED_ANCHORS = [+  { port: "alt_0", x: -4.3251, y: -1.0434, outerH: 2.0, innerH: 1.6 },+  { port: "alt_1", x: 4.3251, y: -1.0434, outerH: 2.0, innerH: 1.6 },+  { port: "alt_3", x: -4.3251, y: -5.2232, outerH: 1.8, innerH: 1.4 },+  { port: "alt_2", x: 4.3251, y: -5.2232, outerH: 1.8, innerH: 1.4 },+]+const SUPPORT_HOLES = [+  { x: -2.8999, y: -1.2685 },+  { x: 2.8999, y: -1.2685 },+]++export const UsbCReceptacle = ({+  name,+  pcbX,+  pcbY,+  pcbRotation = 0,+  schX,+  schY,+  schRotation,+}: {+  name: string+  /** Position of the PAD ROW, not the shell. Use `usbCPadRowForEdge`. */+  pcbX: number+  pcbY: number+  /** 0 fires the mouth south, 90 east, 180 north, 270 west. */+  pcbRotation?: 0 | 90 | 180 | 270+  schX?: number+  schY?: number+  schRotation?: number+}) => {+  // Mouth is local −Y. Rotating (0,−1) by pcbRotation CCW gives the world+  // mouth vector; positionOffset is expressed along that same vector so the+  // body tracks the footprint through every rotation instead of drifting+  // (tscircuit applies positionOffset in world coords, not local).+  const rad = (pcbRotation * Math.PI) / 180+  const mouthX = Math.sin(rad)+  const mouthY = -Math.cos(rad)++  return (+    <chip+      name={name}+      pcbX={pcbX}+      pcbY={pcbY}+      pcbRotation={pcbRotation}+      schX={schX}+      schY={schY}+      schRotation={schRotation}+      supplierPartNumbers={{ jlcpcb: [USB_C_PN] }}+      manufacturerPartNumber="TYPE-C-31-M-12"+      pinLabels={pinLabels as any}+      cadModel={{+        objUrl: `https://modelcdn.tscircuit.com/easyeda_models/download?uuid=${USB_C_UUID}&pn=${USB_C_PN}`,+        // 180° is load-bearing: it aligns the model's mouth with the −Y mouth+        // this footprint's hole positions imply. Do not "simplify" it away.+        rotationOffset: { x: 0, y: 0, z: 180 },+        positionOffset: {+          x: BODY_FORWARD_MAG * mouthX,+          y: BODY_FORWARD_MAG * mouthY,+          z: 0,+        },+      }}+      footprint={+        <footprint>+          {PADS.map((p) => (+            <smtpad+              key={p.port}+              portHints={[p.port]}+              shape="rect"+              width="0.3mm"+              height="1.3mm"+              pcbX={`${p.x}mm`}+              pcbY="0mm"+            />+          ))}+          {PLATED_ANCHORS.map((h) => (+            <platedhole+              key={h.port}+              portHints={[h.port]}+              shape="pill"+              pcbX={`${h.x}mm`}+              pcbY={`${h.y}mm`}+              outerWidth="1.2mm"+              outerHeight={`${h.outerH}mm`}+              innerWidth="0.8mm"+              innerHeight={`${h.innerH}mm`}+            />+          ))}+          {SUPPORT_HOLES.map((h, i) => (+            <hole key={i} pcbX={`${h.x}mm`} pcbY={`${h.y}mm`} diameter="0.75mm" />+          ))}+        </footprint>+      }+    />+  )+}
src/index.tsxadded+8
@@ -0,0 +1,8 @@+/**+ * Jon Chung — an Adom molecule LED nameplate.+ * Generated by scripts/make-nameplate.sh; everything real is in lib/Nameplate.tsx.+ */+import { Nameplate } from "../../lib/Nameplate"+import * as geometry from "./name-geometry"++export default () => <Nameplate geometry={geometry} slug="jon-chung" />
src/model-url.tsadded+20
@@ -0,0 +1,20 @@+/**+ * Where a board's generated GLBs live.+ *+ * tscircuit's GLB loader FETCHES `glbUrl` — it does not read it off disk — so a+ * relative path like "models/x.glb" 404s at build time and the part silently+ * falls back to a plain box. The URL has to be absolute.+ *+ * Default: a file:// URL under the board's own directory, so a fresh clone+ * builds with no network after `scripts/make-nameplate.sh`.+ *+ * Override with ADOM_NAMEPLATE_MODEL_BASE to point at hosted copies (each+ * board's wiki page serves both models) when building somewhere the files are+ * not on disk.+ */+const cwd = typeof process !== "undefined" ? process.cwd() : "."++export const modelUrlFor = (slug: string) => (file: string) =>+  process?.env?.ADOM_NAMEPLATE_MODEL_BASE+    ? `${process.env.ADOM_NAMEPLATE_MODEL_BASE}/${slug}/${file}`+    : `file://${cwd}/boards/${slug}/models/${file}`
src/name-geometry.tsadded+514
@@ -0,0 +1,514 @@+// GENERATED by scripts/gen-name-geometry.py — do not edit by hand.+//+// "Jon Chung" set in Familjen Grotesk Bold (700), the Adom brand headline face.+// Ink height 40.0 mm, ink width 209.18 mm.+// Each letter is decomposed into simple polygons whose UNION is the letter;+// counters (the holes in a/e/e/d) are excluded by the decomposition, so they+// stay covered in soldermask. Coordinates are mm, origin = centre of the name.++export type NamePolygon = { x: number; y: number }[]++export const NAME_TEXT = "Jon Chung"+export const NAME_INK_HEIGHT_MM = 40.0+export const NAME_INK_WIDTH_MM = 209.182++export const NAME_LETTERS: { char: string; shapes: NamePolygon[] }[] = [+  { char: "J", shapes: [+    [{x:-104.5912,y:-17.202}, {x:-104.5912,y:-17.4384}, {x:-97.4975,y:-17.4384}, {x:-104.3831,y:-16.8952}],+    [{x:-96.2676,y:-15.1887}, {x:-95.219,y:-12.2647}, {x:-101.2076,y:-6.7496}, {x:-101.2243,y:-7.3838}, {x:-97.4975,y:-17.4384}, {x:-97.3403,y:-17.181}, {x:-97.1841,y:-16.9169}, {x:-97.029,y:-16.6459}, {x:-96.8747,y:-16.3681}, {x:-96.7214,y:-16.0834}, {x:-96.5692,y:-15.792}, {x:-96.4178,y:-15.4938}],+    [{x:-95.219,y:-12.2647}, {x:-96.2676,y:-15.1887}, {x:-96.1181,y:-14.8768}, {x:-95.9722,y:-14.5533}, {x:-95.8321,y:-14.2132}, {x:-95.6978,y:-13.8566}, {x:-95.5693,y:-13.4834}, {x:-95.4468,y:-13.0937}, {x:-95.33,y:-12.6875}],+    [{x:-94.6294,y:-8.0941}, {x:-101.2076,y:-6.7496}, {x:-95.219,y:-12.2647}, {x:-95.114,y:-11.8253}, {x:-95.0147,y:-11.3695}, {x:-94.9238,y:-10.8917}, {x:-94.8434,y:-10.3867}, {x:-94.7739,y:-9.8544}, {x:-94.715,y:-9.2949}, {x:-94.6668,y:-8.7081}],+    [{x:-101.2076,y:-6.7496}, {x:-94.6294,y:-8.0941}, {x:-94.6026,y:-7.4529}, {x:-94.5866,y:-6.7844}, {x:-94.5812,y:-6.0887}, {x:-94.5812,y:19.2118}, {x:-101.202,y:-6.0887}],+    [{x:-94.5812,y:19.2118}, {x:-101.202,y:19.2118}, {x:-101.202,y:-6.0887}],+    [{x:-104.1794,y:-16.588}, {x:-104.3831,y:-16.8952}, {x:-97.4975,y:-17.4384}],+    [{x:-103.9802,y:-16.2802}, {x:-104.1794,y:-16.588}, {x:-97.4975,y:-17.4384}],+    [{x:-103.7854,y:-15.972}, {x:-103.9802,y:-16.2802}, {x:-97.4975,y:-17.4384}],+    [{x:-103.595,y:-15.6633}, {x:-103.7854,y:-15.972}, {x:-97.4975,y:-17.4384}],+    [{x:-103.4088,y:-15.3541}, {x:-103.595,y:-15.6633}, {x:-97.4975,y:-17.4384}],+    [{x:-97.4975,y:-17.4384}, {x:-101.2243,y:-7.3838}, {x:-101.2522,y:-7.9912}],+    [{x:-103.2272,y:-15.0445}, {x:-103.4088,y:-15.3541}, {x:-97.4975,y:-17.4384}],+    [{x:-97.4975,y:-17.4384}, {x:-101.2522,y:-7.9912}, {x:-101.2914,y:-8.5719}],+    [{x:-103.0497,y:-14.7343}, {x:-103.2272,y:-15.0445}, {x:-97.4975,y:-17.4384}],+    [{x:-97.4975,y:-17.4384}, {x:-101.2914,y:-8.5719}, {x:-101.3418,y:-9.1258}],+    [{x:-102.8768,y:-14.4236}, {x:-103.0497,y:-14.7343}, {x:-97.4975,y:-17.4384}],+    [{x:-97.4975,y:-17.4384}, {x:-101.3418,y:-9.1258}, {x:-101.4033,y:-9.653}],+    [{x:-102.7099,y:-14.1059}, {x:-102.8768,y:-14.4236}, {x:-97.4975,y:-17.4384}],+    [{x:-97.4975,y:-17.4384}, {x:-101.4033,y:-9.653}, {x:-101.476,y:-10.1534}],+    [{x:-102.5508,y:-13.7746}, {x:-102.7099,y:-14.1059}, {x:-97.4975,y:-17.4384}],+    [{x:-97.4975,y:-17.4384}, {x:-101.476,y:-10.1534}, {x:-101.56,y:-10.627}],+    [{x:-102.3995,y:-13.4297}, {x:-102.5508,y:-13.7746}, {x:-97.4975,y:-17.4384}],+    [{x:-97.4975,y:-17.4384}, {x:-101.56,y:-10.627}, {x:-101.6551,y:-11.0739}],+    [{x:-102.256,y:-13.0711}, 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[{x:103.4002,y:-15.2885}, {x:97.9462,y:3.6667}, {x:98.0602,y:3.0432}],+    [{x:98.1906,y:0.2382}, {x:98.1418,y:-0.4551}, {x:98.4434,y:-7.1921}],+    [{x:98.4434,y:-9.9901}, {x:98.4283,y:-10.5621}, {x:103.4002,y:-15.2885}],+    [{x:103.4002,y:-15.2885}, {x:98.0602,y:3.0432}, {x:98.1418,y:2.3852}],+    [{x:98.207,y:0.9655}, {x:98.1906,y:0.2382}, {x:98.4434,y:-7.1921}],+    [{x:98.4434,y:-7.1921}, {x:98.4434,y:-9.9901}, {x:103.4002,y:-15.2885}],+    [{x:103.4002,y:-15.2885}, {x:98.1418,y:2.3852}, {x:98.1906,y:1.6926}],+    [{x:98.1906,y:1.6926}, {x:98.207,y:0.9655}, {x:98.4434,y:-7.1921}, {x:103.4002,y:-15.2885}],+  ] },+]++export const NAME_POLYGONS: NamePolygon[] = NAME_LETTERS.flatMap((l) => l.shapes)
viewer/board.glbadded
⋯ 1 unchanged line ⋯
viewer/circuit.jsonadded+38649
@@ -0,0 +1,65303 @@+[+  {+    "type": "source_group",+    "source_group_id": "source_group_0",+    "is_subcircuit": true,+    "was_automatically_named": true,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_component",+    "source_component_id": "source_component_0",+    "ftype": "simple_chip",+    "name": "ART1",+    "supplier_part_numbers": {},+    "source_group_id": "source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_0",+    "name": "1",+    "pin_number": 1,+    "port_hints": [+      "1",+      "pin1"+    ],+    "source_component_id": "source_component_1",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_component",+    "source_component_id": "source_component_1",+    "ftype": "simple_chip",+    "name": "MP1",+    "supplier_part_numbers": {},+    "source_group_id": "source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_1",+    "name": "1",+    "pin_number": 1,+    "port_hints": [+      "1",+      "pin1"+    ],+    "source_component_id": "source_component_2",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_component",+    "source_component_id": "source_component_2",+    "ftype": "simple_chip",+    "name": "MP2",+    "supplier_part_numbers": {},+    "source_group_id": "source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_2",+    "name": "1",+    "pin_number": 1,+    "port_hints": [+      "1",+      "pin1"+    ],+    "source_component_id": "source_component_3",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_component",+    "source_component_id": "source_component_3",+    "ftype": "simple_chip",+    "name": "MP3",+    "supplier_part_numbers": {},+    "source_group_id": "source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_3",+    "name": "1",+    "pin_number": 1,+    "port_hints": [+      "1",+      "pin1"+    ],+    "source_component_id": "source_component_4",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_component",+    "source_component_id": "source_component_4",+    "ftype": "simple_chip",+    "name": "MP4",+    "supplier_part_numbers": {},+    "source_group_id": "source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_4",+    "name": "GND1",+    "pin_number": 1,+    "port_hints": [+      "GND1",+      "A1",+      "pin1",+      "1"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_5",+    "name": "GND2",+    "pin_number": 2,+    "port_hints": [+      "GND2",+      "B12",+      "pin2",+      "2"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_6",+    "name": "VBUS1",+    "pin_number": 3,+    "port_hints": [+      "VBUS1",+      "A4",+      "pin3",+      "3"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_7",+    "name": "VBUS2",+    "pin_number": 4,+    "port_hints": [+      "VBUS2",+      "B9",+      "pin4",+      "4"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_8",+    "name": "SBU2",+    "pin_number": 5,+    "port_hints": [+      "SBU2",+      "B8",+      "pin5",+      "5"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_9",+    "name": "CC1",+    "pin_number": 6,+    "port_hints": [+      "CC1",+      "A5",+      "pin6",+      "6"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net19"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_10",+    "name": "DM2",+    "pin_number": 7,+    "port_hints": [+      "DM2",+      "B7",+      "pin7",+      "7"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_11",+    "name": "DP1",+    "pin_number": 8,+    "port_hints": [+      "DP1",+      "A6",+      "pin8",+      "8"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_12",+    "name": "DM1",+    "pin_number": 9,+    "port_hints": [+      "DM1",+      "A7",+      "pin9",+      "9"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_13",+    "name": "DP2",+    "pin_number": 10,+    "port_hints": [+      "DP2",+      "B6",+      "pin10",+      "10"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_14",+    "name": "SBU1",+    "pin_number": 11,+    "port_hints": [+      "SBU1",+      "A8",+      "pin11",+      "11"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_15",+    "name": "CC2",+    "pin_number": 12,+    "port_hints": [+      "CC2",+      "B5",+      "pin12",+      "12"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net20"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_16",+    "name": "VBUS1",+    "pin_number": 13,+    "port_hints": [+      "VBUS1",+      "A9",+      "pin13",+      "13"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_17",+    "name": "VBUS2",+    "pin_number": 14,+    "port_hints": [+      "VBUS2",+      "B4",+      "pin14",+      "14"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_18",+    "name": "GND1",+    "pin_number": 15,+    "port_hints": [+      "GND1",+      "A12",+      "pin15",+      "15"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_19",+    "name": "GND2",+    "pin_number": 16,+    "port_hints": [+      "GND2",+      "B1",+      "pin16",+      "16"+    ],+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_component",+    "source_component_id": "source_component_5",+    "ftype": "simple_chip",+    "name": "J1",+    "manufacturer_part_number": "TYPE-C-31-M-12",+    "supplier_part_numbers": {+      "jlcpcb": [+        "C165948"+      ]+    },+    "source_group_id": "source_group_0",+    "internally_connected_source_port_ids": [+      [+        "source_port_4",+        "source_port_18"+      ],+      [+        "source_port_5",+        "source_port_19"+      ],+      [+        "source_port_6",+        "source_port_16"+      ],+      [+        "source_port_7",+        "source_port_17"+      ]+    ]+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_20",+    "name": "pin1",+    "pin_number": 1,+    "port_hints": [+      "pin1",+      "anode",+      "pos",+      "left",+      "1"+    ],+    "source_component_id": "source_component_6",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net19"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_21",+    "name": "pin2",+    "pin_number": 2,+    "port_hints": [+      "pin2",+      "cathode",+      "neg",+      "right",+      "2"+    ],+    "source_component_id": "source_component_6",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_component",+    "source_component_id": "source_component_6",+    "ftype": "simple_resistor",+    "name": "R_CC1",+    "supplier_part_numbers": {+      "jlcpcb": [+        "C25900",+        "C105871",+        "C2906869"+      ]+    },+    "resistance": 4700,+    "display_resistance": "4.7kΩ",+    "are_pins_interchangeable": true,+    "source_group_id": "source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_22",+    "name": "pin1",+    "pin_number": 1,+    "port_hints": [+      "pin1",+      "anode",+      "pos",+      "left",+      "1"+    ],+    "source_component_id": "source_component_7",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net20"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_23",+    "name": "pin2",+    "pin_number": 2,+    "port_hints": [+      "pin2",+      "cathode",+      "neg",+      "right",+      "2"+    ],+    "source_component_id": "source_component_7",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_component",+    "source_component_id": "source_component_7",+    "ftype": "simple_resistor",+    "name": "R_CC2",+    "supplier_part_numbers": {+      "jlcpcb": [+        "C25900",+        "C105871",+        "C2906869"+      ]+    },+    "resistance": 4700,+    "display_resistance": "4.7kΩ",+    "are_pins_interchangeable": true,+    "source_group_id": "source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_24",+    "name": "pin1",+    "pin_number": 1,+    "port_hints": [+      "pin1",+      "pos",+      "anode",+      "1",+      "left"+    ],+    "source_component_id": "source_component_8",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_25",+    "name": "pin2",+    "pin_number": 2,+    "port_hints": [+      "pin2",+      "neg",+      "cathode",+      "2",+      "right"+    ],+    "source_component_id": "source_component_8",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_component",+    "source_component_id": "source_component_8",+    "ftype": "simple_capacitor",+    "name": "C1",+    "supplier_part_numbers": {+      "jlcpcb": [+        "C19702",+        "C96446",+        "C1691"+      ]+    },+    "capacitance": 0.00001,+    "display_capacitance": "10uF",+    "are_pins_interchangeable": true,+    "source_group_id": "source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_26",+    "name": "pin1",+    "pin_number": 1,+    "port_hints": [+      "pin1",+      "pos",+      "anode",+      "1",+      "left"+    ],+    "source_component_id": "source_component_9",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_27",+    "name": "pin2",+    "pin_number": 2,+    "port_hints": [+      "pin2",+      "neg",+      "cathode",+      "2",+      "right"+    ],+    "source_component_id": "source_component_9",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_component",+    "source_component_id": "source_component_9",+    "ftype": "simple_capacitor",+    "name": "C2",+    "supplier_part_numbers": {+      "jlcpcb": [+        "C1525",+        "C307331",+        "C60474"+      ]+    },+    "capacitance": 1e-7,+    "display_capacitance": "100nF",+    "are_pins_interchangeable": true,+    "source_group_id": "source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_28",+    "name": "top",+    "port_hints": [+      "top"+    ],+    "source_component_id": "source_manually_placed_via_0",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_29",+    "name": "bottom",+    "port_hints": [+      "bottom"+    ],+    "source_component_id": "source_manually_placed_via_0",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_30",+    "name": "pin1",+    "port_hints": [+      "pin1"+    ],+    "source_component_id": "source_manually_placed_via_0",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_manually_placed_via",+    "source_manually_placed_via_id": "source_manually_placed_via_0",+    "source_group_id": "source_group_0",+    "subcircuit_id": "subcircuit_source_group_0",+    "source_net_id": "source_net_1"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_31",+    "name": "top",+    "port_hints": [+      "top"+    ],+    "source_component_id": "source_manually_placed_via_1",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_32",+    "name": "bottom",+    "port_hints": [+      "bottom"+    ],+    "source_component_id": "source_manually_placed_via_1",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_33",+    "name": "pin1",+    "port_hints": [+      "pin1"+    ],+    "source_component_id": "source_manually_placed_via_1",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_manually_placed_via",+    "source_manually_placed_via_id": "source_manually_placed_via_1",+    "source_group_id": "source_group_0",+    "subcircuit_id": "subcircuit_source_group_0",+    "source_net_id": "source_net_1"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_34",+    "name": "pin1",+    "pin_number": 1,+    "port_hints": [+      "pin1",+      "1",+      "anode",+      "pos"+    ],+    "source_component_id": "source_component_10",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_35",+    "name": "pin2",+    "pin_number": 2,+    "port_hints": [+      "pin2",+      "2",+      "cathode",+      "neg"+    ],+    "source_component_id": "source_component_10",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_component",+    "source_component_id": "source_component_10",+    "ftype": "simple_led",+    "name": "D1",+    "color": "green",+    "symbol_display_value": "green",+    "manufacturer_part_number": "155060GS75300",+    "supplier_part_numbers": {+      "jlcpcb": []+    },+    "are_pins_interchangeable": false,+    "source_group_id": "source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_36",+    "name": "pin1",+    "pin_number": 1,+    "port_hints": [+      "pin1",+      "1",+      "anode",+      "pos"+    ],+    "source_component_id": "source_component_11",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_37",+    "name": "pin2",+    "pin_number": 2,+    "port_hints": [+      "pin2",+      "2",+      "cathode",+      "neg"+    ],+    "source_component_id": "source_component_11",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_component",+    "source_component_id": "source_component_11",+    "ftype": "simple_led",+    "name": "D2",+    "color": "green",+    "symbol_display_value": "green",+    "manufacturer_part_number": "155060GS75300",+    "supplier_part_numbers": {+      "jlcpcb": []+    },+    "are_pins_interchangeable": false,+    "source_group_id": "source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_38",+    "name": "pin1",+    "pin_number": 1,+    "port_hints": [+      "pin1",+      "1",+      "anode",+      "pos"+    ],+    "source_component_id": "source_component_12",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_39",+    "name": "pin2",+    "pin_number": 2,+    "port_hints": [+      "pin2",+      "2",+      "cathode",+      "neg"+    ],+    "source_component_id": "source_component_12",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_component",+    "source_component_id": "source_component_12",+    "ftype": "simple_led",+    "name": "D3",+    "color": "green",+    "symbol_display_value": "green",+    "manufacturer_part_number": "155060GS75300",+    "supplier_part_numbers": {+      "jlcpcb": []+    },+    "are_pins_interchangeable": false,+    "source_group_id": "source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_40",+    "name": "pin1",+    "pin_number": 1,+    "port_hints": [+      "pin1",+      "1",+      "anode",+      "pos"+    ],+    "source_component_id": "source_component_13",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_41",+    "name": "pin2",+    "pin_number": 2,+    "port_hints": [+      "pin2",+      "2",+      "cathode",+      "neg"+    ],+    "source_component_id": "source_component_13",+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_component",+    "source_component_id": "source_component_13",+    "ftype": "simple_led",+    "name": "D4",+    "color": "green",+    "symbol_display_value": "green",+    "manufacturer_part_number": "155060GS75300",+    "supplier_part_numbers": {+      "jlcpcb": []+    },+    "are_pins_interchangeable": false,+    "source_group_id": "source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": 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"source_component_id": "source_manually_placed_via_9",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_117",+    "name": "pin1",+    "port_hints": [+      "pin1"+    ],+    "source_component_id": "source_manually_placed_via_9",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_manually_placed_via",+    "source_manually_placed_via_id": "source_manually_placed_via_9",+    "source_group_id": "source_group_0",+    "subcircuit_id": "subcircuit_source_group_0",+    "source_net_id": "source_net_1"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_118",+    "name": "top",+    "port_hints": [+      "top"+    ],+    "source_component_id": "source_manually_placed_via_10",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_119",+    "name": "bottom",+    "port_hints": [+      "bottom"+    ],+    "source_component_id": "source_manually_placed_via_10",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_120",+    "name": "pin1",+    "port_hints": [+      "pin1"+    ],+    "source_component_id": "source_manually_placed_via_10",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_manually_placed_via",+    "source_manually_placed_via_id": "source_manually_placed_via_10",+    "source_group_id": "source_group_0",+    "subcircuit_id": "subcircuit_source_group_0",+    "source_net_id": "source_net_1"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_121",+    "name": "top",+    "port_hints": [+      "top"+    ],+    "source_component_id": "source_manually_placed_via_11",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_122",+    "name": "bottom",+    "port_hints": [+      "bottom"+    ],+    "source_component_id": "source_manually_placed_via_11",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_123",+    "name": "pin1",+    "port_hints": [+      "pin1"+    ],+    "source_component_id": "source_manually_placed_via_11",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_manually_placed_via",+    "source_manually_placed_via_id": "source_manually_placed_via_11",+    "source_group_id": "source_group_0",+    "subcircuit_id": "subcircuit_source_group_0",+    "source_net_id": "source_net_1"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_124",+    "name": "top",+    "port_hints": [+      "top"+    ],+    "source_component_id": "source_manually_placed_via_12",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_125",+    "name": "bottom",+    "port_hints": [+      "bottom"+    ],+    "source_component_id": "source_manually_placed_via_12",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_126",+    "name": "pin1",+    "port_hints": [+      "pin1"+    ],+    "source_component_id": "source_manually_placed_via_12",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_manually_placed_via",+    "source_manually_placed_via_id": "source_manually_placed_via_12",+    "source_group_id": "source_group_0",+    "subcircuit_id": "subcircuit_source_group_0",+    "source_net_id": "source_net_1"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_127",+    "name": "top",+    "port_hints": [+      "top"+    ],+    "source_component_id": "source_manually_placed_via_13",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_128",+    "name": "bottom",+    "port_hints": [+      "bottom"+    ],+    "source_component_id": "source_manually_placed_via_13",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_129",+    "name": "pin1",+    "port_hints": [+      "pin1"+    ],+    "source_component_id": "source_manually_placed_via_13",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_manually_placed_via",+    "source_manually_placed_via_id": "source_manually_placed_via_13",+    "source_group_id": "source_group_0",+    "subcircuit_id": "subcircuit_source_group_0",+    "source_net_id": "source_net_1"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_130",+    "name": "top",+    "port_hints": [+      "top"+    ],+    "source_component_id": "source_manually_placed_via_14",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_131",+    "name": "bottom",+    "port_hints": [+      "bottom"+    ],+    "source_component_id": "source_manually_placed_via_14",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_132",+    "name": "pin1",+    "port_hints": [+      "pin1"+    ],+    "source_component_id": "source_manually_placed_via_14",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_manually_placed_via",+    "source_manually_placed_via_id": "source_manually_placed_via_14",+    "source_group_id": "source_group_0",+    "subcircuit_id": "subcircuit_source_group_0",+    "source_net_id": "source_net_1"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_133",+    "name": "top",+    "port_hints": [+      "top"+    ],+    "source_component_id": "source_manually_placed_via_15",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_134",+    "name": "bottom",+    "port_hints": [+      "bottom"+    ],+    "source_component_id": "source_manually_placed_via_15",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_135",+    "name": "pin1",+    "port_hints": [+      "pin1"+    ],+    "source_component_id": "source_manually_placed_via_15",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_manually_placed_via",+    "source_manually_placed_via_id": "source_manually_placed_via_15",+    "source_group_id": "source_group_0",+    "subcircuit_id": "subcircuit_source_group_0",+    "source_net_id": "source_net_1"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_136",+    "name": "top",+    "port_hints": [+      "top"+    ],+    "source_component_id": "source_manually_placed_via_16",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_137",+    "name": "bottom",+    "port_hints": [+      "bottom"+    ],+    "source_component_id": "source_manually_placed_via_16",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_port",+    "source_port_id": "source_port_138",+    "name": "pin1",+    "port_hints": [+      "pin1"+    ],+    "source_component_id": "source_manually_placed_via_16",+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "source_manually_placed_via",+    "source_manually_placed_via_id": "source_manually_placed_via_16",+    "source_group_id": "source_group_0",+    "subcircuit_id": "subcircuit_source_group_0",+    "source_net_id": "source_net_1"+  },+  {+    "type": "source_net",+    "source_net_id": "source_net_0",+    "name": "GND",+    "member_source_group_ids": [],+    "is_ground": true,+    "is_power": false,+    "is_positive_voltage_source": false,+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_net",+    "source_net_id": "source_net_1",+    "name": "V5",+    "member_source_group_ids": [],+    "is_ground": false,+    "is_power": true,+    "is_positive_voltage_source": true,+    "subcircuit_id": "subcircuit_source_group_0",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_board",+    "source_board_id": "source_board_0",+    "source_group_id": "source_group_0"+  },+  {+    "type": "source_refdes_convention_warning",+    "warning_type": "source_refdes_convention_warning",+    "message": "The \"J\" prefix is being used with a <chip />, try using it with a <connector /> or <jumper />",+    "source_component_id": "source_component_5",+    "refdes": "J1",+    "source_component_ftype": "simple_chip",+    "expected_prefixes": [+      "U",+      "IC"+    ],+    "actual_prefix": "J",+    "source_refdes_convention_warning_id": "source_refdes_convention_warning_0"+  },+  {+    "type": "source_component_internal_connection",+    "source_component_internal_connection_id": "source_component_internal_connection_0",+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0",+    "source_port_ids": [+      "source_port_4",+      "source_port_18"+    ]+  },+  {+    "type": "source_component_internal_connection",+    "source_component_internal_connection_id": "source_component_internal_connection_1",+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0",+    "source_port_ids": [+      "source_port_5",+      "source_port_19"+    ]+  },+  {+    "type": "source_component_internal_connection",+    "source_component_internal_connection_id": "source_component_internal_connection_2",+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0",+    "source_port_ids": [+      "source_port_6",+      "source_port_16"+    ]+  },+  {+    "type": "source_component_internal_connection",+    "source_component_internal_connection_id": "source_component_internal_connection_3",+    "source_component_id": "source_component_5",+    "subcircuit_id": "subcircuit_source_group_0",+    "source_port_ids": [+      "source_port_7",+      "source_port_17"+    ]+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_0",+    "connected_source_port_ids": [+      "source_port_34",+      "source_port_64"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D1_A",+    "display_name": ".D1 > .anode to .R1 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_1",+    "connected_source_port_ids": [+      "source_port_36",+      "source_port_66"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D2_A",+    "display_name": ".D2 > .anode to .R2 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_2",+    "connected_source_port_ids": [+      "source_port_38",+      "source_port_68"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D3_A",+    "display_name": ".D3 > .anode to .R3 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_3",+    "connected_source_port_ids": [+      "source_port_40",+      "source_port_70"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D4_A",+    "display_name": ".D4 > .anode to .R4 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_4",+    "connected_source_port_ids": [+      "source_port_42",+      "source_port_72"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D5_A",+    "display_name": ".D5 > .anode to .R5 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_5",+    "connected_source_port_ids": [+      "source_port_44",+      "source_port_74"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D6_A",+    "display_name": ".D6 > .anode to .R6 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_6",+    "connected_source_port_ids": [+      "source_port_46",+      "source_port_76"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D7_A",+    "display_name": ".D7 > .anode to .R7 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_7",+    "connected_source_port_ids": [+      "source_port_48",+      "source_port_78"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D8_A",+    "display_name": ".D8 > .anode to .R8 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_8",+    "connected_source_port_ids": [+      "source_port_50",+      "source_port_80"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D9_A",+    "display_name": ".D9 > .anode to .R9 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_9",+    "connected_source_port_ids": [+      "source_port_52",+      "source_port_82"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D10_A",+    "display_name": ".D10 > .anode to .R10 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_10",+    "connected_source_port_ids": [+      "source_port_54",+      "source_port_84"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D11_A",+    "display_name": ".D11 > .anode to .R11 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_11",+    "connected_source_port_ids": [+      "source_port_56",+      "source_port_86"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D12_A",+    "display_name": ".D12 > .anode to .R12 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_12",+    "connected_source_port_ids": [+      "source_port_58",+      "source_port_88"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D13_A",+    "display_name": ".D13 > .anode to .R13 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_13",+    "connected_source_port_ids": [+      "source_port_60",+      "source_port_90"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D14_A",+    "display_name": ".D14 > .anode to .R14 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_14",+    "connected_source_port_ids": [+      "source_port_62",+      "source_port_92"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D15_A",+    "display_name": ".D15 > .anode to .R15 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_15",+    "connected_source_port_ids": [+      "source_port_35"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D1_K",+    "display_name": ".D1 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_16",+    "connected_source_port_ids": [+      "source_port_37"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D2_K",+    "display_name": ".D2 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_17",+    "connected_source_port_ids": [+      "source_port_39"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D3_K",+    "display_name": ".D3 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_18",+    "connected_source_port_ids": [+      "source_port_41"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D4_K",+    "display_name": ".D4 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_19",+    "connected_source_port_ids": [+      "source_port_43"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D5_K",+    "display_name": ".D5 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_20",+    "connected_source_port_ids": [+      "source_port_45"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D6_K",+    "display_name": ".D6 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_21",+    "connected_source_port_ids": [+      "source_port_47"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D7_K",+    "display_name": ".D7 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_22",+    "connected_source_port_ids": [+      "source_port_49"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D8_K",+    "display_name": ".D8 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_23",+    "connected_source_port_ids": [+      "source_port_51"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D9_K",+    "display_name": ".D9 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_24",+    "connected_source_port_ids": [+      "source_port_53"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D10_K",+    "display_name": ".D10 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_25",+    "connected_source_port_ids": [+      "source_port_55"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D11_K",+    "display_name": ".D11 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_26",+    "connected_source_port_ids": [+      "source_port_57"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D12_K",+    "display_name": ".D12 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_27",+    "connected_source_port_ids": [+      "source_port_59"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D13_K",+    "display_name": ".D13 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_28",+    "connected_source_port_ids": [+      "source_port_61"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D14_K",+    "display_name": ".D14 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_29",+    "connected_source_port_ids": [+      "source_port_63"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_D15_K",+    "display_name": ".D15 > .cathode to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_30",+    "connected_source_port_ids": [+      "source_port_65"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R1",+    "display_name": ".R1 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_31",+    "connected_source_port_ids": [+      "source_port_67"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R2",+    "display_name": ".R2 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_32",+    "connected_source_port_ids": [+      "source_port_69"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R3",+    "display_name": ".R3 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_33",+    "connected_source_port_ids": [+      "source_port_71"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R4",+    "display_name": ".R4 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_34",+    "connected_source_port_ids": [+      "source_port_73"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R5",+    "display_name": ".R5 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_35",+    "connected_source_port_ids": [+      "source_port_75"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R6",+    "display_name": ".R6 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_36",+    "connected_source_port_ids": [+      "source_port_77"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R7",+    "display_name": ".R7 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_37",+    "connected_source_port_ids": [+      "source_port_79"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R8",+    "display_name": ".R8 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_38",+    "connected_source_port_ids": [+      "source_port_81"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R9",+    "display_name": ".R9 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_39",+    "connected_source_port_ids": [+      "source_port_83"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R10",+    "display_name": ".R10 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_40",+    "connected_source_port_ids": [+      "source_port_85"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R11",+    "display_name": ".R11 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_41",+    "connected_source_port_ids": [+      "source_port_87"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R12",+    "display_name": ".R12 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_42",+    "connected_source_port_ids": [+      "source_port_89"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R13",+    "display_name": ".R13 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_43",+    "connected_source_port_ids": [+      "source_port_91"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R14",+    "display_name": ".R14 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_44",+    "connected_source_port_ids": [+      "source_port_93"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_R15",+    "display_name": ".R15 > .pin2 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_45",+    "connected_source_port_ids": [+      "source_port_6",+      "source_port_24"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_VBUS1",+    "display_name": ".J1 > .VBUS1 to .C1 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_46",+    "connected_source_port_ids": [+      "source_port_7",+      "source_port_26"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_VBUS2",+    "display_name": ".J1 > .VBUS2 to .C2 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_47",+    "connected_source_port_ids": [+      "source_port_4"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_GND1",+    "display_name": ".J1 > .GND1 to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_48",+    "connected_source_port_ids": [+      "source_port_5"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_GND2",+    "display_name": ".J1 > .GND2 to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_49",+    "connected_source_port_ids": [+      "source_port_16",+      "source_port_24"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_VBUS1B",+    "display_name": ".J1 > .A9 to .C1 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_50",+    "connected_source_port_ids": [+      "source_port_17",+      "source_port_26"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_VBUS2B",+    "display_name": ".J1 > .B4 to .C2 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_51",+    "connected_source_port_ids": [+      "source_port_18"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_GND1B",+    "display_name": ".J1 > .A12 to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_52",+    "connected_source_port_ids": [+      "source_port_19"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_GND2B",+    "display_name": ".J1 > .B1 to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_53",+    "connected_source_port_ids": [+      "source_port_9",+      "source_port_20"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_CC1A",+    "display_name": ".J1 > .CC1 to .R_CC1 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net19"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_54",+    "connected_source_port_ids": [+      "source_port_21"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_CC1B",+    "display_name": ".R_CC1 > .pin2 to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_55",+    "connected_source_port_ids": [+      "source_port_15",+      "source_port_22"+    ],+    "connected_source_net_ids": [],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_CC2A",+    "display_name": ".J1 > .CC2 to .R_CC2 > .pin1",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net20"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_56",+    "connected_source_port_ids": [+      "source_port_23"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_CC2B",+    "display_name": ".R_CC2 > .pin2 to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_57",+    "connected_source_port_ids": [+      "source_port_24"+    ],+    "connected_source_net_ids": [+      "source_net_1"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_C1P",+    "display_name": ".C1 > .pin1 to net.V5",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_58",+    "connected_source_port_ids": [+      "source_port_25"+    ],+    "connected_source_net_ids": [+      "source_net_0"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "name": "T_C1N",+    "display_name": ".C1 > .pin2 to net.GND",+    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"+  },+  {+    "type": "source_trace",+    "source_trace_id": "source_trace_59",+    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"x": 0,+      "y": -34.4+    },+    "font": "tscircuit2024",+    "font_size": 1.4,+    "layer": "top",+    "text": "EACH LED: 150R TO 12mA, THEN A VIA DOWN TO THE +5V PLANE ON THE BACK",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_51",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": -86,+      "y": 23.5+    },+    "font": "tscircuit2024",+    "font_size": 1.2,+    "layer": "top",+    "text": "MP4 GND · LARGE MACHINE PIN · 32mm GRID",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_52",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": 86,+      "y": 23.5+    },+    "font": "tscircuit2024",+    "font_size": 1.2,+    "layer": "top",+    "text": "MP3 +5V · LARGE MACHINE PIN · 32mm GRID",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_53",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": -120,+      "y": -24+    },+    "font": "tscircuit2024",+    "font_size": 1.2,+    "layer": "top",+    "text": "MP1 GND",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_54",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": 120,+      "y": -24+    },+    "font": "tscircuit2024",+    "font_size": 1.2,+    "layer": "top",+    "text": "MP2 +5V",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_55",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": 118,+      "y": -19+    },+    "font": "tscircuit2024",+    "font_size": 1.2,+    "layer": "top",+    "text": "J1 USB-C 5V IN",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_56",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": 82,+      "y": -21.5+    },+    "font": "tscircuit2024",+    "font_size": 1.2,+    "layer": "top",+    "text": "R_CC1/2 4K7 Rd — TELLS THE CHARGER TO ENABLE VBUS",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_57",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": 94,+      "y": -24.5+    },+    "font": "tscircuit2024",+    "font_size": 1.2,+    "layer": "top",+    "text": "C1 10uF BULK · C2 100nF HF",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_58",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": -26,+      "y": 20.5+    },+    "font": "tscircuit2024",+    "font_size": 1.4,+    "layer": "top",+    "text": "JON CHUNG IS A SOLDERMASK OPENING OVER THE TOP-LAYER GND PLANE —",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_59",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": -22,+      "y": -20.5+    },+    "font": "tscircuit2024",+    "font_size": 1.4,+    "layer": "top",+    "text": "EVERY LED RETURNS ITS CURRENT THROUGH THESE LETTERS. NO SECOND GROUND PATH.",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_60",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": 0,+      "y": 12+    },+    "font": "tscircuit2024",+    "font_size": 2.6,+    "layer": "bottom",+    "text": "ADOM MOLECULE NAMEPLATE — JON CHUNG",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_61",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": 0,+      "y": 7+    },+    "font": "tscircuit2024",+    "font_size": 1.7,+    "layer": "bottom",+    "text": "209 x 40 mm · FAMILJEN GROTESK BOLD · BARE ENIG COPPER",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_62",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": 0,+      "y": 2+    },+    "font": "tscircuit2024",+    "font_size": 1.7,+    "layer": "bottom",+    "text": "256 x 64 mm PIN BOX · 32mm BASE SCAFFOLD GRID · 4x LARGE MACHINE PIN",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_63",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": 0,+      "y": -3+    },+    "font": "tscircuit2024",+    "font_size": 1.7,+    "layer": "bottom",+    "text": "TOP = GND PLANE (THE NAME) · BOTTOM = +5V PLANE · TOP-SIDE PnP ONLY",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_64",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": 0,+      "y": -8+    },+    "font": "tscircuit2024",+    "font_size": 1.7,+    "layer": "bottom",+    "text": "15x SIDE-VIEW LED @ 12mA = 180mA · USB-C 5V OR MP2/MP3 FROM THE SCAFFOLD",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_silkscreen_text",+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_65",+    "anchor_alignment": "center",+    "anchor_position": {+      "x": 0,+      "y": -13+    },+    "font": "tscircuit2024",+    "font_size": 1.7,+    "layer": "bottom",+    "text": "SPECIFY ENIG — THE LETTERS ARE BARE COPPER AND HASL WILL LEAVE THEM LUMPY",+    "ccw_rotation": 0,+    "pcb_component_id": null,+    "subcircuit_id": "subcircuit_source_group_0"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_0",+    "pcb_component_id": "pcb_component_1",+    "layers": [+      "top",+      "bottom"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": -128,+    "y": -32,+    "source_port_id": "source_port_0"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_1",+    "pcb_component_id": "pcb_component_2",+    "layers": [+      "top",+      "bottom"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 128,+    "y": -32,+    "source_port_id": "source_port_1"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_2",+    "pcb_component_id": "pcb_component_3",+    "layers": [+      "top",+      "bottom"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 128,+    "y": 32,+    "source_port_id": "source_port_2"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_3",+    "pcb_component_id": "pcb_component_4",+    "layers": [+      "top",+      "bottom"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": -128,+    "y": 32,+    "source_port_id": "source_port_3"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_4",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": -3.35,+    "source_port_id": "source_port_4"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_5",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": -3.05,+    "source_port_id": "source_port_5"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_6",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": -2.55,+    "source_port_id": "source_port_6"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_7",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": -2.25,+    "source_port_id": "source_port_7"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_8",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": -1.75,+    "source_port_id": "source_port_8"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_9",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": -1.25,+    "source_port_id": "source_port_9"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_10",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": -0.75,+    "source_port_id": "source_port_10"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_11",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": -0.25,+    "source_port_id": "source_port_11"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_12",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": 0.25,+    "source_port_id": "source_port_12"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_13",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": 0.75,+    "source_port_id": "source_port_13"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_14",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": 1.25,+    "source_port_id": "source_port_14"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_15",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": 1.75,+    "source_port_id": "source_port_15"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_16",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": 2.55,+    "source_port_id": "source_port_16"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_17",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": 2.25,+    "source_port_id": "source_port_17"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_18",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": 3.35,+    "source_port_id": "source_port_18"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_19",+    "pcb_component_id": "pcb_component_5",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 126.50999999999999,+    "y": 3.05,+    "source_port_id": "source_port_19"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_20",+    "pcb_component_id": "pcb_component_6",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 120.99999999999999,+    "y": 8,+    "source_port_id": "source_port_20"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_21",+    "pcb_component_id": "pcb_component_6",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 122.02,+    "y": 8,+    "source_port_id": "source_port_21"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_22",+    "pcb_component_id": "pcb_component_7",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 120.99999999999999,+    "y": -8,+    "source_port_id": "source_port_22"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_23",+    "pcb_component_id": "pcb_component_7",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 122.02,+    "y": -8,+    "source_port_id": "source_port_23"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_24",+    "pcb_component_id": "pcb_component_8",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 116.18499999999999,+    "y": 6,+    "source_port_id": "source_port_24"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_25",+    "pcb_component_id": "pcb_component_8",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 117.835,+    "y": 6,+    "source_port_id": "source_port_25"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_26",+    "pcb_component_id": "pcb_component_9",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 116.49999999999999,+    "y": -6,+    "source_port_id": "source_port_26"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_27",+    "pcb_component_id": "pcb_component_9",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 117.52,+    "y": -6,+    "source_port_id": "source_port_27"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_28",+    "pcb_component_id": "pcb_component_10",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 115.65499999999999,+    "y": 6,+    "source_port_id": "source_port_28"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_29",+    "pcb_component_id": "pcb_component_10",+    "layers": [+      "bottom"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 115.65499999999999,+    "y": 6,+    "source_port_id": "source_port_29"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_30",+    "pcb_component_id": "pcb_component_10",+    "layers": [+      "top",+      "bottom"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 115.65499999999999,+    "y": 6,+    "source_port_id": "source_port_30"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_31",+    "pcb_component_id": "pcb_component_11",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 116.1,+    "y": -6,+    "source_port_id": "source_port_31"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_32",+    "pcb_component_id": "pcb_component_11",+    "layers": [+      "bottom"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 116.1,+    "y": -6,+    "source_port_id": "source_port_32"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_33",+    "pcb_component_id": "pcb_component_11",+    "layers": [+      "top",+      "bottom"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": 116.1,+    "y": -6,+    "source_port_id": "source_port_33"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_34",+    "pcb_component_id": "pcb_component_12",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": -100.7,+    "y": 27,+    "source_port_id": "source_port_34"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_35",+    "pcb_component_id": "pcb_component_12",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": -99.3,+    "y": 27,+    "source_port_id": "source_port_35"+  },+  {+    "type": "pcb_port",+    "pcb_port_id": "pcb_port_36",+    "pcb_component_id": "pcb_component_13",+    "layers": [+      "top"+    ],+    "subcircuit_id": "subcircuit_source_group_0",+    "x": -80.7,+    "y": 27,+    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