component
ISOW7721DFMR
Public Made by Adomby adom
Texas Instruments Digital Isolators (With Power), SOIC-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+56@@ -0,0 +1,56 @@+# ISOW7721DFMR++**Texas Instruments** · Digital Isolators (With Power) · SOIC-20++ISOW7721DFMR from Texas Instruments, in a SOIC-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VIO | power_in | Side 1 logic supply voltage. |+| 2 | INA | input | Input channel A. |+| 3 | OUTB | output | Output channel B. |+| 4 | EN_IO1 | input | Output Enable 1; when high or open the channel output pin on side 1 is enabled, when low the output is in high impedance state and transmitter is disabled. |+| 5 | EN | bidirectional | Power converter enable input pin; DC-DC power converter is enabled when high to VIO voltage level and disabled when low at GND1 voltage level. |+| 6 | GNDIO | power_in | Ground connection for VIO; GND1 and GNDIO need to be shorted on board. |+| 7 | LF | input | Multiple device primary/secondary control logic; connect to GND1 when used as primary device or to VDD if used as secondary device. |+| 8 | CC | bidirectional | Multiple device primary/secondary synchronization pin; when LF is set to GND1 CC is an output, when LF is set to VDD CC is an input. |+| 9 | VDD | power_in | Side 1 DC-DC converter power supply voltage. |+| 10 | GND1 | power_in | Ground connection for VDD; GND1 and GNDIO need to be shorted on board. |+| 11 | GND2 | power_in | Ground connection for VISOOUT; GND2 and GISOIN pins can be shorted on board or connected through a ferrite bead. |+| 12 | VISOOUT | power_out | Isolated power converter output voltage; VISOIN and VISOOUT pins can be shorted on board or connected through a ferrite bead. |+| 13 | VSEL | input | VISOOUT selection pin; VISOOUT = 5 V when VSEL shorted to VISOOUT, VISOOUT = 3.3 V when VSEL shorted to GND2. |+| 14 | NC | unconnected | No Connect. |+| 15 | GISOIN | power_in | Ground connection for VISOIN; GND2 and GISOIN pins can be shorted on board or connected through a ferrite bead. |+| 16 | NC | unconnected | No Connect. |+| 17 | EN_IO2 | input | Output Enable 2; when high or open the channel output pin on side 2 is enabled, when low the output is in high impedance state and transmitter is disabled. |+| 18 | INB | input | Input channel B. |+| 19 | OUTA | output | Output channel A. |+| 20 | VISOIN | power_in | Side 2 supply voltage for isolation channels; VISOIN and VISOOUT pins can be shorted on board or connected through a ferrite bead. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-20 |+| Category | Signal Isolation Devices |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `ISOW7721DFMR`+- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`+- 3D model: SOIC-20 (KiCad packages3D, STEP)+- 3D model files: `isow7721dfmr-etched.step` / `isow7721dfmr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `isow7721dfmr.step` / `isow7721dfmr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8597547427327467520) (56 pp, sha256 `23d359783521eebd`, retrieved 2026-10-05, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/isow7721dfmr-datasheet.pdf)
page.jsonadded+230@@ -0,0 +1,230 @@+{+ "slug": "isow7721dfmr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Digital Isolators (With Power), SOIC-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "signal isolation devices",+ "isow7721dfmr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "isow7721dfmr.kicad_sym",+ "isow7721dfmr.kicad_mod",+ "isow7721dfmr.glb",+ "isow7721dfmr.step",+ "isow7721dfmr.lbr",+ "docs/hero.png",+ "docs/isow7721dfmr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "isow7721dfmr-hero.glb",+ "isow7721dfmr-hero.overlay.json"+ ],+ "component": {+ "mpn": "ISOW7721DFMR",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-20",+ "pin_count": 20,+ "category": "Signal Isolation Devices",+ "subcategory": "Digital Isolators (With Power)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8597547427327467520",+ "parts": {+ "symbol": "isow7721dfmr.kicad_sym",+ "footprint": "isow7721dfmr.kicad_mod",+ "model_3d": "isow7721dfmr-hero.glb",+ "model_3d_plain": "isow7721dfmr.glb",+ "model_3d_step": "isow7721dfmr-etched.step",+ "model_3d_step_plain": "isow7721dfmr.step",+ "lbr": "isow7721dfmr.lbr"+ },+ "distributor_links": {+ "lcsc": 7290753,+ "digikey": "296-ISOW7721DFMRTR-ND",+ "mouser": "595-ISOW7721DFMR"+ },+ "distributor_check": {+ "checked_at": "2026-10-05T20:52:28Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-ISOW7721DFMRTR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-ISOW7721DFMR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VIO",+ "type": "power_in",+ "description": "Side 1 logic supply voltage."+ },+ {+ "number": "2",+ "name": "INA",+ "type": "input",+ "description": "Input channel A."+ },+ {+ "number": "3",+ "name": "OUTB",+ "type": "output",+ "description": "Output channel B."+ },+ {+ "number": "4",+ "name": "EN_IO1",+ "type": "input",+ "description": "Output Enable 1; when high or open the channel output pin on side 1 is enabled, when low the output is in high impedance state and transmitter is disabled."+ },+ {+ "number": "5",+ "name": "EN",+ "type": "bidirectional",+ "description": "Power converter enable input pin; DC-DC power converter is enabled when high to VIO voltage level and disabled when low at GND1 voltage level."+ },+ {+ "number": "6",+ "name": "GNDIO",+ "type": "power_in",+ "description": "Ground connection for VIO; GND1 and GNDIO need to be shorted on board."+ },+ {+ "number": "7",+ "name": "LF",+ "type": "input",+ "description": "Multiple device primary/secondary control logic; connect to GND1 when used as primary device or to VDD if used as secondary device."+ },+ {+ "number": "8",+ "name": "CC",+ "type": "bidirectional",+ "description": "Multiple device primary/secondary synchronization pin; when LF is set to GND1 CC is an output, when LF is set to VDD CC is an input."+ },+ {+ "number": "9",+ "name": "VDD",+ "type": "power_in",+ "description": "Side 1 DC-DC converter power supply voltage."+ },+ {+ "number": "10",+ "name": "GND1",+ "type": "power_in",+ "description": "Ground connection for VDD; GND1 and GNDIO need to be shorted on board."+ },+ {+ "number": "11",+ "name": "GND2",+ "type": "power_in",+ "description": "Ground connection for VISOOUT; GND2 and GISOIN pins can be shorted on board or connected through a ferrite bead."+ },+ {+ "number": "12",+ "name": "VISOOUT",+ "type": "power_out",+ "description": "Isolated power converter output voltage; VISOIN and VISOOUT pins can be shorted on board or connected through a ferrite bead."+ },+ {+ "number": "13",+ "name": "VSEL",+ "type": "input",+ "description": "VISOOUT selection pin; VISOOUT = 5 V when VSEL shorted to VISOOUT, VISOOUT = 3.3 V when VSEL shorted to GND2."+ },+ {+ "number": "14",+ "name": "NC",+ "type": "unconnected",+ "description": "No Connect."+ },+ {+ "number": "15",+ "name": "GISOIN",+ "type": "power_in",+ "description": "Ground connection for VISOIN; GND2 and GISOIN pins can be shorted on board or connected through a ferrite bead."+ },+ {+ "number": "16",+ "name": "NC",+ "type": "unconnected",+ "description": "No Connect."+ },+ {+ "number": "17",+ "name": "EN_IO2",+ "type": "input",+ "description": "Output Enable 2; when high or open the channel output pin on side 2 is enabled, when low the output is in high impedance state and transmitter is disabled."+ },+ {+ "number": "18",+ "name": "INB",+ "type": "input",+ "description": "Input channel B."+ },+ {+ "number": "19",+ "name": "OUTA",+ "type": "output",+ "description": "Output channel A."+ },+ {+ "number": "20",+ "name": "VISOIN",+ "type": "power_in",+ "description": "Side 2 supply voltage for isolation channels; VISOIN and VISOOUT pins can be shorted on board or connected through a ferrite bead."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 9,+ "cost_usd": 0.1077,+ "at": "2026-10-05T20:52:12"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8597547427327467520",+ "pages": 56,+ "sha256": "23d359783521eebd",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}