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ISO7742FQDWQ1
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Texas Instruments Digital Isolators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+53@@ -0,0 +1,53 @@+# ISO7742FQDWQ1++**Texas Instruments** · Digital Isolators · SOIC-16++ISO7742FQDWQ1 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC1 | power_in | Side-1 supply voltage, recommended range 2.25 V to 5.5 V, decoupled with a 0.1 µF capacitor to GND1 placed no more than 2 mm from the pin. |+| 2 | GND1 | power_in | Side-1 ground connection for VCC1 (pins 2 and 8 are both side-1 ground). |+| 3 | INA | input | Logic input, channel A on side 1; VIH is 0.7 x VCCI minimum and VIL is 0.3 x VCCI maximum. |+| 4 | INB | input | Logic input, channel B on side 1; VIH is 0.7 x VCCI minimum and VIL is 0.3 x VCCI maximum. |+| 5 | OUTC | output | Output of channel C; follows the logic state of its input and goes high impedance when the enable pin is low. |+| 6 | OUTD | output | Output of channel D; follows the logic state of its input and goes high impedance when the enable pin is low. |+| 7 | EN1 | input | Output enable for side 1; side-1 outputs are enabled when EN1 is high or open and go to high impedance when EN1 is low. |+| 8 | GND1 | power_in | Side-1 ground connection for VCC1 (second side-1 ground pin, with pin 2). |+| 9 | GND2 | power_in | Side-2 ground connection for VCC2 (pins 9 and 15 are both side-2 ground). |+| 10 | EN2 | input | Output enable for side 2; side-2 outputs are enabled when EN2 is high or open and go to high impedance when EN2 is low. |+| 11 | IND | input | Logic input, channel D on side 2; VIH is 0.7 x VCCI minimum and VIL is 0.3 x VCCI maximum. |+| 12 | INC | input | Logic input, channel C on side 2; VIH is 0.7 x VCCI minimum and VIL is 0.3 x VCCI maximum. |+| 13 | OUTB | output | Output of channel B; follows the logic state of its input and goes high impedance when the enable pin is low. |+| 14 | OUTA | output | Output of channel A; follows the logic state of its input and goes high impedance when the enable pin is low. |+| 15 | GND2 | power_in | Side-2 ground connection for VCC2 (second side-2 ground pin, with pin 9). |+| 16 | VCC2 | power_in | Side-2 supply voltage, recommended range 2.25 V to 5.5 V, decoupled with a 0.1 µF capacitor to GND2 placed no more than 2 mm from the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Signal Isolation Devices |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `ISO7742FQDWQ1`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `iso7742fqdwq1-etched.step` / `iso7742fqdwq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `iso7742fqdwq1.step` / `iso7742fqdwq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/iso7740-q1) (55 pp, sha256 `3fc23e4a8eb8bc39`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/iso7742fqdwq1-datasheet.pdf)
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The closes; Pin positions come from Figure 4-3 (page 3, ISO7742-Q1 DW and DBQ top view) and are cross-checked ag; The datasheet text is a Chinese translation. Pin names and numbers are taken as printed in the Engli"+ ],+ "pages_sent": 29,+ "cost_usd": 0.1552,+ "at": "2026-10-08T02:14:59"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/iso7740-q1",+ "pages": 55,+ "sha256": "3fc23e4a8eb8bc39",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "iso7742fqdwq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "iso7742fqdwq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "ec817bb7e71b0b8d68f10182ae61b89fe533e7ec5028568a78a786766398864b",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}