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ISO7721FQDWRQ1
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Texas Instruments Digital Isolators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+53@@ -0,0 +1,53 @@+# ISO7721FQDWRQ1++**Texas Instruments** · Digital Isolators · SOIC-16++ISO7721FQDWRQ1 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GND1 | power_in | Ground connection for VCC1 on the input side; decouple VCC1 to GND1 with 0.1 µF as recommended by the datasheet. |+| 2 | NC | unconnected | Not connected per the DW-16 pin table; no function on this device. |+| 3 | VCC1 | power_in | Input-side supply voltage, recommended 2.25 V to 5.5 V, set independently of VCC2; place a 0.1 µF decoupling capacitor between VCC1 and GND1. |+| 4 | OUTA | output | Channel A output on the input-side reference (reverse-direction channel driven from INA, pin 13); on F-suffix devices it defaults low when the input side is unpowered or INA is open. |+| 5 | INB | input | Channel B logic input referenced to VCCI, with VIH at least 0.7 x VCCI and VIL at most 0.3 x VCCI, supporting up to 100 Mbps. |+| 6 | NC | unconnected | Not connected per the DW-16 pin table; no function on this device. |+| 7 | GND1 | power_in | Ground connection for VCC1 on the input side (second input-side ground pin on the DW-16 package). |+| 8 | NC | unconnected | Not connected per the DW-16 pin table; no function on this device. |+| 9 | GND2 | power_in | Ground connection for VCC2 on the output side; decouple VCC2 to GND2 with 0.1 µF. |+| 10 | NC | unconnected | Not connected per the DW-16 pin table; no function on this device. |+| 11 | NC | unconnected | Not connected per the DW-16 pin table; no function on this device. |+| 12 | OUTB | output | Channel B output referenced to VCCO; VOH is at least VCCO - 0.4 V at 5 V with IOH = -4 mA, and the F-suffix device defaults low when the input is unpowered or open. |+| 13 | INA | input | Channel A logic input (reverse-direction channel) on the output-side reference, with VIH at least 0.7 x VCCI and VIL at most 0.3 x VCCI, supporting up to 100 Mbps. |+| 14 | VCC2 | power_in | Output-side supply voltage, recommended 2.25 V to 5.5 V, set independently of VCC1; place a 0.1 µF decoupling capacitor between VCC2 and GND2. |+| 15 | NC | unconnected | Not connected per the DW-16 pin table; no function on this device. |+| 16 | GND2 | power_in | Ground connection for VCC2 on the output side (second output-side ground pin on the DW-16 package). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Signal Isolation Devices |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `ISO7721FQDWRQ1`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `iso7721fqdwrq1-etched.step` / `iso7721fqdwrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `iso7721fqdwrq1.step` / `iso7721fqdwrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/iso7721-q1) (52 pp, sha256 `fbb553de6ff2b6fe`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/iso7721fqdwrq1-datasheet.pdf)
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decouple VCC1 to GND1 with 0.1 µF as recommended by the datasheet."+ },+ {+ "number": "2",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected per the DW-16 pin table; no function on this device."+ },+ {+ "number": "3",+ "name": "VCC1",+ "type": "power_in",+ "description": "Input-side supply voltage, recommended 2.25 V to 5.5 V, set independently of VCC2; place a 0.1 µF decoupling capacitor between VCC1 and GND1."+ },+ {+ "number": "4",+ "name": "OUTA",+ "type": "output",+ "description": "Channel A output on the input-side reference (reverse-direction channel driven from INA, pin 13); on F-suffix devices it defaults low when the input side is unpowered or INA is open."+ },+ {+ "number": "5",+ "name": "INB",+ "type": "input",+ "description": "Channel B logic input referenced to VCCI, with VIH at least 0.7 x VCCI and VIL at most 0.3 x VCCI, supporting up to 100 Mbps."+ },+ {+ "number": "6",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected per the DW-16 pin table; no function on this device."+ },+ {+ "number": "7",+ "name": "GND1",+ "type": "power_in",+ "description": "Ground connection for VCC1 on the input side (second input-side ground pin on the DW-16 package)."+ },+ {+ "number": "8",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected per the DW-16 pin table; no function on this device."+ },+ {+ "number": "9",+ "name": "GND2",+ "type": "power_in",+ "description": "Ground connection for VCC2 on the output side; decouple VCC2 to GND2 with 0.1 µF."+ },+ {+ "number": "10",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected per the DW-16 pin table; no function on this device."+ },+ {+ "number": "11",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected per the DW-16 pin table; no function on this device."+ },+ {+ "number": "12",+ "name": "OUTB",+ "type": "output",+ "description": "Channel B output referenced to VCCO; VOH is at least VCCO - 0.4 V at 5 V with IOH = -4 mA, and the F-suffix device defaults low when the input is unpowered or open."+ },+ {+ "number": "13",+ "name": "INA",+ "type": "input",+ "description": "Channel A logic input (reverse-direction channel) on the output-side reference, with VIH at least 0.7 x VCCI and VIL at most 0.3 x VCCI, supporting up to 100 Mbps."+ },+ {+ "number": "14",+ "name": "VCC2",+ "type": "power_in",+ "description": "Output-side supply voltage, recommended 2.25 V to 5.5 V, set independently of VCC1; place a 0.1 µF decoupling capacitor between VCC2 and GND2."+ },+ {+ "number": "15",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected per the DW-16 pin table; no function on this device."+ },+ {+ "number": "16",+ "name": "GND2",+ "type": "power_in",+ "description": "Ground connection for VCC2 on the output side (second output-side ground pin on the DW-16 package)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The DW-16 pin assignments for GND1 and GND2 are taken from Table 5-1 and Figure 5-2; the datasheet i; The datasheet gives the 16-pin DW pin table in one list shared across ISO7720-Q1 and ISO7721-Q1 and ",+ "3/16 pins cited to the wrong page (name found elsewhere): ['5:INB@p7', '12:OUTB@p13', '13:INA@p7']"+ ],+ "pages_sent": 33,+ "cost_usd": 0.1589,+ "at": "2026-10-08T18:10:43"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/iso7721-q1",+ "pages": 52,+ "sha256": "fbb553de6ff2b6fe",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "iso7721fqdwrq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "iso7721fqdwrq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "0b075c543dd93741242f31dd6a62df4a8669227347f93cf42f714f1908623dec",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}