IP6829_MAG_L05_WFNRG

@@ -0,0 +1,75 @@+# IP6829_MAG_L05_WFNRG++**INJOINIC IP6829 MAG L05 WFNRG** · Wireless Charge-Discharge ICs · QFN-32-EP(5x5)++IP6829_MAG_L05_WFNRG from INJOINIC IP6829 MAG L05 WFNRG, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GND | power_in | Analog ground. |+| 2 | IGND | input | Current communication / demodulation negative input; connects to low side of the 20 mΩ sense resistor for current ASK demod. |+| 3 | ISENSE | input | Current communication / demodulation positive input; connects to high side of the 20 mΩ sense resistor for current ASK demod. |+| 4 | VCC | power_out | Internal VCC LDO output; bypass with 2.2 µF capacitor to GND. Typical 4.2 V, range 3.8-5 V. |+| 5 | PGND | power_in | Power ground of the internal power MOS bridge; connects to the positive end of the external 20 mΩ current sense resistor. |+| 6 | HOSCI | input | External crystal oscillator input. |+| 7 | HOSCO | output | External crystal oscillator output. |+| 8 | CC1 | bidirectional | USB Type-C CC1 detection / PD communication pin. Abs max 12 V; op range GND-0.3 to 5.5 V. |+| 9 | CC2 | bidirectional | USB Type-C CC2 detection / PD communication pin. Abs max 12 V; op range GND-0.3 to 5.5 V. |+| 10 | DEBUG | bidirectional | Debug pin. |+| 11 | NTC | input | NTC temperature detection pin. Sources a fixed 20 µA and samples the NTC voltage; enters NTC protection when V(NTC) < 0.48 V, recovers when > 0.70 V. Tie to GND via 100 kΩ if unused. |+| 12 | LOSS_THR | input | Dynamic FOD sensitivity setting / board-side NTC detection. External resistor to GND (default 100 kΩ, range 50 k-130 kΩ) sets dynamic FOD sensitivity. |+| 13 | LED1 | output | LED1 status indicator output. Source current typ 2 mA (max 4 mA) at 0.8*VCC. |+| 14 | IO4 | bidirectional | Internal GPIO4. |+| 15 | LED3 | output | LED3 status indicator output. Source current typ 2 mA (max 4 mA) at 0.8*VCC. |+| 16 | LED2 | output | LED2 status indicator output. Source current typ 2 mA (max 4 mA) at 0.8*VCC. |+| 17 | IO7 | bidirectional | Internal GPIO7. |+| 18 | V_DECODE | input | Voltage communication / demodulation input; connects to the coil-voltage ASK demodulation filter network. |+| 19 | BST1 | passive | Internal high-side gate driver bootstrap for LX1; connect bootstrap capacitor to LX1. |+| 20 | LX1 | power_out | H-bridge switch node 1. Rds(on) typ 25 mΩ. Pins 20 and 21 are tied together internally as LX1. |+| 21 | LX1 | power_out | H-bridge switch node 1 (parallel to pin 20). |+| 22 | LX2 | power_out | H-bridge switch node 2. Rds(on) typ 25 mΩ. Pins 22 and 23 are tied together internally as LX2. |+| 23 | LX2 | power_out | H-bridge switch node 2 (parallel to pin 22). |+| 24 | BST2 | passive | Internal high-side gate driver bootstrap for LX2; connect bootstrap capacitor to LX2. |+| 25 | NC | unconnected | No connect - leave floating; do NOT tie to ground. |+| 26 | VIN | power_in | External supply input. Operating range 4.5-9 V (typ 5/9 V), abs max 16 V. Pins 26 and 27 are tied together. |+| 27 | VIN | power_in | External supply input (parallel to pin 26). |+| 28 | DM | bidirectional | USB D- for DPDM fast-charge input request. Abs max 8 V; op range GND-0.3 to 5.5 V. |+| 29 | DP | bidirectional | USB D+ for DPDM fast-charge input request. Abs max 8 V; op range GND-0.3 to 5.5 V. |+| 30 | VDET | input | Voltage detection input for the coil-voltage ASK demod filter; capacitor from V_DET to GND (default 2.2 nF) sets static FOD sensitivity. |+| 31 | NC | unconnected | No connect - leave floating; do NOT tie to ground. |+| 32 | AGND | power_in | Analog ground. |+| 33 | EPAD | power_in | Exposed pad - power ground of the internal power MOS bridge (PGND); connects to the positive end of the external 20 mΩ current sense resistor. Solder to PCB ground plane for thermal dissipation. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | INJOINIC IP6829 MAG L05 WFNRG |+| Package | QFN-32-EP(5x5) |+| Category | PMIC |+| Pins | 33 |++## Ordering variants++Same part, different packaging or reel option.++- `IP6829_MAG_L05_WFNRG`++## CAD (KiCad official)++- Symbol: `IP6829_MAG_L05_WFNRG`+- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`+- 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [INJOINIC IP6829 MAG L05 WFNRG datasheet](docs/ip6829-mag-l05-wfnrg-datasheet.pdf) (19 pp, sha256 `41b7e0f30583c42b`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ip6829-mag-l05-wfnrg-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "ip6829-mag-l05-wfnrg",+  "version": "0.1.0",+  "type": "component",+  "description": "INJOINIC IP6829 MAG L05 WFNRG Wireless Charge-Discharge ICs, QFN-32-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "pmic",+    "ip6829_mag_l05_wfnrg"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ip6829-mag-l05-wfnrg.kicad_sym",+    "ip6829-mag-l05-wfnrg.kicad_mod",+    "ip6829-mag-l05-wfnrg.glb",+    "ip6829-mag-l05-wfnrg.step",+    "ip6829-mag-l05-wfnrg.lbr",+    "docs/hero.png",+    "docs/ip6829-mag-l05-wfnrg-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file