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ip6808-nf: factory component page (tier=lcsc)

Ray ·5f98e7d1f0 ·1mo ago ·parent c7d66bc
1 file changed +266−8
page.json+266−8
@@ -1,13 +1,276 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "ip6808-nf",+  "title": "IP6808_NF",+  "brief": "INJOINIC IP6808 NF Battery Management, QFN-32-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "INJOINIC IP6808 NF Battery Management, QFN-32-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "pmic",     "ip6808_nf"   ],+  "component": {+    "mpn": "IP6808_NF",+    "manufacturer": "INJOINIC IP6808 NF",+    "package": "QFN-32-EP(5x5)",+    "pin_count": 33,+    "category": "PMIC",+    "subcategory": "Battery Management",+    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/7466987fd41c4b69a9e7974bdc2f7e13.pdf",+    "parts": {+      "symbol": "ip6808-nf.kicad_sym",+      "footprint": "ip6808-nf.kicad_mod",+      "model_3d": "ip6808-nf.glb",+      "model_3d_step": "ip6808-nf.step",+      "lbr": "ip6808-nf.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "SENSEP",+        "type": "input",+        "description": "VBUS current positive sense node. Connects to the high side of the VBUS current-sense shunt for input current monitoring/overcurrent protection."+      },+      {+        "number": "2",+        "name": "SENSEN",+        "type": "input",+        "description": "VBUS current negative sense node. Connects to the low side of the VBUS current-sense shunt."+      },+      {+        "number": "3",+        "name": "DCH_V",+        "type": "input",+        "description": "Power rail voltage detect pin for external PMOS discharge path. May be left floating when the external PMOS is not used. Absolute max 25 V."+      },+      {+        "number": "4",+        "name": "DCH_G",+        "type": "output",+        "description": "Gate drive for external discharge PMOS. May be left floating when the external PMOS is not used."+      },+      {+        "number": "5",+        "name": "CC1",+        "type": "bidirectional",+        "description": "USB Type-C CC1 line, also used for firmware upgrade. In Micro-USB applications, connect to the ID line for firmware download."+      },+      {+        "number": "6",+        "name": "CC2",+        "type": "bidirectional",+        "description": "USB Type-C CC2 line, also used for firmware upgrade."+      },+      {+        "number": "7",+        "name": "DM",+        "type": "bidirectional",+        "description": "USB D- data line. Absolute max 20 V; recommended operating range up to 5.5 V."+      },+      {+        "number": "8",+        "name": "DP",+        "type": "bidirectional",+        "description": "USB D+ data line. Absolute max 20 V; recommended operating range up to 5.5 V."+      },+      {+        "number": "9",+        "name": "Vcoil_Sense",+        "type": "input",+        "description": "Coil voltage sense input. Fed by the resistor divider on the transmitter coil for ASK demodulation and coil voltage monitoring."+      },+      {+        "number": "10",+        "name": "FB",+        "type": "output",+        "description": "External DCDC voltage control pin. Used to modulate the external DC/DC output voltage in DPM/Dynamic Power Modulation applications."+      },+      {+        "number": "11",+        "name": "HG2",+        "type": "output",+        "description": "H-bridge high-side NMOS gate drive for half-bridge 2. Referenced to LX2 through BST2 bootstrap."+      },+      {+        "number": "12",+        "name": "LX2",+        "type": "passive",+        "description": "H-bridge switching node 2. Connect to the source of the high-side NMOS / drain of the low-side NMOS of half-bridge 2 and to the bootstrap capacitor return."+      },+      {+        "number": "13",+        "name": "BST2",+        "type": "power_in",+        "description": "Bootstrap capacitor node for half-bridge 2. Connect a bootstrap capacitor between BST2 and LX2 to generate the high-side gate drive supply."+      },+      {+        "number": "14",+        "name": "LG2",+        "type": "output",+        "description": "H-bridge low-side NMOS gate drive for half-bridge 2. Referenced to PGND."+      },+      {+        "number": "15",+        "name": "HVCC",+        "type": "power_out",+        "description": "Internal 5 V LDO output used as the boost supply for the H-bridge high-side MOSFET gate drivers. Decouple to GND with a capacitor."+      },+      {+        "number": "16",+        "name": "LG1",+        "type": "output",+        "description": "H-bridge low-side NMOS gate drive for half-bridge 1. Referenced to PGND."+      },+      {+        "number": "17",+        "name": "BST1",+        "type": "power_in",+        "description": "Bootstrap capacitor node for half-bridge 1. Connect a bootstrap capacitor between BST1 and LX1 to generate the high-side gate drive supply."+      },+      {+        "number": "18",+        "name": "LX1",+        "type": "passive",+        "description": "H-bridge switching node 1. Connect to the source of the high-side NMOS / drain of the low-side NMOS of half-bridge 1 and to the bootstrap capacitor return."+      },+      {+        "number": "19",+        "name": "HG1",+        "type": "output",+        "description": "H-bridge high-side NMOS gate drive for half-bridge 1. Referenced to LX1 through BST1 bootstrap."+      },+      {+        "number": "20",+        "name": "Test1",+        "type": "bidirectional",+        "description": "Test1 pin. Used together with Test2 for factory firmware upgrade (Method 1). Voltage range GND-0.3 V to VCC+0.3 V."+      },+      {+        "number": "21",+        "name": "LED1",+        "type": "output",+        "description": "LED1 status output. Drives an LED directly through a series current-limit resistor to indicate charging/system state."+      },+      {+        "number": "22",+        "name": "DEBUG",+        "type": "bidirectional",+        "description": "Debug pin used for internal test/debug access."+      },+      {+        "number": "23",+        "name": "Test2",+        "type": "bidirectional",+        "description": "Test2 pin. Used together with Test1 for factory firmware upgrade (Method 1). Voltage range GND-0.3 V to VCC+0.3 V."+      },+      {+        "number": "24",+        "name": "LED2",+        "type": "output",+        "description": "LED2 status output. Drives an LED directly through a series current-limit resistor to indicate charging/system state."+      },+      {+        "number": "25",+        "name": "NTC_Sense",+        "type": "input",+        "description": "NTC thermistor sense input. Trips thermal shutdown when the divider voltage drops below ~1.0 V; charging resumes when above ~1.3 V. Must be pulled high if unused."+      },+      {+        "number": "26",+        "name": "GND",+        "type": "power_in",+        "description": "Analog ground reference for the IC."+      },+      {+        "number": "27",+        "name": "Comm_V",+        "type": "input",+        "description": "Voltage-path communication/ASK demodulation input. AC-coupled from the coil voltage divider through a high-pass filter for Qi communication decoding."+      },+      {+        "number": "28",+        "name": "Comm_I",+        "type": "input",+        "description": "Current-path communication/ASK demodulation input. AC-coupled from the external current-sense op-amp output for Qi communication decoding."+      },+      {+        "number": "29",+        "name": "VDD",+        "type": "power_out",+        "description": "Internal ~1.8 V core supply LDO output. Connect a 1 uF decoupling capacitor to GND; do not drive externally."+      },+      {+        "number": "30",+        "name": "VCC",+        "type": "power_out",+        "description": "Internal ~3.15 V IO supply LDO output. Connect a 1 uF decoupling capacitor to GND; do not drive externally. Absolute max 5 V."+      },+      {+        "number": "31",+        "name": "VSYS",+        "type": "power_in",+        "description": "System power input for the IC. Recommended operating range 2.9 V to 7.4 V (absolute max 6 V per Abs-Max table - note conflict)."+      },+      {+        "number": "32",+        "name": "VBUS",+        "type": "power_in",+        "description": "VBUS charge/discharge detect pin. Absolute max 25 V; recommended operating range 4.5 V to 22 V."+      },+      {+        "number": "33",+        "name": "EPAD",+        "type": "power_in",+        "description": "Exposed thermal pad / PGND. Must be soldered to the PCB ground plane for power dissipation and to serve as the power ground return."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://datasheet.lcsc.com/datasheet/pdf/7466987fd41c4b69a9e7974bdc2f7e13.pdf",+        "pages": 18,+        "sha256": "608311f63e380a62",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 33,+        "described": 33,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "INJOINIC IP6808 NF",+      "Package": "QFN-32-EP(5x5)",+      "Category": "PMIC",+      "Pins": "33"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "ip6808_nf"+  ],+  "discovery_pitch": "IP6808_NF (INJOINIC IP6808 NF) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +288,5 @@     "docs/ip6808-nf-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file