component
IP2312U_VSET
Public Made by Adomby adom
INJOINIC IP2312U VSET Battery Management, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.md+14@@ -37,6 +37,20 @@ IP2312U_VSET from INJOINIC IP2312U VSET, in a SOP-8-EP. Pinout and pin descripti - Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm` - 3D model: SOP-8-EP (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`ip2312u-vset.step`](ip2312u-vset.step) | 125 KB | You want the bare part, or you mark your own boards. |+| [`ip2312u-vset-etched.step`](ip2312u-vset-etched.step) | 2.2 MB | You want the part with `IP2312U_VSET` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 555 faces against 152 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "ip2312u-vset",- "version": "0.1.0",+ "version": "0.2.0", "type": "component", "description": "INJOINIC IP2312U VSET Battery Management, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [
page.json+12−9@@ -4,7 +4,7 @@ "slug": "ip2312u-vset", "title": "IP2312U_VSET", "brief": "INJOINIC IP2312U VSET Battery Management, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.2.0", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -40,7 +40,7 @@ "number": "2", "name": "TEST", "type": "passive",- "description": "Test pin. Connect via a 1k\u03a9 resistor to the battery positive terminal (VBAT) in the application circuit."+ "description": "Test pin. Connect via a 1kΩ resistor to the battery positive terminal (VBAT) in the application circuit." }, { "number": "3",@@ -52,7 +52,7 @@ "number": "4", "name": "NTC", "type": "input",- "description": "Battery NTC temperature sense input. Sources 20\u00b5A into an external NTC network to GND; charger throttles above 43\u00b0C and shuts down above 45\u00b0C. Tie to GND via 51k\u03a9 if NTC function is not used (do not leave floating)."+ "description": "Battery NTC temperature sense input. Sources 20µA into an external NTC network to GND; charger throttles above 43°C and shuts down above 45°C. Tie to GND via 51kΩ if NTC function is not used (do not leave floating)." }, { "number": "5",@@ -64,25 +64,25 @@ "number": "6", "name": "ICHG", "type": "passive",- "description": "Charge-current programming pin. External resistor RICHG to GND sets constant charge current: ICC = 135000 / RICHG (A). RICHG max ~170k\u03a9; if left NC, default 2.1A is used."+ "description": "Charge-current programming pin. External resistor RICHG to GND sets constant charge current: ICC = 135000 / RICHG (A). RICHG max ~170kΩ; if left NC, default 2.1A is used." }, { "number": "7", "name": "SW", "type": "power_out",- "description": "Buck converter switch node. Connect to the 1\u00b5H power inductor going to BAT. 750kHz switching frequency; absolute max 6.5V (9V <10\u00b5s pulse)."+ "description": "Buck converter switch node. Connect to the 1µH power inductor going to BAT. 750kHz switching frequency; absolute max 6.5V (9V <10µs pulse)." }, { "number": "8", "name": "VIN", "type": "power_in",- "description": "5V charge input pin. Operating range 4.5-5.5V (typ 5V). UVLO ~4.5V, OVP ~5.6V. Bypass close to pin with 10\u00b5F + 22\u00b5F ceramic caps."+ "description": "5V charge input pin. Operating range 4.5-5.5V (typ 5V). UVLO ~4.5V, OVP ~5.6V. Bypass close to pin with 10µF + 22µF ceramic caps." }, { "number": "9", "name": "EPAD", "type": "power_in",- "description": "Exposed thermal pad on package underside - device GND. Must be soldered to the PCB ground plane for proper electrical and thermal performance (\u03b8JA=60 \u00b0C/W)."+ "description": "Exposed thermal pad on package underside - device GND. Must be soldered to the PCB ground plane for proper electrical and thermal performance (θJA=60 °C/W)." } ], "provenance": {@@ -156,6 +156,9 @@ "docs/hero.png", "docs/ip2312u-vset-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"- ]+ "viewers/footprint.html",+ "pads.json"+ ],+ "description": "INJOINIC IP2312U VSET Battery Management, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "visibility": "public" }