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IP2312U_VSET
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INJOINIC IP2312U VSET Battery Management, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+48@@ -0,0 +1,48 @@+# IP2312U_VSET++**INJOINIC IP2312U VSET** · Battery Management · SOP-8-EP++IP2312U_VSET from INJOINIC IP2312U VSET, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | D1 | bidirectional | LED1 drive pin, also used for battery-type (full-charge voltage) selection via a pull-down resistor RVSET to GND: NC=4.2V, 43k=4.3V, 75k=4.35V, 100k=4.4V. Muxed function: at power-up the pin senses RVSET, then it drives the charge-status LED. |+| 2 | TEST | passive | Test pin. Connect via a 1kΩ resistor to the battery positive terminal (VBAT) in the application circuit. |+| 3 | D2 | output | LED2 drive pin for charge-status indication (typ. 5mA, range 3-10mA). Used in 2-LED indication mode alongside D1. |+| 4 | NTC | input | Battery NTC temperature sense input. Sources 20µA into an external NTC network to GND; charger throttles above 43°C and shuts down above 45°C. Tie to GND via 51kΩ if NTC function is not used (do not leave floating). |+| 5 | BAT | power_out | Battery connection pin. Connects to the Li-ion battery positive terminal; charge target voltage 4.15/4.2/4.23V (typ) with recharge threshold 4.1V. |+| 6 | ICHG | passive | Charge-current programming pin. External resistor RICHG to GND sets constant charge current: ICC = 135000 / RICHG (A). RICHG max ~170kΩ; if left NC, default 2.1A is used. |+| 7 | SW | power_out | Buck converter switch node. Connect to the 1µH power inductor going to BAT. 750kHz switching frequency; absolute max 6.5V (9V <10µs pulse). |+| 8 | VIN | power_in | 5V charge input pin. Operating range 4.5-5.5V (typ 5V). UVLO ~4.5V, OVP ~5.6V. Bypass close to pin with 10µF + 22µF ceramic caps. |+| 9 | EPAD | power_in | Exposed thermal pad on package underside - device GND. Must be soldered to the PCB ground plane for proper electrical and thermal performance (θJA=60 °C/W). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | INJOINIC IP2312U VSET |+| Package | SOP-8-EP |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++- `IP2312U_VSETVSET`++## CAD (KiCad official)++- Symbol: `IP2312U_VSET`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOP-8-EP (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [INJOINIC IP2312U VSET datasheet](docs/ip2312u-vset-datasheet.pdf) (11 pp, sha256 `c5a61e5feddba061`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ip2312u-vset-datasheet.pdf)
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