component
HEF4094BTTJ
Public Made by Adomby adom
Nexperia Shifting Register, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+164−8@@ -1,13 +1,174 @@ {+ "schema_version": 1,+ "type": "component", "slug": "hef4094bttj",+ "title": "HEF4094BTTJ",+ "brief": "Nexperia Shifting Register, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Nexperia Shifting Register, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "hef4094bttj" ],+ "component": {+ "mpn": "HEF4094BTTJ",+ "manufacturer": "Nexperia",+ "package": "TSSOP-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Shifting Register",+ "datasheet": "https://assets.nexperia.com/documents/data-sheet/HEF4094BTTJ.pdf",+ "parts": {+ "symbol": "hef4094bttj.kicad_sym",+ "footprint": "hef4094bttj.kicad_mod",+ "model_3d": "hef4094bttj.glb",+ "model_3d_step": "hef4094bttj.step",+ "lbr": "hef4094bttj.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "STR",+ "type": "input",+ "description": "Strobe input. When STR is HIGH, data in the 8-stage shift register is transferred to the 8-bit storage register (latched to the parallel outputs)."+ },+ {+ "number": "2",+ "name": "D",+ "type": "input",+ "description": "Serial data input. Sampled on the LOW-to-HIGH transition of CP and shifted into stage 0 of the shift register."+ },+ {+ "number": "3",+ "name": "CP",+ "type": "input",+ "description": "Shift register clock input. Data on D is shifted on the LOW-to-HIGH (positive) transition of CP."+ },+ {+ "number": "4",+ "name": "QP0",+ "type": "tri_state",+ "description": "3-state parallel output bit 0 from the storage register. High-impedance when OE is LOW; drives CMOS output levels when OE is HIGH."+ },+ {+ "number": "5",+ "name": "QP1",+ "type": "tri_state",+ "description": "3-state parallel output bit 1 from the storage register. High-impedance when OE is LOW."+ },+ {+ "number": "6",+ "name": "QP2",+ "type": "tri_state",+ "description": "3-state parallel output bit 2 from the storage register. High-impedance when OE is LOW."+ },+ {+ "number": "7",+ "name": "QP3",+ "type": "tri_state",+ "description": "3-state parallel output bit 3 from the storage register. High-impedance when OE is LOW."+ },+ {+ "number": "8",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground supply voltage (0 V reference). All limiting values and logic levels are referenced to VSS."+ },+ {+ "number": "9",+ "name": "QS1",+ "type": "output",+ "description": "Serial output that mirrors stage 7 data on the LOW-to-HIGH transition of CP; used to cascade devices when clock edges are fast."+ },+ {+ "number": "10",+ "name": "QS2",+ "type": "output",+ "description": "Serial output that mirrors stage 7 data on the HIGH-to-LOW transition of CP; used to cascade devices when clock edges are slow."+ },+ {+ "number": "11",+ "name": "QP7",+ "type": "tri_state",+ "description": "3-state parallel output bit 7 from the storage register. High-impedance when OE is LOW."+ },+ {+ "number": "12",+ "name": "QP6",+ "type": "tri_state",+ "description": "3-state parallel output bit 6 from the storage register. High-impedance when OE is LOW."+ },+ {+ "number": "13",+ "name": "QP5",+ "type": "tri_state",+ "description": "3-state parallel output bit 5 from the storage register. High-impedance when OE is LOW."+ },+ {+ "number": "14",+ "name": "QP4",+ "type": "tri_state",+ "description": "3-state parallel output bit 4 from the storage register. High-impedance when OE is LOW."+ },+ {+ "number": "15",+ "name": "OE",+ "type": "input",+ "description": "Active-HIGH output enable. When HIGH the QP0-QP7 outputs are driven; when LOW they are placed into a high-impedance OFF-state. Does not affect the internal register contents."+ },+ {+ "number": "16",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply voltage. Recommended operating range 3 V to 15 V (absolute maximum 18 V)."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://assets.nexperia.com/documents/data-sheet/HEF4094BTTJ.pdf",+ "pages": 15,+ "sha256": "0020655a9e8cad90",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Nexperia",+ "Package": "TSSOP-16",+ "Category": "Logic",+ "Pins": "16"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "hef4094bttj"+ ],+ "discovery_pitch": "HEF4094BTTJ (Nexperia) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +186,5 @@ "docs/hef4094bttj-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }