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hef4094bt: factory component page (tier=mfr)

Ray ·320a970e6b ·2mo ago ·parent 3ee55d9
1 file changed +164−8
page.json+164−8
@@ -1,13 +1,174 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "hef4094bt",+  "title": "HEF4094BT",+  "brief": "Nexperia Shifting Register, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Nexperia Shifting Register, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "hef4094bt"   ],+  "component": {+    "mpn": "HEF4094BT",+    "manufacturer": "Nexperia",+    "package": "SOIC-16",+    "pin_count": 16,+    "category": "Logic",+    "subcategory": "Shifting Register",+    "datasheet": "https://assets.nexperia.com/documents/data-sheet/HEF4094BT.pdf",+    "parts": {+      "symbol": "hef4094bt.kicad_sym",+      "footprint": "hef4094bt.kicad_mod",+      "model_3d": "hef4094bt.glb",+      "model_3d_step": "hef4094bt.step",+      "lbr": "hef4094bt.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "STR",+        "type": "input",+        "description": "Strobe input. When HIGH, data in the 8-bit shift register is transferred into the 8-bit storage register that drives the QP0-QP7 parallel outputs."+      },+      {+        "number": "2",+        "name": "D",+        "type": "input",+        "description": "Serial data input. Sampled on the LOW-to-HIGH transition of CP and shifted into the first stage of the shift register."+      },+      {+        "number": "3",+        "name": "CP",+        "type": "input",+        "description": "Clock input for the 8-stage shift register. Data on D is shifted on the LOW-to-HIGH (positive) transition of CP."+      },+      {+        "number": "4",+        "name": "QP0",+        "type": "tri_state",+        "description": "Parallel output bit 0 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."+      },+      {+        "number": "5",+        "name": "QP1",+        "type": "tri_state",+        "description": "Parallel output bit 1 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."+      },+      {+        "number": "6",+        "name": "QP2",+        "type": "tri_state",+        "description": "Parallel output bit 2 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."+      },+      {+        "number": "7",+        "name": "QP3",+        "type": "tri_state",+        "description": "Parallel output bit 3 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."+      },+      {+        "number": "8",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground supply voltage (0 V reference). All input/output voltages are referenced to VSS."+      },+      {+        "number": "9",+        "name": "QS1",+        "type": "output",+        "description": "Serial output for cascading. Data appears at QS1 on the LOW-to-HIGH transition of CP (allows cascading when clock edges are fast)."+      },+      {+        "number": "10",+        "name": "QS2",+        "type": "output",+        "description": "Serial output for cascading. Data appears at QS2 on the next HIGH-to-LOW transition of CP (allows cascading when clock edges are slow)."+      },+      {+        "number": "11",+        "name": "QP7",+        "type": "tri_state",+        "description": "Parallel output bit 7 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."+      },+      {+        "number": "12",+        "name": "QP6",+        "type": "tri_state",+        "description": "Parallel output bit 6 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."+      },+      {+        "number": "13",+        "name": "QP5",+        "type": "tri_state",+        "description": "Parallel output bit 5 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."+      },+      {+        "number": "14",+        "name": "QP4",+        "type": "tri_state",+        "description": "Parallel output bit 4 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."+      },+      {+        "number": "15",+        "name": "OE",+        "type": "input",+        "description": "Output enable input. HIGH enables the QP0-QP7 parallel outputs; LOW places them in a high-impedance OFF-state. Does not affect the state of the shift or storage registers."+      },+      {+        "number": "16",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply voltage. Recommended operating range 3 V to 15 V; absolute max 18 V referenced to VSS."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://assets.nexperia.com/documents/data-sheet/HEF4094BT.pdf",+        "pages": 15,+        "sha256": "0020655a9e8cad90",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Nexperia",+      "Package": "SOIC-16",+      "Category": "Logic",+      "Pins": "16"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "hef4094bt"+  ],+  "discovery_pitch": "HEF4094BT (Nexperia) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +186,5 @@     "docs/hef4094bt-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file