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hef4093bt: factory component page (tier=mfr)

Ray ·64ce5493f9 · ·parent 7604323
1 file changed +152−8
page.json+152−8
@@ -1,13 +1,162 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "hef4093bt",+  "title": "HEF4093BT",+  "brief": "Nexperia Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Nexperia Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "hef4093bt"   ],+  "component": {+    "mpn": "HEF4093BT",+    "manufacturer": "Nexperia",+    "package": "SOIC-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Gates",+    "datasheet": "https://assets.nexperia.com/documents/data-sheet/HEF4093BT.pdf",+    "parts": {+      "symbol": "hef4093bt.kicad_sym",+      "footprint": "hef4093bt.kicad_mod",+      "model_3d": "hef4093bt.glb",+      "model_3d_step": "hef4093bt.step",+      "lbr": "hef4093bt.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "1A",+        "type": "input",+        "description": "Gate 1, Schmitt trigger input A. CMOS logic input with hysteresis; unused inputs must be tied to VDD, VSS, or another input."+      },+      {+        "number": "2",+        "name": "1B",+        "type": "input",+        "description": "Gate 1, Schmitt trigger input B. CMOS logic input with hysteresis; unused inputs must be tied to VDD, VSS, or another input."+      },+      {+        "number": "3",+        "name": "1Y",+        "type": "output",+        "description": "Gate 1 NAND output. Push-pull CMOS output; Y = NOT(A AND B)."+      },+      {+        "number": "4",+        "name": "2Y",+        "type": "output",+        "description": "Gate 2 NAND output. Push-pull CMOS output; Y = NOT(A AND B)."+      },+      {+        "number": "5",+        "name": "2A",+        "type": "input",+        "description": "Gate 2, Schmitt trigger input A. CMOS logic input with hysteresis; unused inputs must be tied to VDD, VSS, or another input."+      },+      {+        "number": "6",+        "name": "2B",+        "type": "input",+        "description": "Gate 2, Schmitt trigger input B. CMOS logic input with hysteresis; unused inputs must be tied to VDD, VSS, or another input."+      },+      {+        "number": "7",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground reference, 0 V. Negative supply rail for the device."+      },+      {+        "number": "8",+        "name": "3A",+        "type": "input",+        "description": "Gate 3, Schmitt trigger input A. CMOS logic input with hysteresis; unused inputs must be tied to VDD, VSS, or another input."+      },+      {+        "number": "9",+        "name": "3B",+        "type": "input",+        "description": "Gate 3, Schmitt trigger input B. CMOS logic input with hysteresis; unused inputs must be tied to VDD, VSS, or another input."+      },+      {+        "number": "10",+        "name": "3Y",+        "type": "output",+        "description": "Gate 3 NAND output. Push-pull CMOS output; Y = NOT(A AND B)."+      },+      {+        "number": "11",+        "name": "4Y",+        "type": "output",+        "description": "Gate 4 NAND output. Push-pull CMOS output; Y = NOT(A AND B)."+      },+      {+        "number": "12",+        "name": "4A",+        "type": "input",+        "description": "Gate 4, Schmitt trigger input A. CMOS logic input with hysteresis; unused inputs must be tied to VDD, VSS, or another input."+      },+      {+        "number": "13",+        "name": "4B",+        "type": "input",+        "description": "Gate 4, Schmitt trigger input B. CMOS logic input with hysteresis; unused inputs must be tied to VDD, VSS, or another input."+      },+      {+        "number": "14",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply voltage. Recommended operating range 3 V to 15 V; absolute max 18 V referenced to VSS."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://assets.nexperia.com/documents/data-sheet/HEF4093BT.pdf",+        "pages": 14,+        "sha256": "f160789ec027b791",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Nexperia",+      "Package": "SOIC-14",+      "Category": "Logic",+      "Pins": "14"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "hef4093bt"+  ],+  "discovery_pitch": "HEF4093BT (Nexperia) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +174,5 @@     "docs/hef4093bt-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file