component
HCF4093YM013TR
Public Made by Adomby adom
STMicroelectronics Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+16−13@@ -32,37 +32,37 @@ "number": "1", "name": "A", "type": "input",- "description": "Gate 1 Schmitt-trigger input A. Combined with input B to form NAND output J = NOT(A\u00b7B). Input voltage range 0 to VDD."+ "description": "Gate 1 Schmitt-trigger input A. Combined with input B to form NAND output J = NOT(A·B). Input voltage range 0 to VDD." }, { "number": "2", "name": "B", "type": "input",- "description": "Gate 1 Schmitt-trigger input B. Combined with input A to form NAND output J = NOT(A\u00b7B). Input voltage range 0 to VDD."+ "description": "Gate 1 Schmitt-trigger input B. Combined with input A to form NAND output J = NOT(A·B). Input voltage range 0 to VDD." }, { "number": "3", "name": "J", "type": "output",- "description": "Gate 1 NAND output, J = NOT(A\u00b7B). Standardized symmetrical CMOS output; typical drive of a few mA depending on VDD."+ "description": "Gate 1 NAND output, J = NOT(A·B). Standardized symmetrical CMOS output; typical drive of a few mA depending on VDD." }, { "number": "4", "name": "K", "type": "output",- "description": "Gate 2 NAND output, K = NOT(C\u00b7D). Standardized symmetrical CMOS output."+ "description": "Gate 2 NAND output, K = NOT(C·D). Standardized symmetrical CMOS output." }, { "number": "5", "name": "C", "type": "input",- "description": "Gate 2 Schmitt-trigger input C. Combined with input D to form NAND output K = NOT(C\u00b7D). Input voltage range 0 to VDD."+ "description": "Gate 2 Schmitt-trigger input C. Combined with input D to form NAND output K = NOT(C·D). Input voltage range 0 to VDD." }, { "number": "6", "name": "D", "type": "input",- "description": "Gate 2 Schmitt-trigger input D. Combined with input C to form NAND output K = NOT(C\u00b7D). Input voltage range 0 to VDD."+ "description": "Gate 2 Schmitt-trigger input D. Combined with input C to form NAND output K = NOT(C·D). Input voltage range 0 to VDD." }, { "number": "7",@@ -74,37 +74,37 @@ "number": "8", "name": "E", "type": "input",- "description": "Gate 3 Schmitt-trigger input E. Combined with input F to form NAND output L = NOT(E\u00b7F). Input voltage range 0 to VDD."+ "description": "Gate 3 Schmitt-trigger input E. Combined with input F to form NAND output L = NOT(E·F). Input voltage range 0 to VDD." }, { "number": "9", "name": "F", "type": "input",- "description": "Gate 3 Schmitt-trigger input F. Combined with input E to form NAND output L = NOT(E\u00b7F). Input voltage range 0 to VDD."+ "description": "Gate 3 Schmitt-trigger input F. Combined with input E to form NAND output L = NOT(E·F). Input voltage range 0 to VDD." }, { "number": "10", "name": "L", "type": "output",- "description": "Gate 3 NAND output, L = NOT(E\u00b7F). Standardized symmetrical CMOS output."+ "description": "Gate 3 NAND output, L = NOT(E·F). Standardized symmetrical CMOS output." }, { "number": "11", "name": "M", "type": "output",- "description": "Gate 4 NAND output, M = NOT(G\u00b7H). Standardized symmetrical CMOS output."+ "description": "Gate 4 NAND output, M = NOT(G·H). Standardized symmetrical CMOS output." }, { "number": "12", "name": "G", "type": "input",- "description": "Gate 4 Schmitt-trigger input G. Combined with input H to form NAND output M = NOT(G\u00b7H). Input voltage range 0 to VDD."+ "description": "Gate 4 Schmitt-trigger input G. Combined with input H to form NAND output M = NOT(G·H). Input voltage range 0 to VDD." }, { "number": "13", "name": "H", "type": "input",- "description": "Gate 4 Schmitt-trigger input H. Combined with input G to form NAND output M = NOT(G\u00b7H). Input voltage range 0 to VDD."+ "description": "Gate 4 Schmitt-trigger input H. Combined with input G to form NAND output M = NOT(G·H). Input voltage range 0 to VDD." }, { "number": "14",@@ -174,5 +174,8 @@ "docs/hcf4093ym013tr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }