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Initial commit: component/hcf4093ym013tr

Ray ·18d44aaee7 ·2mo ago
2 files changed +87
README.mdadded+53
@@ -0,0 +1,53 @@+# HCF4093YM013TR++**STMicroelectronics** · Gates · SOIC-14++HCF4093YM013TR from STMicroelectronics, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A | input | Gate 1 Schmitt-trigger input A. Combined with input B to form NAND output J = NOT(A·B). Input voltage range 0 to VDD. |+| 2 | B | input | Gate 1 Schmitt-trigger input B. Combined with input A to form NAND output J = NOT(A·B). Input voltage range 0 to VDD. |+| 3 | J | output | Gate 1 NAND output, J = NOT(A·B). Standardized symmetrical CMOS output; typical drive of a few mA depending on VDD. |+| 4 | K | output | Gate 2 NAND output, K = NOT(C·D). Standardized symmetrical CMOS output. |+| 5 | C | input | Gate 2 Schmitt-trigger input C. Combined with input D to form NAND output K = NOT(C·D). Input voltage range 0 to VDD. |+| 6 | D | input | Gate 2 Schmitt-trigger input D. Combined with input C to form NAND output K = NOT(C·D). Input voltage range 0 to VDD. |+| 7 | VSS | power_in | Negative supply voltage (ground reference). Typically tied to 0 V. |+| 8 | E | input | Gate 3 Schmitt-trigger input E. Combined with input F to form NAND output L = NOT(E·F). Input voltage range 0 to VDD. |+| 9 | F | input | Gate 3 Schmitt-trigger input F. Combined with input E to form NAND output L = NOT(E·F). Input voltage range 0 to VDD. |+| 10 | L | output | Gate 3 NAND output, L = NOT(E·F). Standardized symmetrical CMOS output. |+| 11 | M | output | Gate 4 NAND output, M = NOT(G·H). Standardized symmetrical CMOS output. |+| 12 | G | input | Gate 4 Schmitt-trigger input G. Combined with input H to form NAND output M = NOT(G·H). Input voltage range 0 to VDD. |+| 13 | H | input | Gate 4 Schmitt-trigger input H. Combined with input G to form NAND output M = NOT(G·H). Input voltage range 0 to VDD. |+| 14 | VDD | power_in | Positive supply voltage. Recommended operating range 3 V to 20 V; absolute maximum -0.5 V to +22 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SOIC-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++- `HCF4093YM013TR`++## CAD (KiCad official)++- Symbol: `HCF4093YM013TR`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/hcf4093ym013tr.pdf) (13 pp, sha256 `176bf12cad202590`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/hcf4093ym013tr-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "hcf4093ym013tr",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "hcf4093ym013tr"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "hcf4093ym013tr.kicad_sym",+    "hcf4093ym013tr.kicad_mod",+    "hcf4093ym013tr.glb",+    "hcf4093ym013tr.step",+    "hcf4093ym013tr.lbr",+    "docs/hero.png",+    "docs/hcf4093ym013tr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file