HC32F030J8TA-LQ48

@@ -0,0 +1,95 @@+# HC32F030J8TA-LQ48++**XHSC** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)++HC32F030J8TA-LQ48 from XHSC, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCAP | power_out | Internal LDO 1.5V core-supply output. Requires an external decoupling capacitor >= 1uF to VSS. Do not load externally. |+| 2 | PC13 | bidirectional | General-purpose I/O port C bit 13. Alt: TIM3_CH1B (digital), LVD_IN0 (analog voltage-detect input). |+| 3 | XTLI/PC14 | bidirectional | Low-speed crystal oscillator input (XTLI) shared with GPIO PC14. Function selected by clock/GPIO configuration registers. |+| 4 | XTLO/PC15 | bidirectional | Low-speed crystal oscillator output (XTLO) shared with GPIO PC15. |+| 5 | XTHI/PD00 | bidirectional | High-speed crystal oscillator input (XTHI) shared with GPIO PD00. Alt: I2C0_SDA, UART1_TXD. |+| 6 | XTHO/PD01 | bidirectional | High-speed crystal oscillator output (XTHO) shared with GPIO PD01. Alt: I2C0_SCL, TIM4_CHB, UART1_RXD. |+| 7 | RESETB | input | Active-low external reset input. Internal pull-up; drive low to reset the MCU. |+| 8 | AVSS | power_in | Analog ground reference for ADC/VC/OPA/LVD blocks. |+| 9 | AVCC | power_in | Analog supply for ADC/VC/OPA/LVD. Operating range 2.0-5.5V; tie to DVCC through a ferrite/RC filter. |+| 10 | PA00 | bidirectional | GPIO PA0. Alt digital: UART1_CTS, TIM0_ETR, VC0_OUT, TIM1_CHA, TIM3_ETR, TIM0_CHA. Analog: AIN0, VC0/VC1 inputs. |+| 11 | PA01 | bidirectional | GPIO PA1. Alt digital: UART1_RTS, TIM0_CHB, TIM1_ETR, TIM1_CHB, HCLK_OUT, SPI1_MOSI. Analog: AIN1, VC inputs. |+| 12 | PA02 | bidirectional | GPIO PA2. Alt digital: UART1_TXD, TIM0_CHA, VC1_OUT, TIM1_CHA, TIM2_CHA, PCLK_OUT, SPI1_MISO. Analog: AIN2, VC inputs. |+| 13 | PA03 | bidirectional | GPIO PA3. Alt digital: UART1_RXD, TIM0_GATE, TIM1_CHB, TIM2_CHB, SPI1_CS, TIM3_CH1A, TIM5_CHA. Analog: AIN3, VC inputs. |+| 14 | PA04 | bidirectional | GPIO PA4. Alt digital: SPI0_CS, UART1_TXD, PCA_CH4, TIM2_ETR, TIM5_CHA, LVD_OUT, TIM3_CH2B. Analog: AIN4, VC inputs. |+| 15 | PA05 | bidirectional | GPIO PA5. Alt digital: SPI0_SCK, TIM0_ETR, PCA_ECI, TIM0_CHA, TIM5_CHB, XTL_OUT, XTH_OUT. Analog: AIN5, VC inputs. |+| 16 | PA06 | bidirectional | GPIO PA6. Alt digital: SPI0_MISO, PCA_CH0, TIM3_BK, TIM1_CHA, VC0_OUT, TIM3_GATE. Analog: AIN6, VC inputs. |+| 17 | PA07 | bidirectional | GPIO PA7. Alt digital: SPI0_MOSI, PCA_CH1, HCLK_OUT, TIM3_CH0B, TIM2_CHA, VC1_OUT, TIM4_CHB. Analog: AIN7, VC inputs. |+| 18 | PB00 | bidirectional | GPIO PB0. Alt digital: PCA_CH2, TIM3_CH1B, TIM5_CHB, RCH_OUT, RCL_OUT, PLL_OUT. Analog: AIN8, VC inputs. |+| 19 | PB01 | bidirectional | GPIO PB1. Alt digital: PCA_CH3, PCLK_OUT, TIM3_CH2B, TIM6_CHB. Analog: AIN9/EXVREF (external ADC reference), VC inputs. |+| 20 | PB02 | bidirectional | GPIO PB2. Alt digital: PCA_ECI, TIM4_CHA, TIM1_BK, TIM0_BK, TIM2_BK. Analog: AIN16, VC1 inputs, OP2_INN. |+| 21 | PB10 | bidirectional | GPIO PB10. Alt digital: I2C1_SCL, SPI1_CLK, TIM1_CHA, TIM3_CH1A, UART1_RTS. Analog: AIN17, VC1_INP8, OP2_INP. |+| 22 | PB11 | bidirectional | GPIO PB11. Alt digital: I2C1_SDA, TIM1_CHB, TIM2_GATE, TIM6_CHA, UART1_CTS. Analog: AIN18, OP2_OUT. |+| 23 | DVSS | power_in | Digital ground. Connect to system ground plane. |+| 24 | DVCC | power_in | Digital supply, 2.0-5.5V. Decouple locally to DVSS. |+| 25 | PB12 | bidirectional | GPIO PB12. Alt digital: SPI1_CS, TIM3_BK, TIM0_BK, TIM6_CHA. Analog: AIN19, VC1_INP9, OP1_INN. |+| 26 | PB13 | bidirectional | GPIO PB13. Alt digital: SPI1_CLK, I2C1_SCL, TIM3_CH0B, TIM1_CHA, TIM1_GATE, TIM6_CHB. Analog: AIN20, VC1_INP10, OP1_INP. |+| 27 | PB14 | bidirectional | GPIO PB14. Alt digital: SPI1_MISO, I2C1_SDA, TIM3_CH1B, TIM0_CHA, TIM1_BK. Analog: AIN21, VC1_INP11, OP1_OUT. |+| 28 | PB15 | bidirectional | GPIO PB15. Alt digital: SPI1_MOSI, TIM3_CH2B, TIM0_CHB, TIM0_GATE. Analog: AIN22, OP0_INN. |+| 29 | PA08 | bidirectional | GPIO PA8. Alt digital: UART0_TXD, TIM3_CH0A, TIM1_GATE, TIM4_CHA, TIM3_BK. |+| 30 | PA09 | bidirectional | GPIO PA9. Alt digital: UART0_TXD, TIM3_CH1A, TIM0_BK, I2C0_SCL, HCLK_OUT, TIM5_CHA. |+| 31 | PA10 | bidirectional | GPIO PA10. Alt digital: UART0_RXD, TIM3_CH2A, TIM2_BK, I2C0_SDA, TIM2_GATE, PCLK_OUT, TIM6_CHA. |+| 32 | PA11 | bidirectional | GPIO PA11. Alt digital: UART0_CTS, TIM3_GATE, I2C1_SCL, VC0_OUT, SPI0_MISO, TIM4_CHB. |+| 33 | PA12 | bidirectional | GPIO PA12. Alt digital: UART0_RTS, TIM3_ETR, I2C1_SDA, VC1_OUT, SPI0_MOSI, IR_OUT. |+| 34 | PA13/SWDIO | bidirectional | SWD data I/O (default after reset) shared with GPIO PA13. Alt: UART0_RXD, LVD_OUT, TIM3_ETR, IR_OUT. |+| 35 | PD06 | bidirectional | GPIO PD6. Alt digital: I2C1_SCL, UART0_CTS. |+| 36 | PD07 | bidirectional | GPIO PD7. Alt digital: I2C1_SDA, UART0_RTS. |+| 37 | PA15 | bidirectional | GPIO PA15. Alt digital: SPI0_CS, UART1_RXD, TIM0_ETR, TIM0_CHA, TIM3_CH1A. |+| 38 | PB03 | bidirectional | GPIO PB3. Alt digital: SPI0_CLK, TIM0_CHB, TIM1_GATE, TIM3_CH0A, XTL_OUT, XTH_OUT. Analog: VC1_INN9. |+| 39 | PB04 | bidirectional | GPIO PB4. Alt digital: SPI0_MISO, PCA_CH0, TIM2_BK, UART0_CTS, TIM2_GATE, TIM3_CH0B. Analog: VC0_INP12, VC1_INP12, VC1_INN10. |+| 40 | PB05 | bidirectional | GPIO PB5. Alt digital: SPI0_MOSI, TIM1_BK, PCA_CH1, UART0_RTS. Analog: VC0_INP13, VC1_INP13. |+| 41 | PB06 | bidirectional | GPIO PB6. Alt digital: I2C0_SCL, UART0_TXD, TIM1_CHB, TIM0_CHA, TIM3_CH0A. Analog: VC0_INP14, VC1_INP14. |+| 42 | PB07 | bidirectional | GPIO PB7. Alt digital: I2C0_SDA, UART0_RXD, TIM2_CHB, TIM0_CHB. Analog: VC0_INP15, VC1_INP15, LVD_IN2. |+| 43 | PB08 | bidirectional | GPIO PB8. Alt digital: I2C0_SCL, TIM1_CHA, TIM2_CHA, TIM0_GATE, TIM3_CH2A, UART0_TXD. Analog: LVD_IN1. |+| 44 | PB09 | bidirectional | GPIO PB9. Alt digital: I2C0_SDA, IR_OUT, SPI1_CS, TIM2_CHA, TIM2_CHB, UART0_RXD. |+| 45 | DVSS | power_in | Digital ground (second bond). |+| 46 | DVCC | power_in | Digital supply (second bond), 2.0-5.5V. |+| 47 | BOOT0 | input | Boot-mode select (PD03/BOOT0). Sampled at reset: high = ISP boot from ROM, low = user code from Flash. |+| 48 | PA14/SWCLK | bidirectional | SWD clock (default after reset) shared with GPIO PA14. Alt: UART1_TXD, UART0_TXD, TIM3_CH2A, LVD_OUT, RCH_OUT, RCL_OUT, PLL_OUT. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | XHSC |+| Package | LQFP-48(7x7) |+| Category | MCU |+| Pins | 48 |++## Ordering variants++Same part, different packaging or reel option.++- `HC32F030J8TA-LQ48`+- `HC32F030J8TA-LQ48K8TA`+- `HC32F030J8TA-LQ48H8TA`+- `HC32F030J8TA-LQ48F8TA`+- `HC32F030J8TA-LQ48F8UA`+- `HC32F030J8TA-LQ48E8PA`++## CAD (KiCad official)++- Symbol: `HC32F030J8TA-LQ48`+- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`+- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [XHSC datasheet](docs/hc32f030j8ta-lq48-datasheet.pdf) (80 pp, sha256 `c1f5c05168fa2ea7`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/hc32f030j8ta-lq48-datasheet.pdf)