component
GS8554-SR
Public Made by Adomby adom
Gainsil Precision OpAmps, SOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
gs8554-sr: factory component page (tier=lcsc)
3 files changed
+40−35
README.md+16−14@@ -8,20 +8,20 @@ GS8554-SR from Gainsil, in a SOP-14. Pinout and pin descriptions extracted from | Pin | Name | Type | Function | |---|---|---|---|-| 1 | OUTA | output | Amplifier A output. Rail-to-rail output stage; swings within ~5mV of VDD/VSS at light loads (>100kΩ) and ~60mV at 10kΩ. Short-circuit current ~60mA. |-| 2 | INA- | input | Amplifier A inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA. |-| 3 | INA+ | input | Amplifier A non-inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA. |-| 4 | VDD | power_in | Positive supply. Single-supply +1.8V to +5.5V (or dual ±0.9V to ±2.75V). Absolute max 7.5V referenced to VSS. Bypass with 0.1µF ceramic close to pin. |-| 5 | INB+ | input | Amplifier B non-inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA. |-| 6 | INB- | input | Amplifier B inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA. |-| 7 | OUTB | output | Amplifier B output. Rail-to-rail output stage; swings within ~5mV of VDD/VSS at light loads (>100kΩ) and ~60mV at 10kΩ. Short-circuit current ~60mA. |-| 8 | OUTC | output | Amplifier C output. Rail-to-rail output stage; swings within ~5mV of VDD/VSS at light loads (>100kΩ) and ~60mV at 10kΩ. Short-circuit current ~60mA. |-| 9 | INC- | input | Amplifier C inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA. |-| 10 | INC+ | input | Amplifier C non-inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA. |-| 11 | VSS | power_in | Negative supply / ground. Tie to GND in single-supply operation, or to negative rail in dual-supply. In dual-supply, bypass with 0.1µF ceramic close to pin. |-| 12 | IND+ | input | Amplifier D non-inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA. |-| 13 | IND- | input | Amplifier D inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA. |-| 14 | OUTD | output | Amplifier D output. Rail-to-rail output stage; swings within ~5mV of VDD/VSS at light loads (>100kΩ) and ~60mV at 10kΩ. Short-circuit current ~60mA. |+| 1 | OUTA | output | Amplifier A output. Rail-to-rail CMOS output stage capable of ~65 mA typical output current; short-circuit limit 60 mA. |+| 2 | INA- | input | Amplifier A inverting input. Analog input range Vss-0.5 V to VDD+0.5 V (abs max); rail-to-rail input; input bias current ~20 pA typ. |+| 3 | INA+ | input | Amplifier A non-inverting input. Rail-to-rail input; input bias current ~20 pA typ. |+| 4 | VDD | power_in | Positive supply rail. Single-supply operating range +1.8 V to +5.5 V (abs max -0.5 V to +7.5 V with respect to VSS). Bypass locally with a low-ESR ceramic capacitor. |+| 5 | INB+ | input | Amplifier B non-inverting input. Rail-to-rail input; input bias current ~20 pA typ. |+| 6 | INB- | input | Amplifier B inverting input. Rail-to-rail input; input bias current ~20 pA typ. |+| 7 | OUTB | output | Amplifier B output. Rail-to-rail CMOS output stage; typ output current 65 mA; short-circuit limit 60 mA. |+| 8 | OUTC | output | Amplifier C output. Rail-to-rail CMOS output stage; typ output current 65 mA; short-circuit limit 60 mA. |+| 9 | INC- | input | Amplifier C inverting input. Rail-to-rail input; input bias current ~20 pA typ. |+| 10 | INC+ | input | Amplifier C non-inverting input. Rail-to-rail input; input bias current ~20 pA typ. |+| 11 | VSS | power_in | Negative supply / ground. Tied to system ground in single-supply operation, or to the negative rail in split-supply operation. Abs max VDD-VSS = 7.5 V. |+| 12 | IND+ | input | Amplifier D non-inverting input. Rail-to-rail input; input bias current ~20 pA typ. |+| 13 | IND- | input | Amplifier D inverting input. Rail-to-rail input; input bias current ~20 pA typ. |+| 14 | OUTD | output | Amplifier D output. Rail-to-rail CMOS output stage; typ output current 65 mA; short-circuit limit 60 mA. | ## Key specifications @@ -35,7 +35,9 @@ GS8554-SR from Gainsil, in a SOP-14. Pinout and pin descriptions extracted from ## Ordering variants - `GS8554-SRSR`+- `GS8554-SR` - `GS8554-SRTR`+- `GS8554-SRGS8554-TR` ## CAD (KiCad official)
gs8554-sr.lbr+9−3@@ -50,7 +50,7 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description></description>+<description>Gainsil Precision OpAmps, SOP-14</description> <packages> <package name="SOIC-14_3.9x8.7mm_P1.27mm"> <description>SOIC-14, 3.9 x 8.7 mm, 1.27 mm pitch</description>@@ -92,6 +92,7 @@ </packages> <symbols> <symbol name="GS8554-SR">+ <description>Gainsil Precision OpAmps, SOP-14</description> <wire x1="-12.7" y1="10.16" x2="12.7" y2="10.16" width="0.254" layer="94"/> <wire x1="12.7" y1="10.16" x2="12.7" y2="-10.16" width="0.254" layer="94"/> <wire x1="12.7" y1="-10.16" x2="-12.7" y2="-10.16" width="0.254" layer="94"/>@@ -116,7 +117,7 @@ </symbols> <devicesets> <deviceset name="GS8554-SR" prefix="U">- <description></description>+ <description>Gainsil Precision OpAmps, SOP-14</description> <gates> <gate name="G$1" symbol="GS8554-SR" x="0" y="0"/> </gates>@@ -138,7 +139,12 @@ <connect gate="G$1" pin="INC-" pad="9"/> <connect gate="G$1" pin="OUTC" pad="8"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="GS8554-SR" constant="no"/>+ <attribute name="MANUFACTURER" value="Gainsil" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>
page.json+15−18@@ -32,85 +32,85 @@ "number": "1", "name": "OUTA", "type": "output",- "description": "Amplifier A output. Rail-to-rail output stage; swings within ~5mV of VDD/VSS at light loads (>100kΩ) and ~60mV at 10kΩ. Short-circuit current ~60mA."+ "description": "Amplifier A output. Rail-to-rail CMOS output stage capable of ~65 mA typical output current; short-circuit limit 60 mA." }, { "number": "2", "name": "INA-", "type": "input",- "description": "Amplifier A inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA."+ "description": "Amplifier A inverting input. Analog input range Vss-0.5 V to VDD+0.5 V (abs max); rail-to-rail input; input bias current ~20 pA typ." }, { "number": "3", "name": "INA+", "type": "input",- "description": "Amplifier A non-inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA."+ "description": "Amplifier A non-inverting input. Rail-to-rail input; input bias current ~20 pA typ." }, { "number": "4", "name": "VDD", "type": "power_in",- "description": "Positive supply. Single-supply +1.8V to +5.5V (or dual ±0.9V to ±2.75V). Absolute max 7.5V referenced to VSS. Bypass with 0.1µF ceramic close to pin."+ "description": "Positive supply rail. Single-supply operating range +1.8 V to +5.5 V (abs max -0.5 V to +7.5 V with respect to VSS). Bypass locally with a low-ESR ceramic capacitor." }, { "number": "5", "name": "INB+", "type": "input",- "description": "Amplifier B non-inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA."+ "description": "Amplifier B non-inverting input. Rail-to-rail input; input bias current ~20 pA typ." }, { "number": "6", "name": "INB-", "type": "input",- "description": "Amplifier B inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA."+ "description": "Amplifier B inverting input. Rail-to-rail input; input bias current ~20 pA typ." }, { "number": "7", "name": "OUTB", "type": "output",- "description": "Amplifier B output. Rail-to-rail output stage; swings within ~5mV of VDD/VSS at light loads (>100kΩ) and ~60mV at 10kΩ. Short-circuit current ~60mA."+ "description": "Amplifier B output. Rail-to-rail CMOS output stage; typ output current 65 mA; short-circuit limit 60 mA." }, { "number": "8", "name": "OUTC", "type": "output",- "description": "Amplifier C output. Rail-to-rail output stage; swings within ~5mV of VDD/VSS at light loads (>100kΩ) and ~60mV at 10kΩ. Short-circuit current ~60mA."+ "description": "Amplifier C output. Rail-to-rail CMOS output stage; typ output current 65 mA; short-circuit limit 60 mA." }, { "number": "9", "name": "INC-", "type": "input",- "description": "Amplifier C inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA."+ "description": "Amplifier C inverting input. Rail-to-rail input; input bias current ~20 pA typ." }, { "number": "10", "name": "INC+", "type": "input",- "description": "Amplifier C non-inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA."+ "description": "Amplifier C non-inverting input. Rail-to-rail input; input bias current ~20 pA typ." }, { "number": "11", "name": "VSS", "type": "power_in",- "description": "Negative supply / ground. Tie to GND in single-supply operation, or to negative rail in dual-supply. In dual-supply, bypass with 0.1µF ceramic close to pin."+ "description": "Negative supply / ground. Tied to system ground in single-supply operation, or to the negative rail in split-supply operation. Abs max VDD-VSS = 7.5 V." }, { "number": "12", "name": "IND+", "type": "input",- "description": "Amplifier D non-inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA."+ "description": "Amplifier D non-inverting input. Rail-to-rail input; input bias current ~20 pA typ." }, { "number": "13", "name": "IND-", "type": "input",- "description": "Amplifier D inverting input. High-impedance CMOS input with rail-to-rail common-mode range (VSS-0.1V to VDD+0.1V). Input bias current typ 20pA."+ "description": "Amplifier D inverting input. Rail-to-rail input; input bias current ~20 pA typ." }, { "number": "14", "name": "OUTD", "type": "output",- "description": "Amplifier D output. Rail-to-rail output stage; swings within ~5mV of VDD/VSS at light loads (>100kΩ) and ~60mV at 10kΩ. Short-circuit current ~60mA."+ "description": "Amplifier D output. Rail-to-rail CMOS output stage; typ output current 65 mA; short-circuit limit 60 mA." } ], "provenance": {@@ -174,8 +174,5 @@ "docs/gs8554-sr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": {- "public": true- }+ ] }