component
GN595D
Public Made by Adomby adom
GN Semic Shifting Register, SOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+164−8@@ -1,13 +1,174 @@ {+ "schema_version": 1,+ "type": "component", "slug": "gn595d",+ "title": "GN595D",+ "brief": "GN Semic Shifting Register, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "GN Semic Shifting Register, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "gn595d" ],+ "component": {+ "mpn": "GN595D",+ "manufacturer": "GN Semic",+ "package": "SOP-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Shifting Register",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/96760ac1f54b82cd4716f5e5f5d071b7.pdf",+ "parts": {+ "symbol": "gn595d.kicad_sym",+ "footprint": "gn595d.kicad_mod",+ "model_3d": "gn595d.glb",+ "model_3d_step": "gn595d.step",+ "lbr": "gn595d.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "Q1",+ "type": "tri_state",+ "description": "Parallel 3-state output bit 1 of the storage register. Drives up to +/-6 mA at Vcc=4.5 V. High-impedance when G is high."+ },+ {+ "number": "2",+ "name": "Q2",+ "type": "tri_state",+ "description": "Parallel 3-state output bit 2 of the storage register. Same drive characteristics as the other QN outputs; high-Z when G is high."+ },+ {+ "number": "3",+ "name": "Q3",+ "type": "tri_state",+ "description": "Parallel 3-state output bit 3 of the storage register. High-Z when G is high."+ },+ {+ "number": "4",+ "name": "Q4",+ "type": "tri_state",+ "description": "Parallel 3-state output bit 4 of the storage register. High-Z when G is high."+ },+ {+ "number": "5",+ "name": "Q5",+ "type": "tri_state",+ "description": "Parallel 3-state output bit 5 of the storage register. High-Z when G is high."+ },+ {+ "number": "6",+ "name": "Q6",+ "type": "tri_state",+ "description": "Parallel 3-state output bit 6 of the storage register. High-Z when G is high."+ },+ {+ "number": "7",+ "name": "Q7",+ "type": "tri_state",+ "description": "Parallel 3-state output bit 7 (MSB) of the storage register. High-Z when G is high."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V) for the device."+ },+ {+ "number": "9",+ "name": "Q7'",+ "type": "output",+ "description": "Serial data output from the last (8th) stage of the shift register. Used to cascade multiple GN595D devices to build longer shift chains; not affected by the output-enable G."+ },+ {+ "number": "10",+ "name": "SCLR",+ "type": "input",+ "description": "Active-low shift-register clear. When held low, all shift-register bits are reset to 0 (Q7' = 0); does not affect the storage-register outputs."+ },+ {+ "number": "11",+ "name": "SCK",+ "type": "input",+ "description": "Shift-register (data-input) clock. On a rising edge, SER is shifted into the shift register (QN = QN-1, Q0 = SER). Rated to typ. 91 MHz at Vcc=4.5 V, 108 MHz at Vcc=6 V."+ },+ {+ "number": "12",+ "name": "RCK",+ "type": "input",+ "description": "Storage-register (output latch) clock. A rising edge latches the shift-register contents into the storage register, updating Q0-Q7."+ },+ {+ "number": "13",+ "name": "G",+ "type": "input",+ "description": "Active-low output enable for the parallel outputs Q0-Q7. When high, Q0-Q7 are placed in the high-impedance state; when low, storage-register contents drive the outputs."+ },+ {+ "number": "14",+ "name": "SER",+ "type": "input",+ "description": "Serial data input. Sampled on the rising edge of SCK and shifted into bit 0 of the shift register."+ },+ {+ "number": "15",+ "name": "Q0",+ "type": "tri_state",+ "description": "Parallel 3-state output bit 0 (LSB) of the storage register. High-Z when G is high."+ },+ {+ "number": "16",+ "name": "Vcc",+ "type": "power_in",+ "description": "Positive supply, 2 V to 6 V (absolute max 7 V). Bypass locally with a ceramic capacitor (typ. 100 nF) to GND."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/96760ac1f54b82cd4716f5e5f5d071b7.pdf",+ "pages": 13,+ "sha256": "6570ea554171b0b3",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "GN Semic",+ "Package": "SOP-16",+ "Category": "Logic",+ "Pins": "16"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "gn595d"+ ],+ "discovery_pitch": "GN595D (GN Semic) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +186,5 @@ "docs/gn595d-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }