← Commit history

Publish 0.2.0

Ray ·4f32c516b3 · ·parent 52355f6
3 files changed +23−9
README.md+14
@@ -40,6 +40,20 @@ GM7333K from GATEMODE, in a SOT-23-5. Pinout and pin descriptions extracted from - Footprint: `Package_TO_SOT_SMD:SOT-23-5` - 3D model: SOT-23-5 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`gm7333k.step`](gm7333k.step) | 85 KB | You want the bare part, or you mark your own boards. |+| [`gm7333k-etched.step`](gm7333k-etched.step) | 1.6 MB | You want the part with `GM7333K` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 391 faces against 102 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance  Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1
@@ -1,6 +1,6 @@ {   "slug": "gm7333k",-  "version": "0.1.0",+  "version": "0.2.0",   "type": "component",   "description": "GATEMODE Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "tags": [
page.json+8−8
@@ -4,7 +4,7 @@   "slug": "gm7333k",   "title": "GM7333K",   "brief": "GATEMODE Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.",-  "version": "0.1.0",+  "version": "0.2.0",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -34,7 +34,7 @@         "number": "1",         "name": "IN",         "type": "power_in",-        "description": "Input voltage pin. Operating input range 4.5 V to 40 V (absolute max 45 V). Bypass to GND with a 0.1 \u03bcF to 2.2 \u03bcF ceramic capacitor for best transient/PSRR performance; an input capacitor is required when line transients exceed 10 V."+        "description": "Input voltage pin. Operating input range 4.5 V to 40 V (absolute max 45 V). Bypass to GND with a 0.1 μF to 2.2 μF ceramic capacitor for best transient/PSRR performance; an input capacitor is required when line transients exceed 10 V."       },       {         "number": "2",@@ -46,7 +46,7 @@         "number": "3",         "name": "EN",         "type": "input",-        "description": "Enable input. Drive high (typ \u22651.2 V, up to 40 V) to enable the LDO; drive low (\u22640.6 V) to place the device in shutdown (I_SHUTDOWN typ 280 nA). Pin may be left floating to enable the device."+        "description": "Enable input. Drive high (typ ≥1.2 V, up to 40 V) to enable the LDO; drive low (≤0.6 V) to place the device in shutdown (I_SHUTDOWN typ 280 nA). Pin may be left floating to enable the device."       },       {         "number": "4",@@ -58,7 +58,7 @@         "number": "5",         "name": "OUT",         "type": "power_out",-        "description": "Regulated 3.3 V output pin (2% accuracy over temperature). Requires a 2.2 \u03bcF ceramic output capacitor (ESR 0 \u03a9-0.2 \u03a9) for stability; supports up to 200 mA continuous, with current limit at \u2265250 mA. Absolute max VOUT = 7 V."+        "description": "Regulated 3.3 V output pin (2% accuracy over temperature). Requires a 2.2 μF ceramic output capacitor (ESR 0 Ω-0.2 Ω) for stability; supports up to 200 mA continuous, with current limit at ≥250 mA. Absolute max VOUT = 7 V."       }     ],     "provenance": {@@ -132,9 +132,9 @@     "docs/hero.png",     "docs/gm7333k-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json"   ],-  "visibility": {-    "public": true-  }+  "visibility": "public",+  "description": "GATEMODE Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D." }\ No newline at end of file