component
GD32F405RGT6
Public Made by Adomby adom
GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C99031). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+26−6
gd32f405rgt6.lbr+20−2@@ -118,6 +118,18 @@ <smd name="62" x="-2.7500" y="5.6750" dx="0.3000" dy="1.5500" layer="1"/> <smd name="63" x="-3.2500" y="5.6750" dx="0.3000" dy="1.5500" layer="1"/> <smd name="64" x="-3.7500" y="5.6750" dx="0.3000" dy="1.5500" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-5.7500" y="4.1600"/>+ <vertex x="-6.0900" y="4.6300"/>+ <vertex x="-5.4100" y="4.6300"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-4.0000" y="5.0000"/>+ <vertex x="5.0000" y="5.0000"/>+ <vertex x="5.0000" y="-5.0000"/>+ <vertex x="-5.0000" y="-5.0000"/>+ <vertex x="-5.0000" y="4.0000"/>+ </polygon> <wire x1="-5.1100" y1="5.1100" x2="-4.1600" y2="5.1100" width="0.1200" layer="21"/> <wire x1="-5.1100" y1="4.1600" x2="-5.1100" y2="5.1100" width="0.1200" layer="21"/> <wire x1="-5.1100" y1="-5.1100" x2="-5.1100" y2="-4.1600" width="0.1200" layer="21"/>@@ -128,7 +140,7 @@ <wire x1="5.1100" y1="-5.1100" x2="4.1600" y2="-5.1100" width="0.1200" layer="21"/> <text x="0" y="7.050" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-7.050" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-5.7500" y="4.1600"/><vertex x="-6.0900" y="4.6300"/><vertex x="-5.4100" y="4.6300"/></polygon></package>+</package> </packages> <symbols> <symbol name="GD32F405RGT6">@@ -278,7 +290,13 @@ <connect gate="G$1" pin="PB13" pad="34"/> <connect gate="G$1" pin="PB12" pad="33"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="GD32F405RGT6" constant="no"/>+ <attribute name="MANUFACTURER" value="GigaDevice Semicon Beijing" constant="no"/>+ <attribute name="LCSC_PN" value="C99031" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>
page.json+6−4@@ -26,7 +26,9 @@ "model_3d_step": "gd32f405rgt6.step", "lbr": "gd32f405rgt6.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C99031"+ }, "pins": [ { "number": "1",@@ -104,7 +106,7 @@ "number": "13", "name": "VDDA", "type": "power_in",- "description": "Analog supply for the ADC/DAC/reset/PLL blocks, 2.6-3.6 V. Decouple with 100 nF + 1 µF close to the pin; also serves as internal VREF+ when VREF+ is absent."+ "description": "Analog supply for the ADC/DAC/reset/PLL blocks, 2.6-3.6 V. Decouple with 100 nF + 1 \u00b5F close to the pin; also serves as internal VREF+ when VREF+ is absent." }, { "number": "14",@@ -140,7 +142,7 @@ "number": "19", "name": "VDD", "type": "power_in",- "description": "Digital I/O and core LDO supply, 2.6-3.6 V. Decouple each VDD pin with a 100 nF ceramic capacitor close to the pin plus a bulk 4.7 µF."+ "description": "Digital I/O and core LDO supply, 2.6-3.6 V. Decouple each VDD pin with a 100 nF ceramic capacitor close to the pin plus a bulk 4.7 \u00b5F." }, { "number": "20",@@ -212,7 +214,7 @@ "number": "31", "name": "VCAP1", "type": "power_out",- "description": "Internal 1.2 V core LDO output (labelled NC / VCORE in the LQFP64 pinout). Must be connected to a 2.2 µF ceramic decoupling capacitor to VSS; do not connect to any external supply."+ "description": "Internal 1.2 V core LDO output (labelled NC / VCORE in the LQFP64 pinout). Must be connected to a 2.2 \u00b5F ceramic decoupling capacitor to VSS; do not connect to any external supply." }, { "number": "32",