GD32F303RGT6

@@ -0,0 +1,120 @@+# GD32F303RGT6++**GigaDevice Semicon Beijing** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)++GD32F303RGT6 from GigaDevice Semicon Beijing, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Backup domain supply, 1.8-3.6 V. Powers RTC and backup registers when VDD is off. |+| 2 | PC13/TAMPER-RTC | bidirectional | GPIO PC13; alternate TAMPER input and RTC output. Low-drive I/O in backup domain. |+| 3 | PC14/OSC32_IN | bidirectional | GPIO PC14; alternate 32.768 kHz LXTAL oscillator input. |+| 4 | PC15/OSC32_OUT | bidirectional | GPIO PC15; alternate 32.768 kHz LXTAL oscillator output. |+| 5 | PD0/OSC_IN | bidirectional | Default HXTAL oscillator input (4-16 MHz). Can be remapped as GPIO PD0. |+| 6 | PD1/OSC_OUT | bidirectional | Default HXTAL oscillator output. Can be remapped as GPIO PD1. |+| 7 | NRST | bidirectional | Active-low bidirectional reset. Internal pull-up; drive low to reset the MCU. |+| 8 | PC0 | bidirectional | GPIO PC0; alternate ADC0/1/2_IN10. |+| 9 | PC1 | bidirectional | GPIO PC1; alternate ADC0/1/2_IN11. |+| 10 | PC2 | bidirectional | GPIO PC2; alternate ADC0/1/2_IN12. |+| 11 | PC3 | bidirectional | GPIO PC3; alternate ADC0/1/2_IN13. |+| 12 | VSSA | power_in | Analog ground reference for ADC/DAC. Tie to solid ground plane. |+| 13 | VDDA | power_in | Analog supply for ADC/DAC, 2.6-3.6 V. Decouple close to pin. |+| 14 | PA0/WKUP | bidirectional | GPIO PA0; alternates WKUP, USART1_CTS, ADC012_IN0, TIMER1_CH0_ETI, TIMER4_CH0, TIMER7_ETI. |+| 15 | PA1 | bidirectional | GPIO PA1; alternates USART1_RTS, ADC012_IN1, TIMER1_CH1, TIMER4_CH1. |+| 16 | PA2 | bidirectional | GPIO PA2; alternates USART1_TX, ADC012_IN2, TIMER1_CH2, TIMER4_CH2, TIMER8_CH0, SPI0_IO2. |+| 17 | PA3 | bidirectional | GPIO PA3; alternates USART1_RX, ADC012_IN3, TIMER1_CH3, TIMER4_CH3, TIMER8_CH1, SPI0_IO3. |+| 18 | VSS_4 | power_in | Digital ground. |+| 19 | VDD_4 | power_in | Digital I/O supply, 2.6-3.6 V. Decouple with 100 nF close to pin. |+| 20 | PA4 | bidirectional | GPIO PA4; alternates SPI0_NSS, USART1_CK, ADC01_IN4, DAC_OUT0; remap SPI2_NSS, I2S2_WS. |+| 21 | PA5 | bidirectional | GPIO PA5; alternates SPI0_SCK, ADC01_IN5, DAC_OUT1. |+| 22 | PA6 | bidirectional | GPIO PA6; alternates SPI0_MISO, ADC01_IN6, TIMER2_CH0, TIMER7_BKIN, TIMER12_CH0; remap TIMER0_BKIN. |+| 23 | PA7 | bidirectional | GPIO PA7; alternates SPI0_MOSI, ADC01_IN7, TIMER2_CH1, TIMER7_CH0_ON, TIMER13_CH0; remap TIMER0_CH0_ON. |+| 24 | PC4 | bidirectional | GPIO PC4; alternate ADC01_IN14. |+| 25 | PC5 | bidirectional | GPIO PC5; alternate ADC01_IN15. |+| 26 | PB0 | bidirectional | GPIO PB0; alternates ADC01_IN8, TIMER2_CH2, TIMER7_CH1_ON; remap TIMER0_CH1_ON. |+| 27 | PB1 | bidirectional | GPIO PB1; alternates ADC01_IN9, TIMER2_CH3, TIMER7_CH2_ON; remap TIMER0_CH2_ON. |+| 28 | PB2/BOOT1 | bidirectional | GPIO PB2; also serves as BOOT1 boot-mode select strap at reset. 5 V tolerant. |+| 29 | PB10 | bidirectional | GPIO PB10; alternates I2C1_SCL, USART2_TX; remap TIMER1_CH2. 5 V tolerant. |+| 30 | PB11 | bidirectional | GPIO PB11; alternates I2C1_SDA, USART2_RX; remap TIMER1_CH3. 5 V tolerant. |+| 31 | VSS_1 | power_in | Digital ground. |+| 32 | VDD_1 | power_in | Digital I/O supply, 2.6-3.6 V. Decouple with 100 nF close to pin. |+| 33 | PB12 | bidirectional | GPIO PB12; alternates SPI1_NSS, I2C1_SMBA, USART2_CK, TIMER0_BKIN, I2S1_WS. 5 V tolerant. |+| 34 | PB13 | bidirectional | GPIO PB13; alternates SPI1_SCK, USART2_CTS, TIMER0_CH0_ON, I2S1_CK. 5 V tolerant. |+| 35 | PB14 | bidirectional | GPIO PB14; alternates SPI1_MISO, USART2_RTS, TIMER0_CH1_ON, TIMER11_CH0. 5 V tolerant. |+| 36 | PB15 | bidirectional | GPIO PB15; alternates SPI1_MOSI, TIMER0_CH2_ON, I2S1_SD, TIMER11_CH1. 5 V tolerant. |+| 37 | PC6 | bidirectional | GPIO PC6; alternates I2S1_MCK, TIMER7_CH0, SDIO_D6; remap TIMER2_CH0. 5 V tolerant. |+| 38 | PC7 | bidirectional | GPIO PC7; alternates I2S2_MCK, TIMER7_CH1, SDIO_D7; remap TIMER2_CH1. 5 V tolerant. |+| 39 | PC8 | bidirectional | GPIO PC8; alternates TIMER7_CH2, SDIO_D0; remap TIMER2_CH2. 5 V tolerant. |+| 40 | PC9 | bidirectional | GPIO PC9; alternates TIMER7_CH3, SDIO_D1; remap TIMER2_CH3. 5 V tolerant. |+| 41 | PA8 | bidirectional | GPIO PA8; alternates USART0_CK, TIMER0_CH0, CK_OUT0, VCORE, CTC_SYNC. 5 V tolerant. |+| 42 | PA9 | bidirectional | GPIO PA9; alternates USART0_TX, TIMER0_CH1. 5 V tolerant. |+| 43 | PA10 | bidirectional | GPIO PA10; alternates USART0_RX, TIMER0_CH2. 5 V tolerant. |+| 44 | PA11 | bidirectional | GPIO PA11; alternates USART0_CTS, CAN0_RX, USBDM, TIMER0_CH3. 5 V tolerant. |+| 45 | PA12 | bidirectional | GPIO PA12; alternates USART0_RTS, CAN0_TX, TIMER0_ETI, USBDP. 5 V tolerant. |+| 46 | PA13/JTMS/SWDIO | bidirectional | Default JTMS/SWDIO debug pin; can be remapped as GPIO PA13. 5 V tolerant. |+| 47 | VSS_2 | power_in | Digital ground. |+| 48 | VDD_2 | power_in | Digital I/O supply, 2.6-3.6 V. Decouple with 100 nF close to pin. |+| 49 | PA14/JTCK/SWCLK | bidirectional | Default JTCK/SWCLK debug pin; can be remapped as GPIO PA14. 5 V tolerant. |+| 50 | PA15/JTDI | bidirectional | Default JTDI; alternates SPI2_NSS, I2S2_WS; remap TIMER1_CH0_ETI, PA15, SPI0_NSS. 5 V tolerant. |+| 51 | PC10 | bidirectional | GPIO PC10; alternates UART3_TX, SDIO_D2; remap USART2_TX, SPI2_SCK, I2S2_CK. 5 V tolerant. |+| 52 | PC11 | bidirectional | GPIO PC11; alternates UART3_RX, SDIO_D3; remap USART2_RX, SPI2_MISO. 5 V tolerant. |+| 53 | PC12 | bidirectional | GPIO PC12; alternates UART4_TX, SDIO_CK; remap USART2_CK, SPI2_MOSI, I2S2_SD. 5 V tolerant. |+| 54 | PD2 | bidirectional | GPIO PD2; alternates TIMER2_ETI, SDIO_CMD, UART4_RX. 5 V tolerant. |+| 55 | PB3/JTDO | bidirectional | Default JTDO; alternates SPI2_SCK, I2S2_CK; remap PB3, TRACESWO, TIMER1_CH1, SPI0_SCK. 5 V tolerant. |+| 56 | PB4/NJTRST | bidirectional | Default NJTRST; alternate SPI2_MISO; remap TIMER2_CH0, PB4, SPI0_MISO. 5 V tolerant. |+| 57 | PB5 | bidirectional | GPIO PB5; alternates I2C0_SMBA, SPI2_MOSI, I2S2_SD; remap TIMER2_CH1, SPI0_MOSI. |+| 58 | PB6 | bidirectional | GPIO PB6; alternates I2C0_SCL, TIMER3_CH0; remap USART0_TX, SPI0_IO2. 5 V tolerant. |+| 59 | PB7 | bidirectional | GPIO PB7; alternates I2C0_SDA, TIMER3_CH1, EXMC_NADV; remap USART0_RX, SPI0_IO3. 5 V tolerant. |+| 60 | BOOT0 | input | Boot-mode select strap sampled at reset. Selects main flash / system memory / SRAM boot together with BOOT1. |+| 61 | PB8 | bidirectional | GPIO PB8; alternates TIMER3_CH2, SDIO_D4, TIMER9_CH0; remap I2C0_SCL, CAN0_RX. 5 V tolerant. |+| 62 | PB9 | bidirectional | GPIO PB9; alternates TIMER3_CH3, SDIO_D5, TIMER10_CH0; remap I2C0_SDA, CAN0_TX. 5 V tolerant. |+| 63 | VSS_3 | power_in | Digital ground. |+| 64 | VDD_3 | power_in | Digital I/O supply, 2.6-3.6 V. Decouple with 100 nF close to pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | GigaDevice Semicon Beijing |+| Package | LQFP-64(10x10) |+| Category | MCU |+| Pins | 64 |++## Ordering variants++- `GD32F303RGT6CCT6`+- `GD32F303RGT6CET6`+- `GD32F303RGT6CGT6`+- `GD32F303RGT6RCT6`+- `GD32F303RGT6RET6`+- `GD32F303RGT6RGT6`+- `GD32F303RGT6RIT6`+- `GD32F303RGT6RKT6`+- `GD32F303RGT6VCT6`+- `GD32F303RGT6VET6`+- `GD32F303RGT6VGT6`+- `GD32F303RGT6VIT6`+- `GD32F303RGT6VKT6`+- `GD32F303RGT6ZCT6`+- `GD32F303RGT6ZET6`+- `GD32F303RGT6ZGT6`+- `GD32F303RGT6ZIT6`+- `GD32F303RGT6ZKT6`++## CAD (KiCad official)++- Symbol: `GD32F303RGT6`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [GigaDevice Semicon Beijing datasheet](docs/gd32f303rgt6-datasheet.pdf) (52 pp, sha256 `7ff0ea1da47f973d`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/gd32f303rgt6-datasheet.pdf)