GD32F105RCT6

@@ -0,0 +1,167 @@+# GD32F105RCT6++**GigaDevice Semicon Beijing** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)++GD32F105RCT6 from GigaDevice Semicon Beijing, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | VBAT is the backup-domain supply pin, listed in the pin definitions with the default function VBAT only. |+| 2 | PC13-TAMPER-RTC | bidirectional | PC13 is a general-purpose I/O (default PC13) that can alternatively serve as the TAMPER-RTC function, and it is not 5 V tolerant per the table. |+| 3 | PC14-OSC32_IN | bidirectional | PC14 is a general-purpose I/O (default PC14) that can alternatively serve as the OSC32_IN low-speed oscillator input. |+| 4 | PC15-OSC32_OUT | bidirectional | PC15 is a general-purpose I/O (default PC15) that can alternatively serve as the OSC32_OUT low-speed oscillator output. |+| 5 | OSC_IN | input | OSC_IN is the high-speed external crystal/ceramic oscillator input (4-16 MHz HSE per the clock tree), and its PD0 remap is not available on this part. |+| 6 | OSC_OUT | output | OSC_OUT is the high-speed external crystal/ceramic oscillator output, and its PD1 remap is not available on this part. |+| 7 | NRST | bidirectional | NRST is the active-low device reset pin (I/O in the table, default NRST). |+| 8 | PC0 | bidirectional | PC0 is a general-purpose I/O with ADC_IN10 as its alternate function. |+| 9 | PC1 | bidirectional | PC1 is a general-purpose I/O with ADC_IN11 as its alternate function. |+| 10 | PC2 | bidirectional | PC2 is a general-purpose I/O with ADC_IN12 as its alternate function. |+| 11 | PC3 | bidirectional | PC3 is a general-purpose I/O with ADC_IN13 as its alternate function. |+| 12 | VSSA | power_in | VSSA is the analog ground pin for the ADC and DAC. |+| 13 | VDDA | power_in | VDDA is the analog supply pin for the ADC, DAC and analog circuitry. |+| 14 | PA0-WKUP | bidirectional | PA0 is a general-purpose I/O with WKUP, USART2_CTS, ADC_IN0, TM2_CH1_ETR and TM5_CH1 (TM5_CH1 and TM8_ETR available on xC and above) as alternate functions. |+| 15 | PA1 | bidirectional | PA1 is a general-purpose I/O with USART2_RTS, ADC_IN1, TM2_CH2 and TM5_CH2 as alternate functions. |+| 16 | PA2 | bidirectional | PA2 is a general-purpose I/O with USART2_TX, ADC_IN2, TM2_CH3 and TM5_CH3 as alternate functions. |+| 17 | PA3 | bidirectional | PA3 is a general-purpose I/O with USART2_RX, ADC_IN3, TM2_CH4 and TM5_CH4 as alternate functions. |+| 18 | VSS_4 | power_in | VSS_4 is a digital ground pin. |+| 19 | VDD_4 | power_in | VDD_4 is a digital supply pin for the device (2.6 to 3.6 V device supply per the general description). |+| 20 | PA4 | bidirectional | PA4 is a general-purpose I/O with SPI1_NSS, USART2_CK and ADC12_IN4 as alternate functions, plus DAC_OUT1, SPI3_NSS and I2S3_WS as listed alternates. |+| 21 | PA5 | bidirectional | PA5 is a general-purpose I/O with SPI1_SCK, ADC12_IN5 and DAC_OUT2 as alternate functions. |+| 22 | PA6 | bidirectional | PA6 is a general-purpose I/O with SPI1_MISO, ADC12_IN6, TM3_CH1 and TM8_BKIN as alternate functions, with TM1_BKIN as a remap option. |+| 23 | PA7 | bidirectional | PA7 is a general-purpose I/O with SPI1_MOSI, ADC12_IN7, TM3_CH2 and TM8_CH1N as alternate functions, with TM1_CH1N as a remap option. |+| 24 | PC4 | bidirectional | PC4 is a general-purpose I/O with ADC12_IN14 as its alternate function. |+| 25 | PC5 | bidirectional | PC5 is a general-purpose I/O with ADC12_IN15 as its alternate function. |+| 26 | PB0 | bidirectional | PB0 is a general-purpose I/O with ADC12_IN8, TM3_CH3 and TM8_CH2N as alternate functions, with TM1_CH2N as a remap option. |+| 27 | PB1 | bidirectional | PB1 is a general-purpose I/O with ADC12_IN9, TM3_CH4 and TM8_CH3N as alternate functions, with TM1_CH3N as a remap option. |+| 28 | PB2 | bidirectional | PB2 is a 5 V tolerant general-purpose I/O whose default function is PB2/BOOT1. |+| 29 | PB10 | bidirectional | PB10 is a 5 V tolerant general-purpose I/O with I2C2_SCL and USART3_TX as alternate functions, and TM2_CH3 as a remap option. |+| 30 | PB11 | bidirectional | PB11 is a 5 V tolerant general-purpose I/O with I2C2_SDA and USART3_RX as alternate functions, and TM2_CH4 as a remap option. |+| 31 | VSS_1 | power_in | VSS_1 is a digital ground pin. |+| 32 | VDD_1 | power_in | VDD_1 is a digital supply pin for the device (2.6 to 3.6 V device supply per the general description). |+| 33 | PB12 | bidirectional | PB12 is a 5 V tolerant general-purpose I/O with SPI2_NSS, I2C2_SMBAI, USART3_CK, TM1_BKIN, I2S2_WS and CAN2_RX as alternate functions. |+| 34 | PB13 | bidirectional | PB13 is a 5 V tolerant general-purpose I/O with SPI2_SCK, USART3_CTS, TM1_CH1N, I2S2_CK and CAN2_TX as alternate functions. |+| 35 | PB14 | bidirectional | PB14 is a 5 V tolerant general-purpose I/O with SPI2_MISO, USART3_RTS and TM1_CH2N as alternate functions. |+| 36 | PB15 | bidirectional | PB15 is a 5 V tolerant general-purpose I/O with SPI2_MOSI, TM1_CH3N and I2S2_SD as alternate functions. |+| 37 | PC6 | bidirectional | PC6 is a 5 V tolerant general-purpose I/O with I2S2_MCK and TM8_CH1 as alternate functions, with TM3_CH1 as a remap option. |+| 38 | PC7 | bidirectional | PC7 is a 5 V tolerant general-purpose I/O with I2S3_MCK and TM8_CH2 as alternate functions, with TM3_CH2 as a remap option. |+| 39 | PC8 | bidirectional | PC8 is a 5 V tolerant general-purpose I/O with TM8_CH3 as an alternate function, with TM3_CH3 as a remap option. |+| 40 | PC9 | bidirectional | PC9 is a 5 V tolerant general-purpose I/O with TM8_CH4 as an alternate function, with TM3_CH4 as a remap option. |+| 41 | PA8 | bidirectional | PA8 is a 5 V tolerant general-purpose I/O with USART1_CK, TM1_CH1 and MCO as alternate functions. |+| 42 | PA9 | bidirectional | PA9 is a 5 V tolerant general-purpose I/O with USART1_TX, TM1_CH2 and OTG_FS_VBUS as alternate functions. |+| 43 | PA10 | bidirectional | PA10 is a 5 V tolerant general-purpose I/O with USART1_RX, TM1_CH3 and OTG_FS_ID as alternate functions. |+| 44 | PA11 | bidirectional | PA11 is a 5 V tolerant general-purpose I/O with USART1_CTS, CANRX, OTG_FS_DM and TM1_CH4 as alternate functions. |+| 45 | PA12 | bidirectional | PA12 is a 5 V tolerant general-purpose I/O with USART1_RTS, OTG_FS_DP, CAN1_TX and TM1_ETR as alternate functions. |+| 46 | PA13 | bidirectional | PA13 is a 5 V tolerant pin whose default function is JTMS/SWDIO, and it can be remapped as general-purpose PA13. |+| 47 | VSS_2 | power_in | VSS_2 is a digital ground pin. |+| 48 | VDD_2 | power_in | VDD_2 is a digital supply pin for the device (2.6 to 3.6 V device supply per the general description). |+| 49 | PA14 | bidirectional | PA14 is a 5 V tolerant pin whose default function is JTCK/SWCLK, and it can be remapped as general-purpose PA14. |+| 50 | PA15 | bidirectional | PA15 is a 5 V tolerant pin whose default function is JTDI, with SPI3_NSS and I2S3_WS as alternates and TM2_CH1_ETR, PA15 and SPI1_NSS as remap options. |+| 51 | PC10 | bidirectional | PC10 is a 5 V tolerant general-purpose I/O with UART4_TX as an alternate function, and USART3_TX, SPI3_SCK and I2S3_CK as remap options. |+| 52 | PC11 | bidirectional | PC11 is a 5 V tolerant general-purpose I/O with UART4_RX as an alternate function, and USART3_RX and SPI3_MISO as remap options. |+| 53 | PC12 | bidirectional | PC12 is a 5 V tolerant general-purpose I/O with UART5_TX as an alternate function, and USART3_CK, SPI3_MOSI and I2S3_SD as remap options. |+| 54 | PD2 | bidirectional | PD2 is a 5 V tolerant general-purpose I/O with TM3_ETR and UART5_RX as alternate functions. |+| 55 | PB3 | bidirectional | PB3 is a 5 V tolerant pin whose default function is JTDO, with SPI3_SCK and I2S3_CK as alternates and PB3, TRACESWO, TM2_CH2 and SPI1_SCK as remap options. |+| 56 | PB4 | bidirectional | PB4 is a 5 V tolerant pin whose default function is NJTRST, with SPI3_MISO as an alternate and TM3_CH1, PB4 and SPI1_MISO as remap options. |+| 57 | PB5 | bidirectional | PB5 is a general-purpose I/O with I2C1_SMBAI and SPI3_MOSI and I2S3_SD as alternates, and TM3_CH2, SPI1_MOSI and CAN2_RX as remap options; the 5 V tolerance is not stated in the table. |+| 58 | PB6 | bidirectional | PB6 is a 5 V tolerant general-purpose I/O with I2C1_SCL and TM4_CH1 as alternate functions, and USART1_TX and CAN2_TX as remap options. |+| 59 | PB7 | bidirectional | PB7 is a 5 V tolerant general-purpose I/O with I2C1_SDA, TM4_CH2 and EXMC_NADV as alternate functions, and USART1_RX as a remap option. |+| 60 | BOOT0 | input | BOOT0 is the boot-mode selection input pin (default BOOT0). |+| 61 | PB8 | bidirectional | PB8 is a 5 V tolerant general-purpose I/O with TM4_CH3 as an alternate function, and I2C1_SCL and CAN1_RX as remap options. |+| 62 | PB9 | bidirectional | PB9 is a 5 V tolerant general-purpose I/O with TM4_CH4 as an alternate function, and I2C1_SDA and CAN1_TX as remap options. |+| 63 | VSS_3 | power_in | VSS_3 is a digital ground pin. |+| 64 | VDD_3 | power_in | VDD_3 is a digital supply pin for the device (2.6 to 3.6 V device supply per the general description). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | GigaDevice Semicon Beijing |+| Package | LQFP-64(10x10) |+| Category | Embedded Processors & Controllers |+| Pins | 64 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| External voltage range | VDD | -0.3 |  | 3.6 | V | Printed as VSS - 0.3 (min) and VSS + 3.6 (max); offsets relative to VSS | 32 |+| External analog supply voltage | VDDA | -0.3 |  | 3.6 | V | Printed as VSSA - 0.3 (min) and VSSA + 3.6 (max); offsets relative to VSSA | 32 |+| External battery supply voltage | VBAT | -0.3 |  | 3.6 | V | Printed as VSS - 0.3 (min) and VSS + 3.6 (max); offsets relative to VSS | 32 |+| Input voltage on 5V tolerant pin | VIN | -0.3 |  | 4 | V | Min printed as VSS - 0.3; max printed as VDD + 4.0 (4.0 is the offset above VDD) | 32 |+| Input voltage on other I/O | VIN | -0.3 |  | 4 | V | Min printed as VSS - 0.3 | 32 |+| Maximum current for GPIO pins | IIO |  |  | 25 | mA |  | 32 |+| Operating temperature range | TA | -40 |  | 85 | °C |  | 32 |+| Storage temperature range | TSTG | -55 |  | 150 | °C |  | 32 |+| Maximum junction temperature | TJ |  |  | 125 | °C |  | 32 |+| Supply voltage | VDD | 2.6 | 3.3 | 3.6 | V |  | 32 |+| Analog supply voltage | VDDA | 2.6 | 3.3 | 3.6 | V | Same as VDD | 32 |+| Battery supply voltage | VBAT | 1.8 |  | 3.6 | V |  | 32 |+| Supply current (Deep-Sleep mode) | IDD |  | 0.65 | 1.4 | mA | VDD=VBAT=3.3V, All clock off, LSI on, RTC on, All GPIOs analog mode | 33 |+| Power on reset threshold | VPOR | 2.32 | 2.4 | 2.48 | V |  | 34 |+| power down reset threshold | VPDR | 2.27 | 2.35 | 2.43 | V |  | 34 |+| Electrostatic discharge voltage (human body model) | VESD(HBM) |  |  | 3000 | V | TA=25 °C; JESD22-A114 | 35 |+| Electrostatic discharge voltage (charge device model) | VESD(CDM) |  |  | 500 | V | TA=25 °C; JESD22-C101 | 35 |+| Static latch-up I-test | LU | -100 |  | 100 | mA | TA=25 °C; JESD78 | 35 |+| Vsupply over voltage |  |  |  | 5.4 | V |  | 35 |+| High Speed External oscillator (HSE) frequency | fHSE | 3 | 8 | 32 | MHz | VDD=3.3V | 35 |+| Recommended load capacitance on OSC_IN and OSC_OUT | CHSE |  | 20 | 30 | pF |  | 35 |+| Low Speed External oscillator (LSE) frequency | fLSE |  | 32.768 | 1000 | KHz | VDD=VBAT=3.3V | 36 |+| Recommended load capacitance on OSC32_IN and OSC32_OUT | CLSE |  |  | 15 | pF |  | 36 |+| HSI oscillator Frequency accuracy, Factory-trimmed | ACCHSI | -2.5 |  | 1.5 | % | VDD=3.3V, TA=-40°C ~+105°C | 36 |+| HSI oscillator Frequency accuracy, Factory-trimmed | ACCHSI | -1.2 |  | 1.2 | % | VDD=3.3V, TA=0°C ~ +85°C | 36 |+| HSI oscillator Frequency accuracy, Factory-trimmed | ACCHSI | -1 |  | 1 | % | VDD=3.3V, TA=25°C | 36 |+| Low Speed Internal oscillator (LSI) frequency | fLSI | 30 | 40 | 60 | KHz | VDD=VBAT=3.3V, TA=-40°C ~ +85°C | 36 |+| PLL input clock frequency | fPLLIN | 1 | 8 | 25 | MHz |  | 37 |+| PLL output clock frequency | fPLL | 16 |  | 108 | MHz |  | 37 |+| Number of guaranteed program /erase cycles before failure (Endurance) | PECYC | 100 |  |  | kcycles | TA=-40°C ~ +85°C | 37 |+| Data retention time | tRET | 20 |  |  | years | TA=125°C | 37 |+| Word programming time | tPROG | 200 |  | 400 | us | TA=-40°C ~ +85°C | 37 |+| Page erase time | tERASE | 60 | 100 | 450 | ms | TA=-40°C ~ +85°C | 37 |+| Mass erase time | tMERASE | 3.2 |  | 9.6 | s | TA=-40°C ~ +85°C | 37 |+| Standard IO Low level input voltage | VIL | -0.3 |  | 0.95 | V | VDD=2.6V | 37 |+| 5V-tolerant IO Low level input voltage | VIL | -0.3 |  | 0.9 | V | VDD=2.6V | 37 |+| Standard IO High level input voltage | VIH | 1.2 |  | 4 | V | VDD=2.6V | 37 |+| 5V-tolerant IO High level input voltage | VIH | 1.5 |  | 5.5 | V | VDD=2.6V | 37 |+| Low level output voltage | VOL |  |  | 0.2 | V | VDD=2.6V | 37 |+| High level output voltage | VOH | 2.3 |  |  | V | VDD=2.6V | 37 |+| Internal pull-up resistor | RPU | 30 | 40 | 50 | kΩ | VIN=VSS | 37 |+| Internal pull-down resistor | RPD | 30 | 40 | 50 | kΩ | VIN=VDD | 37 |+| ADC input voltage range | VADCIN | 0 |  |  | V | Max printed as VREF+ (not a numeric value) | 38 |+| ADC clock | fADC | 0.6 |  | 14 | MHz |  | 38 |+| ADC conversion time | fADCCONV | 1 |  | 18 | us | fADC=14MHz | 38 |+| Input sampling switch resistance | RADC |  |  | 0.5 | kΩ |  | 38 |+| Load resistance | RLOAD | 5 |  |  | kΩ | Resistive load vs. VSSA with buffer ON | 38 |+| Load capacitance | CLOAD |  |  | 50 | pF | No pin/pad capacitance included | 38 |+| Differential non-linearity error | DNE | -3 |  | 3 | LSB | DAC in 12-bit | 38 |+| Integral non-linearity | INL | -4 |  | 4 | LSB | DAC in 12-bit | 38 |+| Offset error | Offset | -12 |  | 12 | LSB | DAC in 12-bit, VREF+ = 3.6 V | 38 |+| Gain error | GE | -0.5 |  | 0.5 | % | DAC in 12-bit | 38 |+| SCL clock frequency | fSCL | 0 |  | 100 | KHz | Standard mode | 38 |+| SCL clock frequency | fSCL | 0 |  | 400 | KHz | Fast mode | 38 |+| SCK clock frequency | fSCK |  |  | 18 | MHz |  | 39 |+| SCK clock high time | tSCK(H) | 19 |  |  | ns |  | 39 |+| SCK clock low time | tSCK(L) | 19 |  |  | ns |  | 39 |+| Data output valid time (SPI master mode) | tV(MO) |  |  | 25 | ns |  | 39 |+| Data output hold time (SPI master mode) | tH(MO) | 2 |  |  | ns |  | 39 |+| Data input setup time (SPI master mode) | tSU(MI) | 5 |  |  | ns |  | 39 |++## CAD (KiCad official)++- Symbol: `GD32F105RCT6`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)+- 3D model files: `gd32f105rct6-etched.step` / `gd32f105rct6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `gd32f105rct6.step` / `gd32f105rct6.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [GigaDevice Semicon Beijing datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586175319334535168) (43 pp, sha256 `8c1cff9a4e1adebc`, retrieved 2026-10-18, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/gd32f105rct6-datasheet.pdf)