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GD32F103RCT6
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GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+137@@ -0,0 +1,137 @@+# GD32F103RCT6++**GigaDevice Semicon Beijing** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)++GD32F103RCT6 from GigaDevice Semicon Beijing, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Backup battery supply input for the RTC and backup registers when VDD is absent. Connect to the VBAT rail (typically a coin cell) or tie to VDD if backup is not required. |+| 2 | PC13/TAMPER-RTC | bidirectional | General purpose I/O port C bit 13. Alternate function TAMPER-RTC provides RTC tamper detection and RTC alarm/calibration output. Driven by VBAT domain; limited drive strength. |+| 3 | PC14/OSC32IN | bidirectional | General purpose I/O port C bit 14. Alternate function OSC32IN is the input to the low-speed 32.768 kHz crystal oscillator. |+| 4 | PC15/OSC32OUT | bidirectional | General purpose I/O port C bit 15. Alternate function OSC32OUT is the output from the low-speed 32.768 kHz crystal oscillator. |+| 5 | OSCIN | input | High-speed external oscillator (HXTAL) input. Connect to one terminal of a 4-32 MHz crystal or drive with an external clock in bypass mode. |+| 6 | OSCOUT | output | High-speed external oscillator (HXTAL) output. Connect to the other terminal of the 4-32 MHz crystal, or leave open when HXTAL is bypassed. |+| 7 | NRST | bidirectional | Active-low bidirectional device reset input/output with internal pull-up. Driving low resets the MCU; the pin also asserts low when an internal reset source fires. |+| 8 | PC0 | bidirectional | General purpose I/O port C bit 0. Alternate function ADC012_IN10 (ADC0/1/2 analog input channel 10). |+| 9 | PC1 | bidirectional | General purpose I/O port C bit 1. Alternate function ADC012_IN11 (ADC0/1/2 analog input channel 11). |+| 10 | PC2 | bidirectional | General purpose I/O port C bit 2. Alternate function ADC012_IN12 (ADC0/1/2 analog input channel 12). |+| 11 | PC3 | bidirectional | General purpose I/O port C bit 3. Alternate function ADC012_IN13 (ADC0/1/2 analog input channel 13). |+| 12 | VSSA | power_in | Analog ground reference for the ADCs, DACs and analog reference circuitry. Tie to the ground plane, ideally with a star or star-point return to VSS. |+| 13 | VDDA | power_in | Analog power supply for the ADCs, DACs, reset circuit and PLL. Nominal 2.6-3.6 V; decouple with 100 nF plus 1 uF close to the pin. |+| 14 | PA0/WKUP | bidirectional | General purpose I/O port A bit 0. Alternate functions: WKUP (standby wake-up), USART1_CTS, ADC012_IN0, TIMER1_CH0, TIMER1_ETI, TIMER4_CH0, TIMER7_ETI. |+| 15 | PA1 | bidirectional | General purpose I/O port A bit 1. Alternate functions: USART1_RTS, ADC012_IN1, TIMER1_CH1, TIMER4_CH1. |+| 16 | PA2 | bidirectional | General purpose I/O port A bit 2. Alternate functions: USART1_TX, ADC012_IN2, TIMER1_CH2, TIMER4_CH2, TIMER8_CH0. |+| 17 | PA3 | bidirectional | General purpose I/O port A bit 3. Alternate functions: USART1_RX, ADC012_IN3, TIMER1_CH3, TIMER4_CH3, TIMER8_CH1. |+| 18 | VSS_4 | power_in | Digital ground return (VSS domain 4). Tie all VSS_x pins to the ground plane. |+| 19 | VDD_4 | power_in | Digital power supply (VDD domain 4). Nominal 2.6-3.6 V; decouple with a 100 nF ceramic capacitor placed close to the pin. |+| 20 | PA4 | bidirectional | General purpose I/O port A bit 4. Alternate: SPI0_NSS, USART1_CK, ADC01_IN4, DAC0_OUT0. Remap: SPI2_NSS, I2S2_WS. |+| 21 | PA5 | bidirectional | General purpose I/O port A bit 5. Alternate: SPI0_SCK, ADC01_IN5, DAC0_OUT1. |+| 22 | PA6 | bidirectional | General purpose I/O port A bit 6. Alternate: SPI0_MISO, ADC01_IN6, TIMER2_CH0, TIMER7_BRKIN, TIMER12_CH0. Remap: TIMER0_BRKIN. |+| 23 | PA7 | bidirectional | General purpose I/O port A bit 7. Alternate: SPI0_MOSI, ADC01_IN7, TIMER2_CH1, TIMER7_CH0_ON, TIMER13_CH0. Remap: TIMER0_CH0_ON. |+| 24 | PC4 | bidirectional | General purpose I/O port C bit 4. Alternate function ADC01_IN14 (ADC0/1 analog input channel 14). |+| 25 | PC5 | bidirectional | General purpose I/O port C bit 5. Alternate function ADC01_IN15 (ADC0/1 analog input channel 15). |+| 26 | PB0 | bidirectional | General purpose I/O port B bit 0. Alternate: ADC01_IN8, TIMER2_CH2, TIMER7_CH1_ON. Remap: TIMER0_CH1_ON. |+| 27 | PB1 | bidirectional | General purpose I/O port B bit 1. Alternate: ADC01_IN9, TIMER2_CH3, TIMER7_CH2_ON. Remap: TIMER0_CH2_ON. |+| 28 | PB2/BOOT1 | bidirectional | General purpose I/O port B bit 2, 5 V tolerant. Also sampled as BOOT1 during reset to select the boot memory together with BOOT0. |+| 29 | PB10 | bidirectional | General purpose I/O port B bit 10, 5 V tolerant. Alternate: I2C1_SCL, USART2_TX. Remap: TIMER1_CH2. |+| 30 | PB11 | bidirectional | General purpose I/O port B bit 11, 5 V tolerant. Alternate: I2C1_SDA, USART2_RX. Remap: TIMER1_CH3. |+| 31 | VSS_1 | power_in | Digital ground return (VSS domain 1). Tie to the ground plane. |+| 32 | VDD_1 | power_in | Digital power supply (VDD domain 1), 2.6-3.6 V. Decouple with a 100 nF ceramic capacitor close to the pin. |+| 33 | PB12 | bidirectional | General purpose I/O port B bit 12, 5 V tolerant. Alternate: SPI1_NSS, I2C1_SMBA, USART2_CK, TIMER0_BRKIN, I2S1_WS. |+| 34 | PB13 | bidirectional | General purpose I/O port B bit 13, 5 V tolerant. Alternate: SPI1_SCK, USART2_CTS, TIMER0_CH0_ON, I2S1_CK. |+| 35 | PB14 | bidirectional | General purpose I/O port B bit 14, 5 V tolerant. Alternate: SPI1_MISO, USART2_RTS, TIMER0_CH1_ON, TIMER11_CH0. |+| 36 | PB15 | bidirectional | General purpose I/O port B bit 15, 5 V tolerant. Alternate: SPI1_MOSI, TIMER0_CH2_ON, I2S1_SD, TIMER11_CH1. |+| 37 | PC6 | bidirectional | General purpose I/O port C bit 6, 5 V tolerant. Alternate: I2S1_MCK, TIMER7_CH0, SDIO_D6. Remap: TIMER2_CH0. |+| 38 | PC7 | bidirectional | General purpose I/O port C bit 7, 5 V tolerant. Alternate: I2S2_MCK, TIMER7_CH1, SDIO_D7. Remap: TIMER2_CH1. |+| 39 | PC8 | bidirectional | General purpose I/O port C bit 8, 5 V tolerant. Alternate: TIMER7_CH2, SDIO_D0. Remap: TIMER2_CH2. |+| 40 | PC9 | bidirectional | General purpose I/O port C bit 9, 5 V tolerant. Alternate: TIMER7_CH3, SDIO_D1. Remap: TIMER2_CH3. |+| 41 | PA8 | bidirectional | General purpose I/O port A bit 8, 5 V tolerant. Alternate: USART0_CK, TIMER0_CH0, CK_OUT0 (MCO). |+| 42 | PA9 | bidirectional | General purpose I/O port A bit 9, 5 V tolerant. Alternate: USART0_TX, TIMER0_CH1. |+| 43 | PA10 | bidirectional | General purpose I/O port A bit 10, 5 V tolerant. Alternate: USART0_RX, TIMER0_CH2. |+| 44 | PA11 | bidirectional | General purpose I/O port A bit 11, 5 V tolerant. Alternate: USART0_CTS, CAN0_RX, USBDM, TIMER0_CH3. |+| 45 | PA12 | bidirectional | General purpose I/O port A bit 12, 5 V tolerant. Alternate: USART0_RTS, CAN0_TX, TIMER0_ETI, USBDP. |+| 46 | PA13/JTMS/SWDIO | bidirectional | Debug port pin: JTAG TMS or Serial Wire Data I/O by default. Can be remapped to PA13 GPIO when the debug port is not required. |+| 47 | VSS_2 | power_in | Digital ground return (VSS domain 2). Tie to the ground plane. |+| 48 | VDD_2 | power_in | Digital power supply (VDD domain 2), 2.6-3.6 V. Decouple with a 100 nF ceramic capacitor close to the pin. |+| 49 | PA14/JTCK/SWCLK | bidirectional | Debug port pin: JTAG TCK or Serial Wire clock by default. Can be remapped to PA14 GPIO when the debug port is not required. |+| 50 | PA15/JTDI | bidirectional | Debug port pin: JTAG TDI by default. Alternate: SPI2_NSS, I2S2_WS. Remap: TIMER1_CH0, TIMER1_ETI, PA15 GPIO, SPI0_NSS. |+| 51 | PC10 | bidirectional | General purpose I/O port C bit 10, 5 V tolerant. Alternate: UART3_TX, SDIO_D2. Remap: USART2_TX, SPI2_SCK, I2S2_CK. |+| 52 | PC11 | bidirectional | General purpose I/O port C bit 11, 5 V tolerant. Alternate: UART3_RX, SDIO_D3. Remap: USART2_RX, SPI2_MISO. |+| 53 | PC12 | bidirectional | General purpose I/O port C bit 12, 5 V tolerant. Alternate: UART4_TX, SDIO_CK. Remap: USART2_CK, SPI2_MOSI, I2S2_SD. |+| 54 | PD2 | bidirectional | General purpose I/O port D bit 2, 5 V tolerant. Alternate: TIMER2_ETI, SDIO_CMD, UART4_RX. |+| 55 | PB3/JTDO | bidirectional | Debug port pin: JTAG TDO by default. Alternate: SPI2_SCK, I2S2_CK. Remap: PB3 GPIO, TRACESWO, TIMER1_CH1, SPI0_SCK. |+| 56 | PB4/NJTRST | bidirectional | Debug port pin: JTAG NJTRST (active-low reset) by default. Alternate: SPI2_MISO. Remap: TIMER2_CH0, PB4 GPIO, SPI0_MISO. |+| 57 | PB5 | bidirectional | General purpose I/O port B bit 5 (not 5 V tolerant). Alternate: I2C0_SMBA, SPI2_MOSI, I2S2_SD. Remap: TIMER2_CH1, SPI0_MOSI. |+| 58 | PB6 | bidirectional | General purpose I/O port B bit 6, 5 V tolerant. Alternate: I2C0_SCL, TIMER3_CH0. Remap: USART0_TX. |+| 59 | PB7 | bidirectional | General purpose I/O port B bit 7, 5 V tolerant. Alternate: I2C0_SDA, TIMER3_CH1. Remap: USART0_RX. |+| 60 | BOOT0 | input | Boot mode selection input. Sampled together with BOOT1 (PB2) on the fourth SYSCLK rising edge after reset to choose main flash, system memory or SRAM as the boot region. |+| 61 | PB8 | bidirectional | General purpose I/O port B bit 8, 5 V tolerant. Alternate: TIMER3_CH2, SDIO_D4, TIMER9_CH0. Remap: I2C0_SCL, CAN0_RX. |+| 62 | PB9 | bidirectional | General purpose I/O port B bit 9, 5 V tolerant. Alternate: TIMER3_CH3, SDIO_D5, TIMER10_CH0. Remap: I2C0_SDA, CAN0_TX. |+| 63 | VSS_3 | power_in | Digital ground return (VSS domain 3). Tie to the ground plane. |+| 64 | VDD_3 | power_in | Digital power supply (VDD domain 3), 2.6-3.6 V. Decouple with a 100 nF ceramic capacitor close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | GigaDevice Semicon Beijing |+| Package | LQFP-64(10x10) |+| Category | MCU |+| Pins | 64 |++## Ordering variants++- `GD32F103RCT6R4T6`+- `GD32F103RCT6R6T6`+- `GD32F103RCT6R8T6`+- `GD32F103RCT6RBT6`+- `GD32F103RCT6RCT6`+- `GD32F103RCT6RDT6`+- `GD32F103RCT6RET6`+- `GD32F103RCT6RFT6`+- `GD32F103RCT6RGT6`+- `GD32F103RCT6RIT6`+- `GD32F103RCT6RKT6`+- `GD32F103RCT6ZCT6`+- `GD32F103RCT6ZDT6`+- `GD32F103RCT6ZET6`+- `GD32F103RCT6ZFT6`+- `GD32F103RCT6ZGT6`+- `GD32F103RCT6ZIT6`+- `GD32F103RCT6ZKT6`+- `GD32F103RCT6V8T6`+- `GD32F103RCT6VBT6`+- `GD32F103RCT6VCT6`+- `GD32F103RCT6VDT6`+- `GD32F103RCT6VET6`+- `GD32F103RCT6VFT6`+- `GD32F103RCT6VGT6`+- `GD32F103RCT6VIT6`+- `GD32F103RCT6VKT6`+- `GD32F103RCT6C4T6`+- `GD32F103RCT6C6T6`+- `GD32F103RCT6C8T6`+- `GD32F103RCT6CBT6`+- `GD32F103RCT6T4U6`+- `GD32F103RCT6T6U6`+- `GD32F103RCT6T8U6`+- `GD32F103RCT6TBU6`++## CAD (KiCad official)++- Symbol: `GD32F103RCT6`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [GigaDevice Semicon Beijing datasheet](docs/gd32f103rct6-datasheet.pdf) (112 pp, sha256 `53da1a17a1523e83`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/gd32f103rct6-datasheet.pdf)
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