component
GD25Q80ETIGR
Public Made by Adomby adom
GigaDevice Semicon Beijing NOR FLASH, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+198−8@@ -1,13 +1,208 @@ {+ "schema_version": 1,+ "type": "component", "slug": "gd25q80etigr",+ "title": "GD25Q80ETIGR",+ "brief": "GigaDevice Semicon Beijing NOR FLASH, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "GigaDevice Semicon Beijing NOR FLASH, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "memory", "gd25q80etigr" ],+ "component": {+ "mpn": "GD25Q80ETIGR",+ "manufacturer": "GigaDevice Semicon Beijing",+ "package": "SOP-8",+ "pin_count": 8,+ "category": "Memory",+ "subcategory": "NOR FLASH",+ "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2105241445_GigaDevice-Semicon-Beijing-GD25Q80ETIGR_C2833050.pdf",+ "parts": {+ "symbol": "gd25q80etigr.kicad_sym",+ "footprint": "gd25q80etigr.kicad_mod",+ "model_3d": "gd25q80etigr.glb",+ "model_3d_step": "gd25q80etigr.step",+ "lbr": "gd25q80etigr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "CS#",+ "type": "input",+ "description": "Chip Select input, active low. Must be driven high when the device is not selected; must not be left floating after power-on. Enables the SPI interface when driven low."+ },+ {+ "number": "2",+ "name": "SO/IO1",+ "type": "bidirectional",+ "description": "Serial Data Output in Standard SPI mode; becomes bidirectional I/O1 in Dual/Quad SPI modes (Data Input Output 1). Data shifts on the falling edge of SCLK during output."+ },+ {+ "number": "3",+ "name": "WP#/IO2",+ "type": "bidirectional",+ "description": "Write Protect input (active low) in Standard/Dual SPI modes: when low, protects the Block Protect bits (BP4-BP0) and SRP bits (SRP1, SRP0) from being written. Becomes bidirectional I/O2 (Data Input Output 2) in Quad SPI mode."+ },+ {+ "number": "4",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference for the device (0 V)."+ },+ {+ "number": "5",+ "name": "SI/IO0",+ "type": "bidirectional",+ "description": "Serial Data Input in Standard SPI mode (data latched on rising edge of SCLK); becomes bidirectional I/O0 (Data Input Output 0) in Dual/Quad SPI modes."+ },+ {+ "number": "6",+ "name": "SCLK",+ "type": "input",+ "description": "Serial Clock input. Input data is latched on the rising edge of SCLK; output data shifts on the falling edge. Supports both SPI Mode 0 and Mode 3 up to 133 MHz."+ },+ {+ "number": "7",+ "name": "HOLD#/IO3",+ "type": "bidirectional",+ "description": "Hold input (active low) in Standard/Dual SPI modes: pauses serial communication without deselecting the device. Becomes bidirectional I/O3 (Data Input Output 3) in Quad SPI mode."+ },+ {+ "number": "8",+ "name": "VCC",+ "type": "power_in",+ "description": "Power supply input, 2.7 V to 3.6 V. Must be decoupled to VSS with a local bypass capacitor."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2105241445_GigaDevice-Semicon-Beijing-GD25Q80ETIGR_C2833050.pdf",+ "pages": 56,+ "sha256": "d73ddac270234097",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "GigaDevice Semicon Beijing",+ "Package": "SOP-8",+ "Category": "Memory",+ "Pins": "8"+ }+ },+ "variants": [+ {+ "mpn": "GD25Q80ETIGR",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGRETJG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGRETEG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGRETFG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGRESIG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGRESJG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGRESEG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGRESFG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGREEIG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGREEJG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGREEEG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGREEFG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGRENIG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGRENJG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGRENEG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGRENFG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGREWIG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGREWJG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGREWEG",+ "kind": "packaging"+ },+ {+ "mpn": "GD25Q80ETIGREWFG",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "gd25q80etigr"+ ],+ "discovery_pitch": "GD25Q80ETIGR (GigaDevice Semicon Beijing) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +220,5 @@ "docs/gd25q80etigr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }