GD25Q32CSIGR

@@ -0,0 +1,66 @@+# GD25Q32CSIGR++**GigaDevice Semicon Beijing** · NOR FLASH · SOIC-8-208mil++GD25Q32CSIGR from GigaDevice Semicon Beijing, in a SOIC-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CS# | input | Active-low Chip Select input. Must be driven high when the chip is not selected to place the device in standby; must not be left floating after power is on. Drive low to initiate SPI/Dual-SPI/Quad-SPI commands. |+| 2 | SO/IO1 | bidirectional | Serial Data Output in Standard SPI mode. Becomes bidirectional Data Input/Output 1 (IO1) in Dual and Quad SPI modes. Data shifts on the falling edge of SCLK in standard SPI. |+| 3 | WP#/IO2 | bidirectional | Active-low Write Protect input in Standard/Dual SPI modes, used to hardware-protect the writable bits of the Status Register. Becomes bidirectional Data Input/Output 2 (IO2) when Quad SPI is enabled (QE=1). |+| 4 | VSS | power_in | Ground reference (0 V) for the device. |+| 5 | SI/IO0 | bidirectional | Serial Data Input in Standard SPI mode; latched on the rising edge of SCLK. Becomes bidirectional Data Input/Output 0 (IO0) in Dual and Quad SPI modes. |+| 6 | SCLK | input | Serial Clock input. Provides the timing for all serial input/output operations; both SPI modes 0 and 3 are supported. Rated for up to 120 MHz for fast-read operations (30 pF load). |+| 7 | HOLD#/IO3 | bidirectional | Active-low Hold input (with QE=0) that pauses serial communication without deselecting the device. Becomes bidirectional Data Input/Output 3 (IO3) when Quad SPI is enabled (QE=1); in that case HOLD# functionality is disabled. |+| 8 | VCC | power_in | Main power supply input. Full operating range 2.7-3.6 V (nominal 3.3 V). Maximum active current 20 mA; power-down current 1 uA typical. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | GigaDevice Semicon Beijing |+| Package | SOIC-8-208mil |+| Category | Memory |+| Pins | 8 |++## Ordering variants++- `GD25Q32CSIGRCSIGR`+- `GD25Q32CSIGRCSIGY`+- `GD25Q32CSIGRCSMGR`+- `GD25Q32CSIGRCSMGY`+- `GD25Q32CSIGRCTIGR`+- `GD25Q32CSIGRCTIGY`+- `GD25Q32CSIGRCVIGR`+- `GD25Q32CSIGRCVIGY`+- `GD25Q32CSIGRCPIGR`+- `GD25Q32CSIGRCPIGY`+- `GD25Q32CSIGRCWIGR`+- `GD25Q32CSIGRCWIGY`+- `GD25Q32CSIGRCHIGR`+- `GD25Q32CSIGRCHIGY`+- `GD25Q32CSIGRCNIGR`+- `GD25Q32CSIGRCNIGY`+- `GD25Q32CSIGRCZIGR`+- `GD25Q32CSIGRCZIGY`+- `GD25Q32CSIGRCBIGR`+- `GD25Q32CSIGRCBIGY`++## CAD (KiCad official)++- Symbol: `GD25Q32CSIGR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8-208mil (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [GigaDevice Semicon Beijing datasheet](docs/gd25q32csigr-datasheet.pdf) (62 pp, sha256 `0d8e1516de769ea8`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/gd25q32csigr-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "gd25q32csigr",+  "version": "0.1.0",+  "type": "component",+  "description": "GigaDevice Semicon Beijing NOR FLASH, SOIC-8-208mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "memory",+    "gd25q32csigr"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "gd25q32csigr.kicad_sym",+    "gd25q32csigr.kicad_mod",+    "gd25q32csigr.glb",+    "gd25q32csigr.step",+    "gd25q32csigr.lbr",+    "docs/hero.png",+    "docs/gd25q32csigr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file