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gd25q16esig: factory component page (tier=lcsc)

Ray ·24d3c30ffe · ·parent 609be32
1 file changed +116−8
page.json+116−8
@@ -1,13 +1,126 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "gd25q16esig",+  "title": "GD25Q16ESIG",+  "brief": "GigaDevice Semicon Beijing NOR FLASH, SOP-8-208mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "GigaDevice Semicon Beijing NOR FLASH, SOP-8-208mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "memory",     "gd25q16esig"   ],+  "component": {+    "mpn": "GD25Q16ESIG",+    "manufacturer": "GigaDevice Semicon Beijing",+    "package": "SOP-8-208mil",+    "pin_count": 8,+    "category": "Memory",+    "subcategory": "NOR FLASH",+    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/6b8a460d13f4182b5e51681bc7a2ff41.pdf",+    "parts": {+      "symbol": "gd25q16esig.kicad_sym",+      "footprint": "gd25q16esig.kicad_mod",+      "model_3d": "gd25q16esig.glb",+      "model_3d_step": "gd25q16esig.step",+      "lbr": "gd25q16esig.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "CS#",+        "type": "input",+        "description": "Active-low chip select input. Must be driven high when the device is not selected; must not be left floating after power-on. Falling edge starts a command; rising edge ends it and returns SO to Hi-Z."+      },+      {+        "number": "2",+        "name": "SO/IO1",+        "type": "bidirectional",+        "description": "Serial data output in standard SPI mode. Becomes bidirectional data line IO1 in Dual SPI and Quad SPI modes. Shifts out on the falling edge of SCLK in standard mode."+      },+      {+        "number": "3",+        "name": "WP#/IO2",+        "type": "bidirectional",+        "description": "Active-low write-protect input in standard/Dual SPI (protects the Status Register BP4-BP0 and SRP0/SRP1 bits when driven low). Becomes bidirectional data line IO2 in Quad SPI mode when Status Register QE bit = 1."+      },+      {+        "number": "4",+        "name": "VSS",+        "type": "power_in",+        "description": "Device ground reference (0 V)."+      },+      {+        "number": "5",+        "name": "SI/IO0",+        "type": "bidirectional",+        "description": "Serial data input in standard SPI mode (data latched on the rising edge of SCLK). Becomes bidirectional data line IO0 in Dual and Quad SPI modes."+      },+      {+        "number": "6",+        "name": "SCLK",+        "type": "input",+        "description": "Serial clock input. Supports SPI modes 0 and 3 with fast-read clock up to 133 MHz at 30 pF load. Input data latched on the rising edge; output data shifts on the falling edge."+      },+      {+        "number": "7",+        "name": "HOLD#/IO3",+        "type": "bidirectional",+        "description": "Active-low HOLD input in standard/Dual SPI: pauses serial communication without deselecting the device (SO goes Hi-Z, SI/SCLK ignored). Becomes bidirectional data line IO3 in Quad SPI mode when QE = 1."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Single-supply core/IO power input. Operating range 2.7-3.6 V. Device auto-resets if VCC falls below the write-inhibit threshold VWI."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://datasheet.lcsc.com/datasheet/pdf/6b8a460d13f4182b5e51681bc7a2ff41.pdf",+        "pages": 58,+        "sha256": "e664882f90d940a2",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "GigaDevice Semicon Beijing",+      "Package": "SOP-8-208mil",+      "Category": "Memory",+      "Pins": "8"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "gd25q16esig"+  ],+  "discovery_pitch": "GD25Q16ESIG (GigaDevice Semicon Beijing) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +138,5 @@     "docs/gd25q16esig-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file