component
GD25Q128ESIGR
Public Made by Adomby adom
GigaDevice Semicon Beijing NOR FLASH, SOP-8-208mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+116−8@@ -1,13 +1,126 @@ {+ "schema_version": 1,+ "type": "component", "slug": "gd25q128esigr",+ "title": "GD25Q128ESIGR",+ "brief": "Unknown NOR FLASH, SOP-8-208mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Unknown NOR FLASH, SOP-8-208mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "memory", "gd25q128esigr" ],+ "component": {+ "mpn": "GD25Q128ESIGR",+ "manufacturer": "Unknown",+ "package": "SOP-8-208mil",+ "pin_count": 8,+ "category": "Memory",+ "subcategory": "NOR FLASH",+ "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2201121400_GigaDevice-Semicon-Beijing-GD25Q128ESIGR_C2928891.pdf",+ "parts": {+ "symbol": "gd25q128esigr.kicad_sym",+ "footprint": "gd25q128esigr.kicad_mod",+ "model_3d": "gd25q128esigr.glb",+ "model_3d_step": "gd25q128esigr.step",+ "lbr": "gd25q128esigr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "CS#",+ "type": "input",+ "description": "Chip Select input (active low). Must be driven high when chip is not selected; do not leave floating after power-on. Enables/disables the device for SPI communication."+ },+ {+ "number": "2",+ "name": "SO/IO1",+ "type": "bidirectional",+ "description": "Serial Data Output in standard SPI mode. Becomes bidirectional Data I/O1 when using Dual or Quad SPI commands."+ },+ {+ "number": "3",+ "name": "WP#/IO2",+ "type": "bidirectional",+ "description": "Write Protect input (active low) in standard/Dual SPI modes; protects Block Protect (BP4-BP0) and SRP status register bits when driven low. Becomes bidirectional Data I/O2 in Quad SPI modes (requires QE=1 in status register)."+ },+ {+ "number": "4",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference (0 V) for all supplies and signals."+ },+ {+ "number": "5",+ "name": "SI/IO0",+ "type": "bidirectional",+ "description": "Serial Data Input in standard SPI mode. Becomes bidirectional Data I/O0 when using Dual or Quad SPI commands."+ },+ {+ "number": "6",+ "name": "SCLK",+ "type": "input",+ "description": "Serial Clock input. Provides the timing reference for all serial input/output operations. Supports up to 133MHz."+ },+ {+ "number": "7",+ "name": "HOLD#/RESET#/IO3",+ "type": "bidirectional",+ "description": "Multifunction pin acting as HOLD# (when HOLD/RST status bit = 0) or hardware RESET# (when HOLD/RST = 1) in standard/Dual SPI. Becomes bidirectional Data I/O3 in Quad SPI (when QE=1). RESET# requires low pulse \u2265 tRLRH (1\u00b5s) to reset the flash."+ },+ {+ "number": "8",+ "name": "VCC",+ "type": "power_in",+ "description": "Main power supply. Operating range 2.7 V to 3.6 V. Bypass with a decoupling capacitor to VSS."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2201121400_GigaDevice-Semicon-Beijing-GD25Q128ESIGR_C2928891.pdf",+ "pages": 63,+ "sha256": "54cb85133a09da0c",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Unknown",+ "Package": "SOP-8-208mil",+ "Category": "Memory",+ "Pins": "8"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "gd25q128esigr"+ ],+ "discovery_pitch": "GD25Q128ESIGR (Unknown) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +138,5 @@ "docs/gd25q128esigr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }