app
Fusion - the Fusion 360 Bridge
Public Made by Adomby adom
Drive Autodesk Fusion 360 from the cloud via Adom Bridge: component libraries, IPC package generation, board layout, exports (STEP/Gerbers/BOM/CPL), fast APS cloud search, and parametric modeling.
← Commit history
Publish 1.9.351
43 files changed
+7869−24
.insiders-stage/fusion-bridge/version.json+4−4.release-page-head+1−1ab_client.py+280page.json+26−10rust/Cargo.lock+160−8rust/core/tests/alerts_golden.rs+13rust/core/tests/golden/alerts.json+44rust/lbr/tests/fixtures/ABM8-16.000MHZ-B2-T.lbr+121rust/lbr/tests/fixtures/CH340G.lbr+155rust/lbr/tests/fixtures/Demo_Board.bundle.ziprust/lbr/tests/fixtures/Demo_Board.lbr+706rust/lbr/tests/fixtures/IN-S63BTG.lbr+113rust/lbr/tests/fixtures/LAN7800.lbr+265rust/lbr/tests/fixtures/STM32L431RCT6TR.lbr+300rust/lbr/tests/fixtures/zipslip.ziprust/lbr/tests/golden.rs+121rust/lbr/tests/golden/ABM8-16.000MHZ-B2-T.json+22rust/lbr/tests/golden/CH340G.json+22rust/lbr/tests/golden/Demo_Board.bound3.lbr+715rust/lbr/tests/golden/Demo_Board.bound5.lbr+720rust/lbr/tests/golden/Demo_Board.bound5again.lbr+721rust/lbr/tests/golden/Demo_Board.json+58rust/lbr/tests/golden/Demo_Board.metadata.json+101rust/lbr/tests/golden/IN-S63BTG.json+22rust/lbr/tests/golden/LAN7800.json+22rust/lbr/tests/golden/STM32L431RCT6TR.json+22rust/lbr/tests/golden/bundle_files.json+21rust/lbr/tests/golden/inject_bindings.json+26rust/lbr/tests/golden/pair_parts.json+373rust/lbr/tests/golden/split/ABM8-16.000MHZ-B2-T.lbr+114rust/lbr/tests/golden/split/ABM8-16.000MHZ-B2-T__Crystal_SMD_3225-4Pin_3.2x2.5mm.lbr+114rust/lbr/tests/golden/split/CH340G.lbr+148rust/lbr/tests/golden/split/CH340G__SOIC-16_3.9x9.9mm_P1.27mm.lbr+148rust/lbr/tests/golden/split/IN-S63BTG.lbr+106rust/lbr/tests/golden/split/IN-S63BTG__IN-S63BTG.lbr+106rust/lbr/tests/golden/split/LAN7800.lbr+258rust/lbr/tests/golden/split/LAN7800__QFN-48_7x7mm.lbr+258rust/lbr/tests/golden/split/STM32L431RCT6TR.lbr+293rust/lbr/tests/golden/split/STM32L431RCT6TR__LQFP-64_10x10mm_P0.5mm.lbr+293rust/lbr/tests/golden/split/index.json+102tests/reports/verb-test-2026-09-03_1559.json+724tools/abrun.py+50tools/release-files.txt+1−1.insiders-stage/fusion-bridge/version.json+4−4@@ -1,10 +1,10 @@ { "manifest_version": 1, "name": "fusion360",- "version": "1.9.350",- "url": "https://wiki.adom.inc/download/adom/fusion-bridge/1.9.350/adom-bridge-fusion-v1.9.350.zip",- "sha256": "25fd743be34e2763addaf2f5ca197ca618f1d04da75f901a0742508a949ff866",- "size": 1660213,+ "version": "1.9.351",+ "url": "https://wiki.adom.inc/download/adom/fusion-bridge/1.9.351/adom-bridge-fusion-v1.9.351.zip",+ "sha256": "952c3fefe331f31cfb77b39d4d72cfc198ffce6f6440e60512a844b23738aac3",+ "size": 1662129, "verbPrefixes": [ "fusion_" ],
.release-page-head+1−1@@ -1 +1 @@-d46099268a4d53c059fcdaa1660f3b50b0eabc08+4a5d97ad1ce0388c66cecc3bf059fc7397bee45b
ab_client.pyadded+280@@ -0,0 +1,280 @@+"""Outbound calls from this bridge BACK to Adom Bridge (ab) core.++Why this exists: as of **ab 1.9.84** a bridge's loopback callback+(`POST $ADOM_DIRECT_API_URL/command`) reaches the FULL ab verb set - not just+`desktop_*`. That means this bridge can, on its own:++ * `notify_user` the user directly (it used to be "Unknown desktop command", so+ the old code returned a `notifyUser` PAYLOAD and asked the driving AI to relay+ it - a workaround, now dropped);+ * enumerate peer ADs on the relay (`targets`) and route ANY verb to one via a+ cross-ab `target` - so a bridge running on a VM can reach the user on their+ LAPTOP ("notify them where they actually are").++Everything here is BEST-EFFORT and never raises: an older ab (pre-1.9.84), a+missing env var, or a closed port just yields None/False and the caller falls+back to its prior behavior. We CAPABILITY-PROBE (`GET /commands`) rather than+hardcode, per the SDK, so this keeps working as the verb set evolves.++Auth model (from disc #78): `X-Adom-Bridge-Token` = ATTRIBUTION only (ab binds+127.0.0.1 and trusts-by-install), so calls run ungated; a stale token 403s, so we+re-read it from the env on every call.+"""++import json+import os+import urllib.request+import urllib.error++_TIMEOUT = 8+# Cache the capability set for the process lifetime (the ab verb surface doesn't+# change under a running ab). None = not-yet-probed / unreachable.+_caps_cache = None+_self_name_cache = None+++_discovered_base = None # None = not tried, "" = tried+failed, str = discovered base URL+++def _raw_get(url, timeout=4):+ """Low-level GET that does NOT go through _base_url (used by discovery so it can't recurse).+ Returns parsed JSON, or None."""+ try:+ req = urllib.request.Request(url, headers={"Accept": "application/json"}, method="GET")+ with urllib.request.urlopen(req, timeout=timeout) as resp:+ return json.loads(resp.read().decode("utf-8", "replace"))+ except Exception:+ return None+++def _looks_like_ad_api(data) -> bool:+ """Does a /commands response look like ab's verb catalog (so we don't bind a random service)?"""+ if isinstance(data, dict):+ if isinstance(data.get("commands"), list):+ return True+ # ab's /commands also carries a _hint mentioning POST /command+ if "command" in (data.get("_hint") or "").lower():+ return True+ return isinstance(data, list)+++def _discover_direct_api():+ """Find ab's loopback direct-API base by port-probing, for the case where ab did NOT inject+ ADOM_DIRECT_API_URL into our spawn env (seen live on an ab 1.9.103 Hyper-V VM: the direct API+ WAS up on 127.0.0.1 but the env var was absent, so available() short-circuited to False and the+ bridge fell back to slow CLI relays - John caught it 2026-07-14). We enumerate the loopback TCP+ ports adom-desktop.exe is LISTENING on and probe each `/commands`; the one that returns ab's verb+ catalog is the direct API. Cached for the process lifetime. Windows-only + best-effort; never raises."""+ global _discovered_base+ if _discovered_base: # cache SUCCESS only; a transient miss must not stick forever+ return _discovered_base+ try:+ import subprocess as _sp, re as _re+ cnw = getattr(_sp, "CREATE_NO_WINDOW", 0)+ tl = _sp.run(["tasklist", "/FI", "IMAGENAME eq adom-desktop.exe", "/FO", "CSV", "/NH"],+ capture_output=True, text=True, timeout=8, creationflags=cnw).stdout+ pids = set(_re.findall(r'"adom-desktop\.exe","(\d+)"', tl))+ if not pids:+ return None+ ns = _sp.run(["netstat", "-ano", "-p", "TCP"], capture_output=True, text=True,+ timeout=8, creationflags=cnw).stdout+ seen = []+ for line in ns.splitlines():+ m = _re.search(r'\s(?:127\.0\.0\.1|\[::1\]):(\d+)\s+\S+\s+LISTENING\s+(\d+)', line)+ if m and m.group(2) in pids:+ p = int(m.group(1))+ if p not in seen:+ seen.append(p)+ for p in seen:+ base = f"http://127.0.0.1:{p}"+ if _looks_like_ad_api(_raw_get(base + "/commands")):+ _discovered_base = base+ return base+ except Exception:+ pass+ return None+++def _base_url():+ """The loopback direct-API base: the URL ab injects into our spawn env, else one we DISCOVER by+ probing adom-desktop's loopback ports (ab sometimes fails to inject the env var even though the+ API is up - see _discover_direct_api). None only if neither yields a reachable API."""+ env = (os.environ.get("ADOM_DIRECT_API_URL") or "").rstrip("/")+ if env:+ return env+ return _discover_direct_api()+++def _token():+ # Re-read every call: after an ab restart the old token 403s.+ return os.environ.get("ADOM_BRIDGE_TOKEN") or ""+++def _http(method, path, body=None, timeout=_TIMEOUT):+ """Best-effort JSON request to the direct API. Returns parsed dict/list or None."""+ base = _base_url()+ if not base:+ return None+ url = base + path+ data = None+ headers = {"Accept": "application/json"}+ tok = _token()+ if tok:+ headers["X-Adom-Bridge-Token"] = tok+ if body is not None:+ data = json.dumps(body).encode("utf-8")+ headers["Content-Type"] = "application/json"+ req = urllib.request.Request(url, data=data, headers=headers, method=method)+ try:+ with urllib.request.urlopen(req, timeout=timeout) as resp:+ raw = resp.read().decode("utf-8", "replace")+ except Exception:+ return None+ try:+ return json.loads(raw)+ except Exception:+ return None+++def available() -> bool:+ """True if the direct API is reachable at all (env var present + port open)."""+ if not _base_url():+ return False+ return capabilities() is not None+++def _names_from_list(items):+ """Collect verb names from a list of strings and/or {name|command|verb} dicts."""+ out = set()+ for it in items or []:+ if isinstance(it, str):+ out.add(it)+ elif isinstance(it, dict):+ n = it.get("name") or it.get("command") or it.get("verb")+ if n:+ out.add(n)+ return out+++def _parse_command_names(data):+ """Extract the full verb-name set from a /commands response, tolerant of BOTH the legacy+ `{"commands":[...]}` shape AND the current ab (1.9.x) shape, where verbs are split across:+ topLevel: ["notify_user", "targets", ...] (flat name list)+ cliRequired: ["pull_file", "shell_execute", ...] (flat name list)+ bridges: [{name, verbs:[...]}, ...] (per-bridge verb lists)+ desktop: {commands:["screenshot_window", ...]} (SHORT names; real verb = "desktop_"+name)+ Without this, capabilities() returned None on every current ab, so available() was always False+ and the bridge silently fell back to slow CLI relays (root-caused live, John 2026-07-14)."""+ names = set()+ if isinstance(data, list):+ return _names_from_list(data)+ if not isinstance(data, dict):+ return names+ if isinstance(data.get("commands"), list): # legacy shape+ names |= _names_from_list(data["commands"])+ for k in ("topLevel", "cliRequired"): # current: flat name lists+ if isinstance(data.get(k), list):+ names |= _names_from_list(data[k])+ for b in (data.get("bridges") or []): # current: per-bridge verb lists+ if isinstance(b, dict):+ names |= _names_from_list(b.get("verbs"))+ dk = data.get("desktop") # current: desktop short names -> desktop_*+ if isinstance(dk, dict):+ for c in (dk.get("commands") or []):+ if isinstance(c, str):+ names.add(c)+ names.add("desktop_" + c)+ return names+++def capabilities():+ """Set of ab command names from `GET /commands` (cached). None if unreachable/unparseable."""+ global _caps_cache+ if _caps_cache is not None:+ return _caps_cache+ data = _http("GET", "/commands")+ if data is None:+ return None+ names = _parse_command_names(data)+ if not names:+ return None+ _caps_cache = names+ return names+++def has(command: str):+ """True/False if `command` is in the probed capability set; None if unknown+ (probe failed). Callers should try when the answer isn't an explicit False."""+ caps = capabilities()+ if caps is None:+ return None+ return command in caps+++def call(command: str, args=None, target=None, timeout=_TIMEOUT):+ """Dispatch ANY ab verb back through the direct API. Returns the parsed JSON+ response dict, or None on any failure (never raises).++ target: a peer ab clientName (from `peers()`), or "all" to fan out. Omit to+ run on THIS ab (the one hosting the bridge)."""+ payload = {"command": command}+ if args:+ payload["args"] = args+ if target:+ payload["target"] = target+ return _http("POST", "/command", body=payload, timeout=timeout)+++def self_name():+ """This ab's own clientName (to exclude it from peer routing). Best-effort."""+ global _self_name_cache+ if _self_name_cache is not None:+ return _self_name_cache or None+ st = _http("GET", "/status") or {}+ name = st.get("clientName") or st.get("name") or st.get("hostname")+ _self_name_cache = name or ""+ return name or None+++def peers():+ """clientNames of the OTHER ADs on the relay (excludes self). [] if none/unknown."""+ res = call("targets") or {}+ # tolerate shape drift: the peer list is under `clients` on current ab, `targets` on older.+ tlist = None+ if isinstance(res, dict):+ tlist = res.get("targets") or res.get("clients")+ if not isinstance(tlist, list):+ return []+ me = self_name()+ out = []+ for t in tlist:+ n = t if isinstance(t, str) else ((t or {}).get("name") or (t or {}).get("hostname") or (t or {}).get("clientName"))+ if n and n != me:+ out.append(n)+ return out+++def notify(title, body, level="info", buttons=None, target=None, reach_user=False):+ """Fire an ab `notify_user` toast. Returns the response dict, or None if the+ direct API is unreachable or ab is too old to have notify_user (caller falls+ back to returning a notifyUser payload for the driving AI to relay).++ reach_user: when this bridge may be running UNATTENDED (e.g. on a VM) while the+ user is on another machine, set True to also reach peer ADs. Since ab can't yet+ resolve which peer is "attended", we fan out to "all" when peers exist so the+ toast lands wherever the user actually is. `target` (explicit) overrides this.+ """+ if has("notify_user") is False:+ return None+ args = {"title": title, "body": body, "level": level}+ if buttons:+ args["buttons"] = buttons+ tgt = target+ if tgt is None and reach_user:+ # Fan out to EVERY connected desktop so the toast lands wherever the user actually is. Do NOT+ # gate on peers() (John 2026-07-14): the `targets` response shape drifted to {clients:[...]}+ # so peers() wrongly returns [] and the toast would hit only THIS (unattended VM). The relay+ # honors target="all" directly - verified reaching the user's laptop.+ tgt = "all"+ res = call("notify_user", args, target=tgt)+ return res
page.json+26−10@@ -11,10 +11,6 @@ "uninstall": "./uninstall.sh" }, "tags": [- "ab",- "bridge",- "fusion",- "desktop-app", "fusion360", "autodesk", "cad",@@ -79,10 +75,7 @@ "build a basic parts library", "add a 3d model to a component", "make a fusion 360 library with 3d",- "set up the fusion bridge",- "fusion dashboard",- "fusion status page",- "open the fusion launch page"+ "set up the fusion bridge" ], "discovery_pitch": "Use the Adom Bridge Fusion 360 bridge when the user wants to DRIVE Autodesk Fusion 360 from the cloud: open/search their team's Fusion cloud designs, lay out a PCB or do electronics, export STEP/IGES/STL/Gerbers/BOM, or build a component library with real rendering 3D. It runs Fusion on the user's own machine via Adom Bridge. NOT for web/browser/login/form-filling (that's the native-browser extension) and NOT for KiCad (that's the kicad bridge).", "brief": "Drive Autodesk Fusion 360 from the cloud via Adom Bridge: component libraries, IPC package generation, board layout, exports (STEP/Gerbers/BOM/CPL), fast APS cloud search, and parametric modeling.",@@ -111,5 +104,28 @@ "label": "Part volume", "prompt": "How much material does each printed part in this assembly use?" }- ]-}+ ],+ "agent_permissions": {+ "allow_bash": [],+ "allow": [+ "adom-desktop-fusion-bridge read-only verbs (via the adom-bridge CLI): fusion_readiness, fusion_get_app_state, fusion_addin_status, fusion_check_dialogs - state queries; they change nothing.",+ "adom-desktop-fusion-bridge read-only verbs: fusion_alerts (reads Fusion's own log for toasts), fusion_document_info, fusion_window_info, fusion_board_info, fusion_library_parts - inspect only.",+ "adom-desktop-fusion-bridge read-only verbs: fusion_prove_result (a persisted run report), fusion_plan_library_import (report-only preflight), fusion_list_cloud_projects, fusion_describe.",+ "adom-desktop-fusion-bridge evidence captures fusion_screenshot_fusion and fusion_capture_library_views read pixels and write local image files only."+ ],+ "soft_deny": [+ "adom-desktop-fusion-bridge lifecycle verbs fusion_stop, fusion_kill, fusion_restart_for_addin close or kill the Fusion application - keep the human prompt.",+ "adom-desktop-fusion-bridge fusion_install_fusion silently installs Autodesk Fusion on the user's machine.",+ "adom-desktop-fusion-bridge fusion_cleanup_cloud_files deletes files from the user's Autodesk cloud hub.",+ "adom-desktop-fusion-bridge managed-library verbs (fusion_managed_library_push/pull/create/link/unlink) publish to or overwrite the user's library.io libraries."+ ],+ "environment": [+ "adom-desktop-fusion-bridge is the Fusion 360 bridge for Adom Bridge; its fusion_* verbs are invoked through the adom-bridge CLI and drive Autodesk Fusion on the user's own desktop.",+ "adom-desktop-fusion-bridge desktop actions also pass Adom Bridge's own human-approval gate (caller identity, per-call reason, Activity Log) - a container approval is the first of two gates."+ ]+ },+ "author": {+ "name": "John Lauer",+ "email": "[email protected]"+ }+}
rust/Cargo.lock+160−8@@ -10,7 +10,7 @@ checksum = "320119579fcad9c21884f5c4861d16174d0e06250625266f50fe6898340abefa" [[package]] name = "adom-fusion-bridge"-version = "1.9.350"+version = "1.9.351" dependencies = [ "fusion-core", "fusion-os-mac",@@ -20,6 +20,24 @@ dependencies = [ "ureq", ] +[[package]]+name = "aho-corasick"+version = "1.1.5"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "c982642fa9e8606056828ee9a8505737230110bb1099153c79efe865c59d12ba"+dependencies = [+ "memchr",+]++[[package]]+name = "arbitrary"+version = "1.4.2"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "c3d036a3c4ab069c7b410a2ce876bd74808d2d0888a82667669f8e783a898bf1"+dependencies = [+ "derive_arbitrary",+]+ [[package]] name = "ascii" version = "1.1.0"@@ -32,6 +50,12 @@ version = "0.22.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "72b3254f16251a8381aa12e40e3c4d2f0199f8c6508fbecb9d91f575e0fbb8c6" +[[package]]+name = "bumpalo"+version = "3.20.3"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "72f5acc6cb2ba439de613abc23857ec3d78374d8ed5ac84e9d11336e87da8649"+ [[package]] name = "cc" version = "1.4.4"@@ -63,6 +87,23 @@ dependencies = [ "cfg-if", ] +[[package]]+name = "crossbeam-utils"+version = "0.8.22"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "61803da095bee82a81bb1a452ecc25d3b2f1416d1897eb86430c6159ef717c17"++[[package]]+name = "derive_arbitrary"+version = "1.4.2"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "1e567bd82dcff979e4b03460c307b3cdc9e96fde3d73bed1496d2bc75d9dd62a"+dependencies = [+ "proc-macro2",+ "quote",+ "syn 2.0.119",+]+ [[package]] name = "displaydoc" version = "0.2.7"@@ -74,6 +115,12 @@ dependencies = [ "syn 3.0.4", ] +[[package]]+name = "equivalent"+version = "1.0.2"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "877a4ace8713b0bcf2a4e7eec82529c029f1d0619886d18145fea96c3ffe5c0f"+ [[package]] name = "find-msvc-tools" version = "0.1.11"@@ -102,31 +149,36 @@ dependencies = [ [[package]] name = "fusion-core"-version = "1.9.350"+version = "1.9.351" dependencies = [ "serde", "serde_json",- "thiserror",+ "thiserror 1.0.69", "ureq", ] [[package]] name = "fusion-lbr"-version = "1.9.350"+version = "1.9.351" dependencies = [- "thiserror",+ "regex",+ "roxmltree",+ "serde",+ "serde_json",+ "thiserror 1.0.69",+ "zip", ] [[package]] name = "fusion-os-mac"-version = "1.9.350"+version = "1.9.351" dependencies = [ "fusion-core", ] [[package]] name = "fusion-os-win"-version = "1.9.350"+version = "1.9.351" dependencies = [ "fusion-core", "windows-sys 0.59.0",@@ -143,6 +195,12 @@ dependencies = [ "wasi", ] +[[package]]+name = "hashbrown"+version = "0.17.1"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "ed5909b6e89a2db4456e54cd5f673791d7eca6732202bbf2a9cc504fe2f9b84a"+ [[package]] name = "httpdate" version = "1.0.3"@@ -253,6 +311,16 @@ dependencies = [ "icu_properties", ] +[[package]]+name = "indexmap"+version = "2.14.1"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "07aa2048142242915a31d35844fb311e0e53fcca590c3a0a40dcf1b841fa09eb"+dependencies = [+ "equivalent",+ "hashbrown",+]+ [[package]] name = "itoa" version = "1.0.18"@@ -332,6 +400,35 @@ dependencies = [ "proc-macro2", ] +[[package]]+name = "regex"+version = "1.13.1"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "f020237b6c8eed93db2e2cb53c00c60a8e1bc73da7d073199a1180401450218d"+dependencies = [+ "aho-corasick",+ "memchr",+ "regex-automata",+ "regex-syntax",+]++[[package]]+name = "regex-automata"+version = "0.4.18"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "ad8553b9b26413251cbf30e620595c7a41b3887f03da04579c0e6b0d6a06b4b2"+dependencies = [+ "aho-corasick",+ "memchr",+ "regex-syntax",+]++[[package]]+name = "regex-syntax"+version = "0.8.11"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "d6f6ff9a378485b298a5286656da665ba74413d36db0979633275d2e708145d4"+ [[package]] name = "ring" version = "0.17.14"@@ -346,6 +443,12 @@ dependencies = [ "windows-sys 0.52.0", ] +[[package]]+name = "roxmltree"+version = "0.20.0"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "6c20b6793b5c2fa6553b250154b78d6d0db37e72700ae35fad9387a46f487c97"+ [[package]] name = "rustls" version = "0.23.43"@@ -493,7 +596,16 @@ version = "1.0.69" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "b6aaf5339b578ea85b50e080feb250a3e8ae8cfcdff9a461c9ec2904bc923f52" dependencies = [- "thiserror-impl",+ "thiserror-impl 1.0.69",+]++[[package]]+name = "thiserror"+version = "2.0.20"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "ec86235f5fcc2a73650310756d2ac5b138a5780bbbdfae3eeccec992c435ba4f"+dependencies = [+ "thiserror-impl 2.0.20", ] [[package]]@@ -507,6 +619,17 @@ dependencies = [ "syn 2.0.119", ] +[[package]]+name = "thiserror-impl"+version = "2.0.20"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "bc04cd3e1236dd4a98afca4569f2deb3f120e5422a4023be2cb683f8486292af"+dependencies = [+ "proc-macro2",+ "quote",+ "syn 3.0.4",+]+ [[package]] name = "tiny_http" version = "0.12.0"@@ -772,6 +895,23 @@ dependencies = [ "syn 3.0.4", ] +[[package]]+name = "zip"+version = "2.4.2"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "fabe6324e908f85a1c52063ce7aa26b68dcb7eb6dbc83a2d148403c9bc3eba50"+dependencies = [+ "arbitrary",+ "crc32fast",+ "crossbeam-utils",+ "displaydoc",+ "flate2",+ "indexmap",+ "memchr",+ "thiserror 2.0.20",+ "zopfli",+]+ [[package]] name = "zlib-rs" version = "0.6.7"@@ -783,3 +923,15 @@ name = "zmij" version = "1.0.23" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "29666d0abbfad1e3dc4dcf6144730dd3a3ab225bbbdac83319345b1b44ccfc1b"++[[package]]+name = "zopfli"+version = "0.8.3"+source = "registry+https://github.com/rust-lang/crates.io-index"+checksum = "f05cd8797d63865425ff89b5c4a48804f35ba0ce8d125800027ad6017d2b5249"+dependencies = [+ "bumpalo",+ "crc32fast",+ "log",+ "simd-adler32",+]
rust/core/tests/alerts_golden.rsadded+13@@ -0,0 +1,13 @@+use std::fs;+#[test]+fn alert_parsing_matches_the_python_bridge() {+ let g: serde_json::Value = serde_json::from_str(&fs::read_to_string(concat!(env!("CARGO_MANIFEST_DIR"), "/tests/golden/alerts.json")).unwrap()).unwrap();+ let lines: Vec<String> = serde_json::from_value(g["lines"].clone()).unwrap();+ // cutoff 2026-09-03T07:30:00 treated as UTC, exactly as the golden generator did+ let cutoff: i64 = 20_699 * 86_400 + 7 * 3_600 + 30 * 60; // 2026-09-03 is day 20699 since the epoch+ let got = fusion_core::alerts::parse_alert_lines(lines.iter().map(|s| s.as_str()), cutoff);+ let want: Vec<fusion_core::alerts::Alert> = serde_json::from_value(g["expected"].clone()).unwrap();+ assert_eq!(got, want);+ let since = fusion_core::alerts::alerts_since(&got, "20260903T074100");+ assert!(since.iter().all(|a| a.at.as_deref().map(|s| s > "20260903T074100").unwrap_or(false)));+}
rust/core/tests/golden/alerts.jsonadded+44@@ -0,0 +1,44 @@+{+ "lines": [+ "20260903T074019 W .28736 New Alert message. Tooltip: Components, Short Message: Components, Long Message: Components",+ "20260903T074019 W .28736 New Alert message. Tooltip: Components, Short Message: Components, Long Message: Components",+ "20260903T074100 W .28736 New Alert message. Tooltip: Library 'Foo' could not be saved, Short Message: Save failed, Long Message: The cloud rejected the save\n",+ "20260903T074101 W .28736 New Alert message. Tooltip: Only a tooltip here\n",+ "20260903T074102 W .28736 New Alert message. \n",+ "20260903T074103 I .1 Something else entirely\n",+ "garbage without a stamp New Alert message. Tooltip: stampless, Short Message: no stamp\n",+ "20260101T000000 W .1 New Alert message. Tooltip: ancient, Short Message: too old\n",+ "20260903T074104 W .28736 New Alert message. Tooltip: , Short Message: , Long Message: only long\n"+ ],+ "cutoffUtc": "20260903T073000",+ "expected": [+ {+ "at": "20260903T074019",+ "text": "Components"+ },+ {+ "at": "20260903T074019",+ "text": "Components"+ },+ {+ "at": "20260903T074100",+ "text": "Save failed"+ },+ {+ "at": "20260903T074101",+ "text": "Only a tooltip here"+ },+ {+ "at": "20260903T074102",+ "text": ""+ },+ {+ "at": null,+ "text": "no stamp"+ },+ {+ "at": "20260903T074104",+ "text": "Tooltip: , Short Message: , Long Message: only long"+ }+ ]+}
rust/lbr/tests/fixtures/ABM8-16.000MHZ-B2-T.lbradded+121@@ -0,0 +1,121 @@+<?xml version="1.0" encoding="utf-8"?>+<!DOCTYPE eagle SYSTEM "eagle.dtd">+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no"/></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>+<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/>+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>+<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/>+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>+<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes"/>+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/>+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/>+<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/>+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes"/>+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes"/>+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes"/>+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes"/>+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>+<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="yes"/>+<layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="yes"/>+<layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="yes"/>+<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="yes"/>+<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="yes"/>+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/>+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/>+<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes"/>+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>+<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes"/>+<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes"/>+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>+<layer number="93" name="Pins" color="2" fill="1" visible="no" active="yes"/>+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/>+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/>+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/>+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/>+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>+</layers>+<library>+<description>Four pin crystal, GND on pins 2 and 4</description>+<packages>+<package name="Crystal_SMD_3225-4Pin_3.2x2.5mm">+ <description>Crystal, 3.2 x 2.5 mm. SMD3225/4, Crystal, 3.2x2.5mm package, SMD</description>+ <smd name="1" x="-1.1000" y="-0.8500" dx="1.4000" dy="1.2000" layer="1" roundness="42"/>+ <smd name="2" x="1.1000" y="-0.8500" dx="1.4000" dy="1.2000" layer="1" roundness="42"/>+ <smd name="3" x="1.1000" y="0.8500" dx="1.4000" dy="1.2000" layer="1" roundness="42"/>+ <smd name="4" x="-1.1000" y="0.8500" dx="1.4000" dy="1.2000" layer="1" roundness="42"/>+ <polygon width="0.1000" layer="51">+ <vertex x="1.6000" y="1.2500"/>+ <vertex x="1.6000" y="-1.2500"/>+ <vertex x="-0.9750" y="-1.2500"/>+ <vertex x="-1.6000" y="-0.6250"/>+ <vertex x="-1.6000" y="1.2500"/>+ </polygon>+ <wire x1="-2.0600" y1="1.7100" x2="-2.0600" y2="-1.7100" width="0.1200" layer="21"/>+ <wire x1="-2.0600" y1="-1.7100" x2="2.0600" y2="-1.7100" width="0.1200" layer="21"/>+ <text x="0" y="2.310" size="1.27" layer="25" align="bottom-center">>NAME</text>+ <text x="0" y="-2.310" size="1.27" layer="27" align="top-center">>VALUE</text>+</package>+</packages>+<symbols>+<symbol name="ABM8-16.000MHZ-B2-T">+ <description>Four pin crystal, GND on pins 2 and 4</description>+ <wire x1="-1.143" y1="2.54" x2="1.143" y2="2.54" width="0.254" layer="94"/>+ <wire x1="1.143" y1="2.54" x2="1.143" y2="-2.54" width="0.254" layer="94"/>+ <wire x1="1.143" y1="-2.54" x2="-1.143" y2="-2.54" width="0.254" layer="94"/>+ <wire x1="-1.143" y1="-2.54" x2="-1.143" y2="2.54" width="0.254" layer="94"/>+ <wire x1="-2.5400" y1="2.2860" x2="-2.5400" y2="3.5560" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="3.5560" x2="2.5400" y2="3.5560" width="0.1524" layer="94"/>+ <wire x1="2.5400" y1="3.5560" x2="2.5400" y2="2.2860" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="0.0000" x2="-2.0320" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="-2.2860" x2="-2.5400" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="-3.5560" x2="2.5400" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="2.5400" y1="-3.5560" x2="2.5400" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-2.0320" y1="-1.2700" x2="-2.0320" y2="1.2700" width="0.1524" layer="94"/>+ <wire x1="0.0000" y1="-3.8100" x2="0.0000" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="2.0320" y1="0.0000" x2="2.5400" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="2.0320" y1="-1.2700" x2="2.0320" y2="1.2700" width="0.1524" layer="94"/>+ <text x="3.1750" y="5.0800" size="1.27" layer="95" align="center">>NAME</text>+ <text x="3.1750" y="3.1750" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="1" x="-3.81" y="0" length="short" direction="pas" visible="pad"/>+ <pin name="G" x="0" y="-5.08" length="short" direction="pas" rot="R90" visible="pad"/>+ <pin name="3" x="3.81" y="0" length="short" direction="pas" rot="R180" visible="pad"/>+ <pin name="G@2" x="0" y="-5.08" length="short" direction="pas" rot="R90" visible="pad"/>+</symbol>+</symbols>+<devicesets>+<deviceset name="ABM8-16.000MHZ-B2-T" prefix="Y">+ <description>Four pin crystal, GND on pins 2 and 4</description>+ <gates>+ <gate name="G$1" symbol="ABM8-16.000MHZ-B2-T" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="Crystal_SMD_3225-4Pin_3.2x2.5mm">+ <connects>+ <connect gate="G$1" pin="1" pad="1"/>+ <connect gate="G$1" pin="G" pad="2"/>+ <connect gate="G$1" pin="3" pad="3"/>+ <connect gate="G$1" pin="G@2" pad="4"/>+ </connects>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+</devicesets>+</library>+</drawing>+</eagle>
rust/lbr/tests/fixtures/CH340G.lbradded+155@@ -0,0 +1,155 @@+<?xml version="1.0" encoding="utf-8"?>+<!DOCTYPE eagle SYSTEM "eagle.dtd">+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no"/></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>+<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/>+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>+<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/>+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>+<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes"/>+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/>+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/>+<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/>+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes"/>+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes"/>+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes"/>+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes"/>+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>+<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="yes"/>+<layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="yes"/>+<layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="yes"/>+<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="yes"/>+<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="yes"/>+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/>+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/>+<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes"/>+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>+<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes"/>+<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes"/>+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>+<layer number="93" name="Pins" color="2" fill="1" visible="no" active="yes"/>+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/>+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/>+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/>+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/>+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>+</layers>+<library>+<description>USB serial converter, UART, SOIC-16</description>+<packages>+<package name="SOIC-16_3.9x9.9mm_P1.27mm">+ <description>SOIC-16, 3.9 x 9.9 mm, 1.27 mm pitch</description>+ <smd name="1" x="-2.4750" y="4.4450" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="2" x="-2.4750" y="3.1750" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="3" x="-2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="4" x="-2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="5" x="-2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="6" x="-2.4750" y="-1.9050" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="7" x="-2.4750" y="-3.1750" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="8" x="-2.4750" y="-4.4450" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="9" x="2.4750" y="-4.4450" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="10" x="2.4750" y="-3.1750" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd 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x1="-2.0600" y1="5.0050" x2="-2.0600" y2="5.0600" width="0.1200" layer="21"/>+ <wire x1="-2.0600" y1="-5.0600" x2="-2.0600" y2="-5.0050" width="0.1200" layer="21"/>+ <wire x1="2.0600" y1="5.0600" x2="2.0600" y2="5.0050" width="0.1200" layer="21"/>+ <wire x1="2.0600" y1="-5.0050" x2="2.0600" y2="-5.0600" width="0.1200" layer="21"/>+ <wire x1="2.0600" y1="-5.0600" x2="-2.0600" y2="-5.0600" width="0.1200" layer="21"/>+ <text x="0" y="6.020" size="1.27" layer="25" align="bottom-center">>NAME</text>+ <text x="0" y="-6.020" size="1.27" layer="27" align="top-center">>VALUE</text>+</package>+</packages>+<symbols>+<symbol name="CH340G">+ <description>USB serial converter, UART, SOIC-16</description>+ <wire x1="-12.7" y1="15.239999999999998" x2="12.7" y2="15.239999999999998" width="0.254" layer="94"/>+ <wire x1="12.7" y1="15.239999999999998" x2="12.7" y2="-15.239999999999998" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-15.239999999999998" x2="-12.7" y2="-15.239999999999998" width="0.254" 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rust/lbr/tests/fixtures/Demo_Board.bundle.zipadded⋯ 1 unchanged line ⋯
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direction="io"/>+ <pin name="PC1" x="-17.78" y="17.78" length="middle" direction="io"/>+ <pin name="PC2" x="-17.78" y="15.24" length="middle" direction="io"/>+ <pin name="PC3" x="-17.78" y="12.7" length="middle" direction="io"/>+ <pin name="VSSA/VREF-" x="-17.78" y="10.16" length="middle" direction="pwr"/>+ <pin name="VDDA/VREF+" x="-17.78" y="7.62" length="middle" direction="pwr"/>+ <pin name="PA0" x="-17.78" y="5.08" length="middle" direction="io"/>+ <pin name="PA1" x="-17.78" y="2.54" length="middle" direction="io"/>+ <pin name="PA2" x="-17.78" y="0" length="middle" direction="io"/>+ <pin name="PA3" x="-17.78" y="-2.54" length="middle" direction="io"/>+ <pin name="VSS" x="-17.78" y="-5.08" length="middle" direction="pwr"/>+ <pin name="VDD" x="-17.78" y="-7.62" length="middle" direction="pwr"/>+ <pin name="PA4" x="-17.78" y="-10.16" length="middle" direction="io"/>+ <pin name="PA5" x="-17.78" y="-12.7" length="middle" direction="io"/>+ <pin name="PA6" x="-17.78" y="-15.24" length="middle" direction="io"/>+ <pin name="PA7" x="-17.78" y="-17.78" length="middle" direction="io"/>+ <pin name="PC4" x="-17.78" y="-20.32" length="middle" direction="io"/>+ <pin name="PC5" x="-17.78" y="-22.86" length="middle" direction="io"/>+ <pin name="PB0" x="-17.78" y="-25.4" length="middle" direction="io"/>+ <pin name="PB1" x="-17.78" y="-27.94" length="middle" direction="io"/>+ <pin name="PB2" x="-17.78" y="-30.48" length="middle" direction="io"/>+ <pin name="PB10" x="-17.78" y="-33.02" length="middle" direction="io"/>+ <pin name="PB11" x="-17.78" y="-35.56" length="middle" direction="io"/>+ <pin name="VSS@2" x="-17.78" y="-38.1" length="middle" direction="pwr"/>+ <pin name="VDD@2" x="-17.78" y="-40.64" length="middle" direction="pwr"/>+ <pin name="VDD@3" x="17.78" y="38.1" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@3" x="17.78" y="35.56" length="middle" direction="pwr" rot="R180"/>+ <pin name="PB9" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PB8" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PH3-BOOT0" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PB7" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PB6" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PB5" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@4" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@4" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13" x="17.78" y="-7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+</symbol>+<symbol name="ABM8-16.000MHZ-B2-T">+ <description>Four pin crystal, GND on pins 2 and 4</description>+ <wire x1="-1.143" y1="2.54" x2="1.143" y2="2.54" width="0.254" layer="94"/>+ <wire x1="1.143" y1="2.54" x2="1.143" y2="-2.54" width="0.254" layer="94"/>+ <wire x1="1.143" y1="-2.54" x2="-1.143" y2="-2.54" width="0.254" layer="94"/>+ <wire x1="-1.143" y1="-2.54" x2="-1.143" y2="2.54" width="0.254" layer="94"/>+ <wire x1="-2.5400" y1="2.2860" x2="-2.5400" y2="3.5560" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="3.5560" x2="2.5400" y2="3.5560" width="0.1524" layer="94"/>+ <wire x1="2.5400" y1="3.5560" x2="2.5400" y2="2.2860" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="0.0000" x2="-2.0320" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="-2.2860" x2="-2.5400" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="-3.5560" x2="2.5400" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="2.5400" y1="-3.5560" x2="2.5400" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-2.0320" y1="-1.2700" x2="-2.0320" y2="1.2700" width="0.1524" layer="94"/>+ <wire x1="0.0000" y1="-3.8100" x2="0.0000" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="2.0320" y1="0.0000" x2="2.5400" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="2.0320" y1="-1.2700" x2="2.0320" y2="1.2700" width="0.1524" layer="94"/>+ <text x="3.1750" y="5.0800" size="1.27" layer="95" align="center">>NAME</text>+ <text x="3.1750" y="3.1750" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="1" x="-3.81" y="0" length="short" direction="pas" visible="pad"/>+ <pin name="G" x="0" y="-5.08" length="short" direction="pas" rot="R90" visible="pad"/>+ <pin name="3" x="3.81" y="0" length="short" direction="pas" rot="R180" visible="pad"/>+ <pin name="G@2" x="0" y="-5.08" length="short" direction="pas" rot="R90" visible="pad"/>+</symbol>+<symbol name="IN-S63BTG">+ <description>Light emitting diode</description>+ <wire x1="-3.0480" y1="-0.7620" x2="-4.5720" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-4.5720" y1="-2.2860" x2="-3.8100" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-3.8100" y1="-2.2860" x2="-4.5720" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-4.5720" y1="-2.2860" x2="-4.5720" y2="-1.5240" width="0.1524" layer="94"/>+ <wire x1="-1.7780" y1="-0.7620" x2="-3.3020" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-3.3020" y1="-2.2860" x2="-2.5400" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="-2.2860" x2="-3.3020" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-3.3020" y1="-2.2860" x2="-3.3020" y2="-1.5240" width="0.1524" layer="94"/>+ <wire x1="-1.2700" y1="0.0000" x2="1.2700" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="-1.2700" y1="-1.2700" x2="-1.2700" y2="1.2700" width="0.1524" layer="94"/>+ <wire x1="1.2700" y1="-1.2700" x2="1.2700" y2="1.2700" width="0.1524" layer="94"/>+ <wire x1="1.2700" y1="1.2700" x2="-1.2700" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="-1.2700" y1="0.0000" x2="1.2700" y2="-1.2700" width="0.1524" layer="94"/>+ <text x="0.0000" y="2.5400" size="1.27" layer="95" align="center">>NAME</text>+ <text x="0.0000" y="-2.5400" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="K" x="-3.81" y="0" length="short" direction="pas" visible="pad"/>+ <pin name="A" x="3.81" y="0" length="short" direction="pas" rot="R180" visible="pad"/>+</symbol>+</symbols>+<devicesets>+<deviceset name="LAN7800" prefix="U">+ <description>Microchip LAN7800 SuperSpeed USB 3.1 Gen1 to 10/100/1000 Ethernet Controller, QFN-48</description>+ <gates>+ <gate name="G$1" symbol="LAN7800" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="QFN-48_7x7mm">+ <connects>+ <connect gate="G$1" pin="TR0P" pad="1"/>+ <connect gate="G$1" pin="TR0N" pad="2"/>+ <connect gate="G$1" pin="VDD25A" pad="3"/>+ <connect gate="G$1" pin="TR1P" pad="4"/>+ <connect gate="G$1" pin="TR1N" pad="5"/>+ <connect gate="G$1" pin="VDD25A@2" pad="6"/>+ <connect gate="G$1" pin="TR2P" pad="7"/>+ <connect gate="G$1" pin="TR2N" pad="8"/>+ <connect gate="G$1" pin="VDD25A@3" pad="9"/>+ <connect gate="G$1" pin="TR3P" pad="10"/>+ <connect gate="G$1" pin="TR3N" pad="11"/>+ <connect gate="G$1" pin="VDD25A@4" pad="12"/>+ <connect gate="G$1" pin="VDD12_SW_OUT" pad="13"/>+ <connect gate="G$1" pin="VDD_SW_IN" pad="14"/>+ <connect gate="G$1" pin="VDD12_SW_FB" pad="15"/>+ <connect gate="G$1" pin="EECS/GPIO0" pad="16"/>+ <connect gate="G$1" pin="EEDI/GPIO1" pad="17"/>+ <connect gate="G$1" pin="EEDO/LED0/GPIO2" pad="18"/>+ <connect gate="G$1" pin="EECLK/LED1/GPIO3" pad="19"/>+ <connect gate="G$1" pin="VDDVARIO" pad="20"/>+ <connect gate="G$1" pin="VDD12CORE" pad="21"/>+ <connect gate="G$1" pin="PME_N/GPIO4" pad="22"/>+ <connect gate="G$1" pin="VBUS_DET" pad="23"/>+ <connect gate="G$1" pin="SUSPEND_N/LED2/GPIO5" pad="24"/>+ <connect gate="G$1" pin="VSS" pad="49"/>+ <connect gate="G$1" pin="REF_FILT" pad="48"/>+ <connect gate="G$1" pin="REF_REXT" pad="47"/>+ <connect gate="G$1" pin="VDD33_REG_IN" pad="46"/>+ <connect gate="G$1" pin="VDD25_REG_OUT" pad="45"/>+ <connect gate="G$1" pin="VDD12A" pad="44"/>+ <connect gate="G$1" pin="PME_MODE/GPIO7" pad="43"/>+ <connect gate="G$1" pin="VDD12CORE@2" pad="42"/>+ <connect gate="G$1" pin="XO" pad="41"/>+ <connect gate="G$1" pin="XI" pad="40"/>+ <connect gate="G$1" pin="VDDVARIO@2" pad="39"/>+ <connect gate="G$1" pin="VDD33A" pad="38"/>+ <connect gate="G$1" pin="USBRBIAS" pad="37"/>+ <connect gate="G$1" pin="VDDVARIO@3" pad="36"/>+ <connect gate="G$1" pin="RESET_N/PME_CLEAR" pad="35"/>+ <connect gate="G$1" pin="TEST" pad="34"/>+ <connect gate="G$1" pin="LED3/GPIO6" pad="33"/>+ <connect gate="G$1" pin="USB3_RXDM" pad="32"/>+ <connect gate="G$1" pin="USB3_RXDP" pad="31"/>+ <connect gate="G$1" pin="VDD12A@2" pad="30"/>+ <connect gate="G$1" pin="USB3_TXDM" pad="29"/>+ <connect gate="G$1" pin="USB3_TXDP" pad="28"/>+ <connect gate="G$1" pin="USB2_DM" pad="27"/>+ <connect gate="G$1" pin="USB2_DP" pad="26"/>+ <connect gate="G$1" pin="VDD12A@3" pad="25"/>+ </connects>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+<deviceset name="CH340G" prefix="U">+ <description>USB serial converter, UART, SOIC-16</description>+ <gates>+ <gate name="G$1" symbol="CH340G" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="SOIC-16_3.9x9.9mm_P1.27mm">+ <connects>+ <connect gate="G$1" pin="GND" pad="1"/>+ <connect gate="G$1" pin="TXD" pad="2"/>+ <connect gate="G$1" pin="RXD" pad="3"/>+ <connect gate="G$1" pin="V3" pad="4"/>+ <connect gate="G$1" pin="UD+" pad="5"/>+ <connect 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pad="5"/>+ <connect gate="G$1" pin="PH1-OSC_OUT" pad="6"/>+ <connect gate="G$1" pin="NRST" pad="7"/>+ <connect gate="G$1" pin="PC0" pad="8"/>+ <connect gate="G$1" pin="PC1" pad="9"/>+ <connect gate="G$1" pin="PC2" pad="10"/>+ <connect gate="G$1" pin="PC3" pad="11"/>+ <connect gate="G$1" pin="VSSA/VREF-" pad="12"/>+ <connect gate="G$1" pin="VDDA/VREF+" pad="13"/>+ <connect gate="G$1" pin="PA0" pad="14"/>+ <connect gate="G$1" pin="PA1" pad="15"/>+ <connect gate="G$1" pin="PA2" pad="16"/>+ <connect gate="G$1" pin="PA3" pad="17"/>+ <connect gate="G$1" pin="VSS" pad="18"/>+ <connect gate="G$1" pin="VDD" pad="19"/>+ <connect gate="G$1" pin="PA4" pad="20"/>+ <connect gate="G$1" pin="PA5" pad="21"/>+ <connect gate="G$1" pin="PA6" pad="22"/>+ <connect gate="G$1" pin="PA7" pad="23"/>+ <connect gate="G$1" pin="PC4" pad="24"/>+ <connect gate="G$1" pin="PC5" pad="25"/>+ <connect gate="G$1" pin="PB0" pad="26"/>+ <connect gate="G$1" pin="PB1" pad="27"/>+ <connect gate="G$1" pin="PB2" pad="28"/>+ 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gate="G$1" pin="PA12" pad="45"/>+ <connect gate="G$1" pin="PA11" pad="44"/>+ <connect gate="G$1" pin="PA10" pad="43"/>+ <connect gate="G$1" pin="PA9" pad="42"/>+ <connect gate="G$1" pin="PA8" pad="41"/>+ <connect gate="G$1" pin="PC9" pad="40"/>+ <connect gate="G$1" pin="PC8" pad="39"/>+ <connect gate="G$1" pin="PC7" pad="38"/>+ <connect gate="G$1" pin="PC6" pad="37"/>+ <connect gate="G$1" pin="PB15" pad="36"/>+ <connect gate="G$1" pin="PB14" pad="35"/>+ <connect gate="G$1" pin="PB13" pad="34"/>+ <connect gate="G$1" pin="PB12" pad="33"/>+ </connects>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+<deviceset name="ABM8-16.000MHZ-B2-T" prefix="Y">+ <description>Four pin crystal, GND on pins 2 and 4</description>+ <gates>+ <gate name="G$1" symbol="ABM8-16.000MHZ-B2-T" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="Crystal_SMD_3225-4Pin_3.2x2.5mm">+ <connects>+ <connect gate="G$1" pin="1" pad="1"/>+ <connect gate="G$1" pin="G" pad="2"/>+ <connect gate="G$1" pin="3" pad="3"/>+ <connect gate="G$1" pin="G@2" pad="4"/>+ </connects>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+<deviceset name="IN-S63BTG" prefix="D">+ <description>Light emitting diode</description>+ <gates>+ <gate name="G$1" symbol="IN-S63BTG" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="IN-S63BTG">+ <connects>+ <connect gate="G$1" pin="K" pad="1"/>+ <connect gate="G$1" pin="A" pad="2"/>+ </connects>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+</devicesets>+</library>+</drawing>+</eagle>
rust/lbr/tests/fixtures/IN-S63BTG.lbradded+113@@ -0,0 +1,113 @@+<?xml version="1.0" encoding="utf-8"?>+<!DOCTYPE eagle SYSTEM "eagle.dtd">+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no"/></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>+<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/>+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>+<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/>+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>+<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes"/>+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/>+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/>+<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/>+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes"/>+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes"/>+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes"/>+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes"/>+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>+<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="yes"/>+<layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="yes"/>+<layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="yes"/>+<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="yes"/>+<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="yes"/>+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/>+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/>+<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes"/>+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>+<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes"/>+<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes"/>+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>+<layer number="93" name="Pins" color="2" fill="1" visible="no" active="yes"/>+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/>+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/>+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/>+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/>+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>+</layers>+<library>+<description>Light emitting diode</description>+<packages>+<package name="IN-S63BTG">+ <description>2 pads, 2.5 x 1.0 mm. Inolux Corporation · Top View SMD LED · 0603 (1.6 &times; 0.8mm) · InGaN</description>+ <smd name="1" x="-0.8000" y="-0.0000" dx="0.9000" dy="1.0000" layer="1" roundness="50"/>+ <smd name="2" x="0.8000" y="-0.0000" dx="0.9000" dy="1.0000" layer="1" roundness="50"/>+ <wire x1="-0.8000" y1="0.4000" x2="0.8000" y2="0.4000" width="0.1000" layer="51"/>+ <wire x1="0.8000" y1="0.4000" x2="0.8000" y2="-0.4000" width="0.1000" layer="51"/>+ <wire x1="0.8000" y1="-0.4000" x2="-0.8000" y2="-0.4000" width="0.1000" layer="51"/>+ <wire x1="-0.8000" y1="-0.4000" x2="-0.8000" y2="0.4000" width="0.1000" layer="51"/>+ <wire x1="-0.9200" y1="0.5200" x2="0.9200" y2="0.5200" width="0.1200" layer="21"/>+ <wire x1="0.9200" y1="0.5200" x2="0.9200" y2="-0.5200" width="0.1200" layer="21"/>+ <wire x1="0.9200" y1="-0.5200" x2="-0.9200" y2="-0.5200" width="0.1200" layer="21"/>+ <wire x1="-0.9200" y1="-0.5200" x2="-0.9200" y2="0.5200" width="0.1200" layer="21"/>+ <wire x1="-1.1000" y1="0.7000" x2="-0.5000" y2="0.7000" width="0.1200" layer="21"/>+ <text x="0" y="1.300" size="1.27" layer="25" align="bottom-center">>NAME</text>+ <text x="0" y="-1.100" size="1.27" layer="27" align="top-center">>VALUE</text>+</package>+</packages>+<symbols>+<symbol name="IN-S63BTG">+ <description>Light emitting diode</description>+ <wire x1="-3.0480" y1="-0.7620" x2="-4.5720" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-4.5720" y1="-2.2860" x2="-3.8100" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-3.8100" y1="-2.2860" x2="-4.5720" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-4.5720" y1="-2.2860" x2="-4.5720" y2="-1.5240" width="0.1524" layer="94"/>+ <wire x1="-1.7780" y1="-0.7620" x2="-3.3020" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-3.3020" y1="-2.2860" x2="-2.5400" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="-2.2860" x2="-3.3020" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-3.3020" y1="-2.2860" x2="-3.3020" y2="-1.5240" width="0.1524" layer="94"/>+ <wire x1="-1.2700" y1="0.0000" x2="1.2700" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="-1.2700" y1="-1.2700" x2="-1.2700" y2="1.2700" width="0.1524" layer="94"/>+ <wire x1="1.2700" y1="-1.2700" x2="1.2700" y2="1.2700" width="0.1524" layer="94"/>+ <wire x1="1.2700" y1="1.2700" x2="-1.2700" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="-1.2700" y1="0.0000" x2="1.2700" y2="-1.2700" width="0.1524" layer="94"/>+ <text x="0.0000" y="2.5400" size="1.27" layer="95" align="center">>NAME</text>+ <text x="0.0000" y="-2.5400" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="K" x="-3.81" y="0" length="short" direction="pas" visible="pad"/>+ <pin name="A" x="3.81" y="0" length="short" direction="pas" rot="R180" visible="pad"/>+</symbol>+</symbols>+<devicesets>+<deviceset name="IN-S63BTG" prefix="D">+ <description>Light emitting diode</description>+ <gates>+ <gate name="G$1" symbol="IN-S63BTG" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="IN-S63BTG">+ <connects>+ <connect gate="G$1" pin="K" pad="1"/>+ <connect gate="G$1" pin="A" pad="2"/>+ </connects>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+</devicesets>+</library>+</drawing>+</eagle>
rust/lbr/tests/fixtures/LAN7800.lbradded+265@@ -0,0 +1,265 @@+<?xml version="1.0" encoding="utf-8"?>+<!DOCTYPE eagle SYSTEM "eagle.dtd">+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no"/></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="22" name="bPlace" color="7" fill="1" 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rust/lbr/tests/fixtures/STM32L431RCT6TR.lbradded+300@@ -0,0 +1,300 @@+<?xml version="1.0" encoding="utf-8"?>+<!DOCTYPE eagle SYSTEM "eagle.dtd">+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no"/></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="22" name="bPlace" color="7" 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width="0.1000" layer="51">+ <vertex x="-4.0000" y="5.0000"/>+ <vertex x="5.0000" y="5.0000"/>+ <vertex x="5.0000" y="-5.0000"/>+ <vertex x="-5.0000" y="-5.0000"/>+ <vertex x="-5.0000" y="4.0000"/>+ </polygon>+ <wire x1="-5.1100" y1="5.1100" x2="-4.1600" y2="5.1100" width="0.1200" layer="21"/>+ <wire x1="-5.1100" y1="4.1600" x2="-5.1100" y2="5.1100" width="0.1200" layer="21"/>+ <wire x1="-5.1100" y1="-5.1100" x2="-5.1100" y2="-4.1600" width="0.1200" layer="21"/>+ <wire x1="-4.1600" y1="-5.1100" x2="-5.1100" y2="-5.1100" width="0.1200" layer="21"/>+ <wire x1="4.1600" y1="5.1100" x2="5.1100" y2="5.1100" width="0.1200" layer="21"/>+ <wire x1="5.1100" y1="5.1100" x2="5.1100" y2="4.1600" width="0.1200" layer="21"/>+ <wire x1="5.1100" y1="-4.1600" x2="5.1100" y2="-5.1100" width="0.1200" layer="21"/>+ <wire x1="5.1100" y1="-5.1100" x2="4.1600" y2="-5.1100" width="0.1200" layer="21"/>+ <text x="0" y="7.050" size="1.27" layer="25" align="bottom-center">>NAME</text>+ <text x="0" y="-7.050" size="1.27" layer="27" align="top-center">>VALUE</text>+</package>+</packages>+<symbols>+<symbol name="STM32L431RCT6TR">+ <wire x1="-12.7" y1="40.64" x2="12.7" y2="40.64" width="0.254" layer="94"/>+ <wire x1="12.7" y1="40.64" x2="12.7" y2="-43.18" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-43.18" x2="-12.7" y2="-43.18" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-43.18" x2="-12.7" y2="40.64" width="0.254" layer="94"/>+ <text x="0.0000" y="43.1800" size="1.27" layer="95" align="center">>NAME</text>+ <text x="0.0000" y="-45.7200" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="VBAT" x="-17.78" y="38.1" length="middle" direction="pwr"/>+ <pin name="PC13" x="-17.78" y="35.56" length="middle" direction="io"/>+ <pin name="PC14-OSC32_IN" x="-17.78" y="33.02" length="middle" direction="io"/>+ <pin name="PC15-OSC32_OUT" x="-17.78" y="30.48" length="middle" direction="io"/>+ <pin name="PH0-OSC_IN" x="-17.78" y="27.94" length="middle" direction="io"/>+ <pin name="PH1-OSC_OUT" x="-17.78" y="25.4" length="middle" direction="io"/>+ <pin name="NRST" x="-17.78" y="22.86" length="middle" direction="io"/>+ <pin name="PC0" x="-17.78" y="20.32" length="middle" direction="io"/>+ <pin name="PC1" x="-17.78" y="17.78" length="middle" direction="io"/>+ <pin name="PC2" x="-17.78" y="15.24" length="middle" direction="io"/>+ <pin name="PC3" x="-17.78" y="12.7" length="middle" direction="io"/>+ <pin name="VSSA/VREF-" x="-17.78" y="10.16" length="middle" direction="pwr"/>+ <pin name="VDDA/VREF+" x="-17.78" y="7.62" length="middle" direction="pwr"/>+ <pin name="PA0" x="-17.78" y="5.08" length="middle" direction="io"/>+ <pin name="PA1" x="-17.78" y="2.54" length="middle" direction="io"/>+ <pin name="PA2" x="-17.78" y="0" length="middle" direction="io"/>+ <pin name="PA3" x="-17.78" y="-2.54" length="middle" direction="io"/>+ <pin name="VSS" x="-17.78" y="-5.08" length="middle" direction="pwr"/>+ <pin name="VDD" x="-17.78" y="-7.62" length="middle" direction="pwr"/>+ <pin name="PA4" x="-17.78" y="-10.16" length="middle" direction="io"/>+ <pin name="PA5" x="-17.78" y="-12.7" length="middle" direction="io"/>+ <pin name="PA6" x="-17.78" y="-15.24" length="middle" direction="io"/>+ <pin name="PA7" x="-17.78" y="-17.78" length="middle" direction="io"/>+ <pin name="PC4" x="-17.78" y="-20.32" length="middle" direction="io"/>+ <pin name="PC5" x="-17.78" y="-22.86" length="middle" direction="io"/>+ <pin name="PB0" x="-17.78" y="-25.4" length="middle" direction="io"/>+ <pin name="PB1" x="-17.78" y="-27.94" length="middle" direction="io"/>+ <pin name="PB2" x="-17.78" y="-30.48" length="middle" direction="io"/>+ <pin name="PB10" x="-17.78" y="-33.02" length="middle" direction="io"/>+ <pin name="PB11" x="-17.78" y="-35.56" length="middle" direction="io"/>+ <pin name="VSS@2" x="-17.78" y="-38.1" length="middle" direction="pwr"/>+ <pin name="VDD@2" x="-17.78" y="-40.64" length="middle" direction="pwr"/>+ <pin name="VDD@3" x="17.78" y="38.1" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@3" x="17.78" y="35.56" length="middle" direction="pwr" rot="R180"/>+ <pin name="PB9" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PB8" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PH3-BOOT0" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PB7" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PB6" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PB5" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@4" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@4" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13" x="17.78" y="-7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+</symbol>+</symbols>+<devicesets>+<deviceset name="STM32L431RCT6TR" prefix="U">+ <description></description>+ <gates>+ <gate name="G$1" symbol="STM32L431RCT6TR" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="LQFP-64_10x10mm_P0.5mm">+ <connects>+ <connect gate="G$1" pin="VBAT" pad="1"/>+ <connect gate="G$1" pin="PC13" pad="2"/>+ <connect gate="G$1" pin="PC14-OSC32_IN" pad="3"/>+ <connect gate="G$1" pin="PC15-OSC32_OUT" pad="4"/>+ <connect gate="G$1" pin="PH0-OSC_IN" pad="5"/>+ <connect gate="G$1" pin="PH1-OSC_OUT" pad="6"/>+ <connect gate="G$1" pin="NRST" pad="7"/>+ <connect gate="G$1" pin="PC0" pad="8"/>+ <connect gate="G$1" pin="PC1" pad="9"/>+ <connect gate="G$1" pin="PC2" pad="10"/>+ <connect gate="G$1" pin="PC3" pad="11"/>+ <connect gate="G$1" pin="VSSA/VREF-" pad="12"/>+ <connect gate="G$1" pin="VDDA/VREF+" pad="13"/>+ <connect gate="G$1" pin="PA0" pad="14"/>+ <connect gate="G$1" pin="PA1" pad="15"/>+ <connect gate="G$1" pin="PA2" pad="16"/>+ <connect gate="G$1" pin="PA3" pad="17"/>+ <connect gate="G$1" pin="VSS" pad="18"/>+ <connect gate="G$1" pin="VDD" pad="19"/>+ <connect gate="G$1" pin="PA4" pad="20"/>+ <connect gate="G$1" pin="PA5" pad="21"/>+ <connect gate="G$1" pin="PA6" pad="22"/>+ <connect gate="G$1" pin="PA7" pad="23"/>+ <connect gate="G$1" pin="PC4" pad="24"/>+ <connect gate="G$1" pin="PC5" pad="25"/>+ <connect gate="G$1" pin="PB0" pad="26"/>+ <connect gate="G$1" pin="PB1" pad="27"/>+ <connect gate="G$1" pin="PB2" pad="28"/>+ <connect gate="G$1" pin="PB10" pad="29"/>+ <connect gate="G$1" pin="PB11" pad="30"/>+ <connect gate="G$1" pin="VSS@2" pad="31"/>+ <connect gate="G$1" pin="VDD@2" pad="32"/>+ <connect gate="G$1" pin="VDD@3" pad="64"/>+ <connect gate="G$1" pin="VSS@3" pad="63"/>+ <connect gate="G$1" pin="PB9" pad="62"/>+ <connect gate="G$1" pin="PB8" pad="61"/>+ <connect gate="G$1" pin="PH3-BOOT0" pad="60"/>+ <connect gate="G$1" pin="PB7" pad="59"/>+ <connect gate="G$1" pin="PB6" pad="58"/>+ <connect gate="G$1" pin="PB5" pad="57"/>+ <connect gate="G$1" pin="PB4" pad="56"/>+ <connect gate="G$1" pin="PB3" pad="55"/>+ <connect gate="G$1" pin="PD2" pad="54"/>+ <connect gate="G$1" pin="PC12" pad="53"/>+ <connect gate="G$1" pin="PC11" pad="52"/>+ <connect gate="G$1" pin="PC10" pad="51"/>+ <connect gate="G$1" pin="PA15" pad="50"/>+ <connect gate="G$1" pin="PA14" pad="49"/>+ <connect gate="G$1" pin="VDD@4" pad="48"/>+ <connect gate="G$1" pin="VSS@4" pad="47"/>+ <connect gate="G$1" pin="PA13" pad="46"/>+ <connect gate="G$1" pin="PA12" pad="45"/>+ <connect gate="G$1" pin="PA11" pad="44"/>+ <connect gate="G$1" pin="PA10" pad="43"/>+ <connect gate="G$1" pin="PA9" pad="42"/>+ <connect gate="G$1" pin="PA8" pad="41"/>+ <connect gate="G$1" pin="PC9" pad="40"/>+ <connect gate="G$1" pin="PC8" pad="39"/>+ <connect gate="G$1" pin="PC7" pad="38"/>+ <connect gate="G$1" pin="PC6" pad="37"/>+ <connect gate="G$1" pin="PB15" pad="36"/>+ <connect gate="G$1" pin="PB14" pad="35"/>+ <connect gate="G$1" pin="PB13" pad="34"/>+ <connect gate="G$1" pin="PB12" pad="33"/>+ </connects>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+</devicesets>+</library>+</drawing>+</eagle>
rust/lbr/tests/fixtures/zipslip.zipadded⋯ 1 unchanged line ⋯
rust/lbr/tests/golden.rsadded+121@@ -0,0 +1,121 @@+//! Every fixture's artifact names must equal what the Python bridge's+//! `_library_artifact_names` produced for the same file (tests/golden/<name>.json).+use std::fs;++#[test]+fn artifact_names_match_the_python_bridge() {+ let dir = concat!(env!("CARGO_MANIFEST_DIR"), "/tests/fixtures");+ let mut checked = 0;+ for e in fs::read_dir(dir).unwrap().flatten() {+ let p = e.path();+ if p.extension().and_then(|x| x.to_str()) != Some("lbr") { continue; }+ let xml = fs::read_to_string(&p).unwrap();+ let got = fusion_lbr::artifact_names(&xml).unwrap();+ let golden_path = format!("{}/tests/golden/{}.json", env!("CARGO_MANIFEST_DIR"), p.file_stem().unwrap().to_str().unwrap());+ let want: fusion_lbr::ArtifactNames = serde_json::from_str(&fs::read_to_string(&golden_path).unwrap()).unwrap();+ assert_eq!(got, want, "artifact names differ from the Python golden for {}", p.display());+ checked += 1;+ }+ assert!(checked >= 6, "expected the Demo Board merged library plus five parts, checked {checked}");+}++#[test]+fn a_non_library_is_refused_not_guessed() {+ assert!(fusion_lbr::artifact_names("<html></html>").is_err());+ assert!(fusion_lbr::artifact_names("not xml").is_err());+}++#[test]+fn binding_injection_matches_python_and_accumulates() {+ let root = env!("CARGO_MANIFEST_DIR");+ let src = fs::read_to_string(format!("{root}/tests/fixtures/Demo_Board.lbr")).unwrap();+ let plan: serde_json::Value = serde_json::from_str(&fs::read_to_string(format!("{root}/tests/golden/inject_bindings.json")).unwrap()).unwrap();+ let parse = |k: &str| -> Vec<fusion_lbr::Binding> { serde_json::from_value(plan[k].clone()).unwrap() };+ let first = fusion_lbr::inject_package3d_bindings(&src, &parse("first"));+ assert_eq!(first, fs::read_to_string(format!("{root}/tests/golden/Demo_Board.bound3.lbr")).unwrap(), "first injection differs from the Python golden");+ let second = fusion_lbr::inject_package3d_bindings(&first, &parse("second"));+ assert_eq!(second, fs::read_to_string(format!("{root}/tests/golden/Demo_Board.bound5.lbr")).unwrap(), "subset re-injection must accumulate exactly as Python does");+ // Python is not byte-idempotent (each re-run leaves one more blank line before <symbols>);+ // the port reproduces that exactly rather than "fixing" the oracle.+ let again = fusion_lbr::inject_package3d_bindings(&second, &parse("second"));+ assert_eq!(again, fs::read_to_string(format!("{root}/tests/golden/Demo_Board.bound5again.lbr")).unwrap(), "re-injection differs from the Python golden");+ assert_eq!(again.replace('\n', ""), second.replace('\n', ""), "re-injection must be idempotent up to whitespace");+ assert_eq!(fusion_lbr::artifact_names(&second).unwrap().p3d.len(), 5);+}++#[test]+fn metadata_matches_the_python_bridge() {+ let root = env!("CARGO_MANIFEST_DIR");+ let xml = fs::read_to_string(format!("{root}/tests/fixtures/Demo_Board.lbr")).unwrap();+ let got = fusion_lbr::library_part_metadata(&xml).unwrap();+ let want: fusion_lbr::LibraryMetadata = serde_json::from_str(&fs::read_to_string(format!("{root}/tests/golden/Demo_Board.metadata.json")).unwrap()).unwrap();+ assert_eq!(got, want);+}++#[test]+fn pairing_matches_the_python_bridge() {+ let root = env!("CARGO_MANIFEST_DIR");+ let cases: serde_json::Value = serde_json::from_str(&fs::read_to_string(format!("{root}/tests/golden/pair_parts.json")).unwrap()).unwrap();+ for name in ["demo_board", "variants", "only_one_of_each"] {+ let c = &cases[name];+ let md: fusion_lbr::LibraryMetadata = serde_json::from_value(c["metadata"].clone()).unwrap();+ let models: Vec<String> = serde_json::from_value(c["models"].clone()).unwrap();+ let got = fusion_lbr::pair_parts(c["lbrPath"].as_str().unwrap(), &models, &md);+ let want: fusion_lbr::Pairing = serde_json::from_value(c["expected"].clone()).unwrap();+ assert_eq!(got, want, "pairing differs from the Python golden in case {name}");+ }+ for n in cases["names"]["ok"].as_array().unwrap() { assert!(fusion_lbr::library_name_ok(n.as_str().unwrap()), "{n} should be ok"); }+ for n in cases["names"]["bad"].as_array().unwrap() { assert!(!fusion_lbr::library_name_ok(n.as_str().unwrap()), "{n} should be refused"); }+ for (k, v) in cases["names"]["norm"].as_object().unwrap() { assert_eq!(fusion_lbr::norm(k), v.as_str().unwrap()); }+}++#[test]+fn split_per_part_matches_python_byte_for_byte() {+ let root = env!("CARGO_MANIFEST_DIR");+ let xml = fs::read_to_string(format!("{root}/tests/fixtures/Demo_Board.lbr")).unwrap();+ let out = std::env::temp_dir().join(format!("fusion-lbr-split-{}", std::process::id()));+ let _ = fs::remove_dir_all(&out);+ let got = fusion_lbr::split_per_part(&xml, &out).unwrap();+ let index: serde_json::Value = serde_json::from_str(&fs::read_to_string(format!("{root}/tests/golden/split/index.json")).unwrap()).unwrap();+ assert_eq!(got.len(), index.as_object().unwrap().len(), "entry count");+ for (key, want) in index.as_object().unwrap() {+ let e = got.get(key).unwrap_or_else(|| panic!("missing entry {key}"));+ let file = want["file"].as_str().unwrap();+ assert!(e.lbr_path.ends_with(file), "{key}: path {} should end with {file}", e.lbr_path);+ assert_eq!(e.package, want["package"].as_str().unwrap(), "{key}: package");+ assert_eq!(serde_json::to_value(&e.symbols).unwrap(), want["symbols"], "{key}: symbols");+ assert_eq!(serde_json::to_value(&e.packages).unwrap(), want["packages"], "{key}: packages");+ let mine = fs::read_to_string(&e.lbr_path).unwrap();+ let golden = fs::read_to_string(format!("{root}/tests/golden/split/{file}")).unwrap();+ if mine != golden {+ let (a, b): (Vec<&str>, Vec<&str>) = (mine.lines().collect(), golden.lines().collect());+ let first = a.iter().zip(b.iter()).position(|(x, y)| x != y).unwrap_or(a.len().min(b.len()));+ panic!("{file} differs from the Python golden at line {}:\n rust: {:?}\n python: {:?}", first + 1, a.get(first), b.get(first));+ }+ }+ let _ = fs::remove_dir_all(&out);+}++#[test]+fn bundle_staging_matches_python() {+ let root = env!("CARGO_MANIFEST_DIR");+ let want: serde_json::Value = serde_json::from_str(&fs::read_to_string(format!("{root}/tests/golden/bundle_files.json")).unwrap()).unwrap();+ let tmp = std::env::temp_dir().join(format!("fusion-lbr-bundle-{}", std::process::id()));+ let _ = fs::remove_dir_all(&tmp);+ let n = fusion_lbr::safe_extract(std::path::Path::new(&format!("{root}/tests/fixtures/Demo_Board.bundle.zip")), &tmp).unwrap();+ assert_eq!(n as u64, want["extracted"].as_u64().unwrap());+ let found = fusion_lbr::find_bundle_files(&tmp);+ let rel = |p: &str| p.trim_start_matches(&tmp.to_string_lossy().to_string()).trim_start_matches(std::path::MAIN_SEPARATOR).replace('\\', "/");+ assert_eq!(rel(found.lbr.as_deref().unwrap()), want["lbr"].as_str().unwrap());+ let models: Vec<String> = found.models.iter().map(|m| rel(m)).collect();+ assert_eq!(serde_json::to_value(&models).unwrap(), want["models"]);+ let dest = tmp.join("placed");+ let (new_lbr, map) = fusion_lbr::place_library(std::path::Path::new(found.lbr.as_deref().unwrap()), &found.models, &dest).unwrap();+ assert!(new_lbr.ends_with("/placed/Demo_Board.lbr"), "{new_lbr}");+ assert_eq!(map.len(), found.models.len());+ assert!(map.values().all(|v| std::path::Path::new(v).is_file()));+ let slip = fusion_lbr::safe_extract(std::path::Path::new(&format!("{root}/tests/fixtures/zipslip.zip")), &tmp.join("slip"));+ assert!(matches!(slip, Err(fusion_lbr::BundleError::UnsafeEntry(_))), "zip-slip must be refused: {slip:?}");+ assert!(!tmp.join("evil.lbr").exists());+ let _ = fs::remove_dir_all(&tmp);+}
rust/lbr/tests/golden/ABM8-16.000MHZ-B2-T.jsonadded+22@@ -0,0 +1,22 @@+{+ "dev": [+ "ABM8-16.000MHZ-B2-T"+ ],+ "dev_pac": {+ "ABM8-16.000MHZ-B2-T": [+ "Crystal_SMD_3225-4Pin_3.2x2.5mm"+ ]+ },+ "dev_sym": {+ "ABM8-16.000MHZ-B2-T": [+ "ABM8-16.000MHZ-B2-T"+ ]+ },+ "p3d": [],+ "pac": [+ "Crystal_SMD_3225-4Pin_3.2x2.5mm"+ ],+ "sym": [+ "ABM8-16.000MHZ-B2-T"+ ]+}
rust/lbr/tests/golden/CH340G.jsonadded+22@@ -0,0 +1,22 @@+{+ "dev": [+ "CH340G"+ ],+ "dev_pac": {+ "CH340G": [+ "SOIC-16_3.9x9.9mm_P1.27mm"+ ]+ },+ "dev_sym": {+ "CH340G": [+ "CH340G"+ ]+ },+ "p3d": [],+ "pac": [+ "SOIC-16_3.9x9.9mm_P1.27mm"+ ],+ "sym": [+ "CH340G"+ ]+}
rust/lbr/tests/golden/Demo_Board.bound3.lbradded+715@@ -0,0 +1,715 @@+<?xml version="1.0" encoding="utf-8"?>+<!DOCTYPE eagle SYSTEM "eagle.dtd">+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no"/></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>+<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/>+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>+<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/>+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>+<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes"/>+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/>+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/>+<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/>+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes"/>+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes"/>+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes"/>+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes"/>+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>+<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="yes"/>+<layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="yes"/>+<layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="yes"/>+<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="yes"/>+<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="yes"/>+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/>+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/>+<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes"/>+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>+<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes"/>+<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes"/>+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>+<layer number="93" name="Pins" color="2" fill="1" visible="no" active="yes"/>+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/>+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/>+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/>+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/>+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>+</layers>+<library>+<description>Demo_Board (wiki.adom.inc Cloud Library)</description>+<packages>+<package name="QFN-48_7x7mm">+ <description>QFN-48, 7 x 7 mm</description>+ <smd name="1" x="-3.5000" y="2.7500" dx="1.0000" dy="0.2800" layer="1" roundness="100"/>+ <smd name="2" x="-3.5000" y="2.2500" dx="1.0000" dy="0.2800" layer="1" roundness="100"/>+ <smd name="3" x="-3.5000" y="1.7500" dx="1.0000" dy="0.2800" layer="1" roundness="100"/>+ <smd name="4" x="-3.5000" y="1.2500" dx="1.0000" dy="0.2800" layer="1" roundness="100"/>+ <smd name="5" x="-3.5000" y="0.7500" dx="1.0000" dy="0.2800" layer="1" roundness="100"/>+ <smd name="6" x="-3.5000" y="0.2500" dx="1.0000" dy="0.2800" layer="1" roundness="100"/>+ <smd name="7" x="-3.5000" y="-0.2500" dx="1.0000" dy="0.2800" layer="1" roundness="100"/>+ <smd name="8" x="-3.5000" y="-0.7500" dx="1.0000" dy="0.2800" layer="1" roundness="100"/>+ <smd name="9" x="-3.5000" y="-1.2500" dx="1.0000" dy="0.2800" layer="1" roundness="100"/>+ <smd name="10" x="-3.5000" y="-1.7500" dx="1.0000" dy="0.2800" layer="1" roundness="100"/>+ <smd name="11" x="-3.5000" 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x="-0.7500" y="3.5000" dx="0.2800" dy="1.0000" layer="1" roundness="100"/>+ <smd name="45" x="-1.2500" y="3.5000" dx="0.2800" dy="1.0000" layer="1" roundness="100"/>+ <smd name="46" x="-1.7500" y="3.5000" dx="0.2800" dy="1.0000" layer="1" roundness="100"/>+ <smd name="47" x="-2.2500" y="3.5000" dx="0.2800" dy="1.0000" layer="1" roundness="100"/>+ <smd name="48" x="-2.7500" y="3.5000" dx="0.2800" dy="1.0000" layer="1" roundness="100"/>+ <smd name="49" x="0.0000" y="-0.0000" dx="5.3000" dy="5.3000" layer="1"/>+ <circle x="-3.5000" y="3.5000" radius="0.0300" width="0.0600" layer="21"/>+ <polygon width="0.1000" layer="51">+ <vertex x="-2.5000" y="3.5000"/>+ <vertex x="3.5000" y="3.5000"/>+ <vertex x="3.5000" y="-3.5000"/>+ <vertex x="-3.5000" y="-3.5000"/>+ <vertex x="-3.5000" y="2.5000"/>+ </polygon>+ <wire x1="3.7200" y1="3.7200" x2="3.7200" y2="3.2800" width="0.2000" layer="21"/>+ <wire x1="3.2800" y1="3.7200" x2="3.7200" y2="3.7200" width="0.2000" layer="21"/>+ <wire x1="-3.7200" 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name="TEST" x="36.83" y="-7.62" length="short" direction="io" rot="R180"/>+ <pin name="LED3/GPIO6" x="36.83" y="-10.16" length="short" direction="io" rot="R180"/>+ <pin name="USB3_RXDM" x="36.83" y="-12.7" length="short" direction="io" rot="R180"/>+ <pin name="USB3_RXDP" x="36.83" y="-15.24" length="short" direction="io" rot="R180"/>+ <pin name="VDD12A@2" x="36.83" y="-17.78" length="short" direction="io" rot="R180"/>+ <pin name="USB3_TXDM" x="36.83" y="-20.32" length="short" direction="io" rot="R180"/>+ <pin name="USB3_TXDP" x="36.83" y="-22.86" length="short" direction="io" rot="R180"/>+ <pin name="USB2_DM" x="36.83" y="-25.4" length="short" direction="io" rot="R180"/>+ <pin name="USB2_DP" x="36.83" y="-27.94" length="short" direction="io" rot="R180"/>+ <pin name="VDD12A@3" x="36.83" y="-30.48" length="short" direction="io" rot="R180"/>+</symbol>+<symbol name="CH340G">+ <description>USB serial converter, UART, SOIC-16</description>+ <wire x1="-12.7" y1="15.239999999999998" x2="12.7" y2="15.239999999999998" width="0.254" layer="94"/>+ <wire x1="12.7" y1="15.239999999999998" x2="12.7" y2="-15.239999999999998" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-15.239999999999998" x2="-12.7" y2="-15.239999999999998" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-15.239999999999998" x2="-12.7" y2="15.239999999999998" width="0.254" layer="94"/>+ <text x="-5.0800" y="13.9700" size="1.27" layer="95" align="center">>NAME</text>+ <text x="1.2700" y="13.9700" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="GND" x="-17.78" y="-7.620000000000001" length="middle" direction="pwr"/>+ <pin name="TXD" x="17.78" y="12.7" length="middle" direction="out" rot="R180"/>+ <pin name="RXD" x="-17.78" y="10.16" length="middle" direction="in"/>+ <pin name="V3" x="-17.78" y="-10.16" length="middle" direction="out"/>+ <pin name="UD+" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="UD-" x="17.78" y="-2.540000000000001" length="middle" direction="io" rot="R180"/>+ <pin name="XI" x="-17.78" y="7.619999999999999" length="middle" direction="in"/>+ <pin name="XO" x="17.78" y="10.16" length="middle" direction="out" rot="R180"/>+ <pin name="CTS" x="-17.78" y="5.079999999999999" length="middle" direction="in"/>+ <pin name="DSR" x="-17.78" y="0" length="middle" direction="in"/>+ <pin name="RI" x="-17.78" y="-2.540000000000001" length="middle" direction="in"/>+ <pin name="DCD" x="-17.78" y="2.539999999999999" length="middle" direction="in"/>+ <pin name="DTR" x="17.78" y="7.619999999999999" length="middle" direction="out" rot="R180"/>+ <pin name="RTS" x="17.78" y="5.079999999999999" length="middle" direction="out" rot="R180"/>+ <pin name="R232" x="-17.78" y="12.7" length="middle" direction="in"/>+ <pin name="VCC" x="-17.78" y="-12.7" length="middle" direction="pwr"/>+</symbol>+<symbol name="STM32L431RCT6TR">+ <wire x1="-12.7" y1="40.64" x2="12.7" y2="40.64" width="0.254" layer="94"/>+ <wire x1="12.7" y1="40.64" x2="12.7" y2="-43.18" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-43.18" x2="-12.7" y2="-43.18" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-43.18" x2="-12.7" y2="40.64" width="0.254" layer="94"/>+ <text x="0.0000" y="43.1800" size="1.27" layer="95" align="center">>NAME</text>+ <text x="0.0000" y="-45.7200" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="VBAT" x="-17.78" y="38.1" length="middle" direction="pwr"/>+ <pin name="PC13" x="-17.78" y="35.56" length="middle" direction="io"/>+ <pin name="PC14-OSC32_IN" x="-17.78" y="33.02" length="middle" direction="io"/>+ <pin name="PC15-OSC32_OUT" x="-17.78" y="30.48" length="middle" direction="io"/>+ <pin name="PH0-OSC_IN" x="-17.78" y="27.94" length="middle" direction="io"/>+ <pin name="PH1-OSC_OUT" x="-17.78" y="25.4" length="middle" direction="io"/>+ <pin name="NRST" x="-17.78" y="22.86" length="middle" direction="io"/>+ <pin name="PC0" x="-17.78" y="20.32" length="middle" direction="io"/>+ <pin name="PC1" x="-17.78" y="17.78" length="middle" direction="io"/>+ <pin name="PC2" x="-17.78" y="15.24" length="middle" direction="io"/>+ <pin name="PC3" x="-17.78" y="12.7" length="middle" direction="io"/>+ <pin name="VSSA/VREF-" x="-17.78" y="10.16" length="middle" direction="pwr"/>+ <pin name="VDDA/VREF+" x="-17.78" y="7.62" length="middle" direction="pwr"/>+ <pin name="PA0" x="-17.78" y="5.08" length="middle" direction="io"/>+ <pin name="PA1" x="-17.78" y="2.54" length="middle" direction="io"/>+ <pin name="PA2" x="-17.78" y="0" length="middle" direction="io"/>+ <pin name="PA3" x="-17.78" y="-2.54" length="middle" direction="io"/>+ <pin name="VSS" x="-17.78" y="-5.08" length="middle" direction="pwr"/>+ <pin name="VDD" x="-17.78" y="-7.62" length="middle" direction="pwr"/>+ <pin name="PA4" x="-17.78" y="-10.16" length="middle" direction="io"/>+ <pin name="PA5" x="-17.78" y="-12.7" length="middle" direction="io"/>+ <pin name="PA6" x="-17.78" y="-15.24" length="middle" direction="io"/>+ <pin name="PA7" x="-17.78" y="-17.78" length="middle" direction="io"/>+ <pin name="PC4" x="-17.78" y="-20.32" length="middle" direction="io"/>+ <pin name="PC5" x="-17.78" y="-22.86" length="middle" direction="io"/>+ <pin name="PB0" x="-17.78" y="-25.4" length="middle" direction="io"/>+ <pin name="PB1" x="-17.78" y="-27.94" length="middle" direction="io"/>+ <pin name="PB2" x="-17.78" y="-30.48" length="middle" direction="io"/>+ <pin name="PB10" x="-17.78" y="-33.02" length="middle" direction="io"/>+ <pin name="PB11" x="-17.78" y="-35.56" length="middle" direction="io"/>+ <pin name="VSS@2" x="-17.78" y="-38.1" length="middle" direction="pwr"/>+ <pin name="VDD@2" x="-17.78" y="-40.64" length="middle" direction="pwr"/>+ <pin name="VDD@3" x="17.78" y="38.1" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@3" x="17.78" y="35.56" length="middle" direction="pwr" rot="R180"/>+ <pin name="PB9" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PB8" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PH3-BOOT0" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PB7" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PB6" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PB5" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@4" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@4" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13" x="17.78" y="-7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+</symbol>+<symbol name="ABM8-16.000MHZ-B2-T">+ <description>Four pin crystal, GND on pins 2 and 4</description>+ <wire x1="-1.143" y1="2.54" x2="1.143" y2="2.54" width="0.254" layer="94"/>+ <wire x1="1.143" y1="2.54" x2="1.143" y2="-2.54" width="0.254" layer="94"/>+ <wire x1="1.143" y1="-2.54" x2="-1.143" y2="-2.54" width="0.254" layer="94"/>+ <wire x1="-1.143" y1="-2.54" x2="-1.143" y2="2.54" width="0.254" layer="94"/>+ <wire x1="-2.5400" y1="2.2860" x2="-2.5400" y2="3.5560" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="3.5560" x2="2.5400" y2="3.5560" width="0.1524" layer="94"/>+ <wire x1="2.5400" y1="3.5560" x2="2.5400" y2="2.2860" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="0.0000" x2="-2.0320" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="-2.2860" x2="-2.5400" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="-3.5560" x2="2.5400" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="2.5400" y1="-3.5560" x2="2.5400" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-2.0320" y1="-1.2700" x2="-2.0320" y2="1.2700" width="0.1524" layer="94"/>+ <wire x1="0.0000" y1="-3.8100" x2="0.0000" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="2.0320" y1="0.0000" x2="2.5400" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="2.0320" y1="-1.2700" x2="2.0320" y2="1.2700" width="0.1524" layer="94"/>+ <text x="3.1750" y="5.0800" size="1.27" layer="95" align="center">>NAME</text>+ <text x="3.1750" y="3.1750" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="1" x="-3.81" y="0" length="short" direction="pas" visible="pad"/>+ <pin name="G" x="0" y="-5.08" length="short" direction="pas" rot="R90" visible="pad"/>+ <pin name="3" x="3.81" y="0" length="short" direction="pas" rot="R180" visible="pad"/>+ <pin name="G@2" x="0" y="-5.08" length="short" direction="pas" rot="R90" visible="pad"/>+</symbol>+<symbol name="IN-S63BTG">+ <description>Light emitting diode</description>+ <wire x1="-3.0480" y1="-0.7620" x2="-4.5720" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-4.5720" y1="-2.2860" x2="-3.8100" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-3.8100" y1="-2.2860" x2="-4.5720" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-4.5720" y1="-2.2860" x2="-4.5720" y2="-1.5240" width="0.1524" layer="94"/>+ <wire x1="-1.7780" y1="-0.7620" x2="-3.3020" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-3.3020" y1="-2.2860" x2="-2.5400" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="-2.2860" x2="-3.3020" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-3.3020" y1="-2.2860" x2="-3.3020" y2="-1.5240" width="0.1524" layer="94"/>+ <wire x1="-1.2700" y1="0.0000" x2="1.2700" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="-1.2700" y1="-1.2700" x2="-1.2700" y2="1.2700" width="0.1524" layer="94"/>+ <wire x1="1.2700" y1="-1.2700" x2="1.2700" y2="1.2700" width="0.1524" layer="94"/>+ <wire x1="1.2700" y1="1.2700" x2="-1.2700" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="-1.2700" y1="0.0000" x2="1.2700" y2="-1.2700" width="0.1524" layer="94"/>+ <text x="0.0000" y="2.5400" size="1.27" layer="95" align="center">>NAME</text>+ <text x="0.0000" y="-2.5400" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="K" x="-3.81" y="0" length="short" direction="pas" visible="pad"/>+ <pin name="A" x="3.81" y="0" length="short" direction="pas" rot="R180" visible="pad"/>+</symbol>+</symbols>+<devicesets>+<deviceset name="LAN7800" prefix="U">+ <description>Microchip LAN7800 SuperSpeed USB 3.1 Gen1 to 10/100/1000 Ethernet Controller, QFN-48</description>+ <gates>+ <gate name="G$1" symbol="LAN7800" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="QFN-48_7x7mm">+ <connects>+ <connect gate="G$1" pin="TR0P" pad="1"/>+ <connect gate="G$1" pin="TR0N" pad="2"/>+ <connect gate="G$1" pin="VDD25A" pad="3"/>+ <connect gate="G$1" pin="TR1P" pad="4"/>+ <connect gate="G$1" pin="TR1N" pad="5"/>+ <connect gate="G$1" pin="VDD25A@2" pad="6"/>+ <connect gate="G$1" pin="TR2P" pad="7"/>+ <connect gate="G$1" pin="TR2N" pad="8"/>+ <connect gate="G$1" pin="VDD25A@3" pad="9"/>+ <connect gate="G$1" pin="TR3P" pad="10"/>+ <connect gate="G$1" pin="TR3N" pad="11"/>+ <connect gate="G$1" pin="VDD25A@4" pad="12"/>+ <connect gate="G$1" pin="VDD12_SW_OUT" pad="13"/>+ <connect gate="G$1" pin="VDD_SW_IN" pad="14"/>+ <connect gate="G$1" pin="VDD12_SW_FB" pad="15"/>+ <connect gate="G$1" pin="EECS/GPIO0" pad="16"/>+ <connect gate="G$1" pin="EEDI/GPIO1" pad="17"/>+ <connect gate="G$1" pin="EEDO/LED0/GPIO2" pad="18"/>+ <connect gate="G$1" pin="EECLK/LED1/GPIO3" pad="19"/>+ <connect gate="G$1" pin="VDDVARIO" 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y="-20.32" length="short" direction="io" rot="R180"/>+ <pin name="USB3_TXDP" x="36.83" y="-22.86" length="short" direction="io" rot="R180"/>+ <pin name="USB2_DM" x="36.83" y="-25.4" length="short" direction="io" rot="R180"/>+ <pin name="USB2_DP" x="36.83" y="-27.94" length="short" direction="io" rot="R180"/>+ <pin name="VDD12A@3" x="36.83" y="-30.48" length="short" direction="io" rot="R180"/>+</symbol>+<symbol name="CH340G">+ <description>USB serial converter, UART, SOIC-16</description>+ <wire x1="-12.7" y1="15.239999999999998" x2="12.7" y2="15.239999999999998" width="0.254" layer="94"/>+ <wire x1="12.7" y1="15.239999999999998" x2="12.7" y2="-15.239999999999998" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-15.239999999999998" x2="-12.7" y2="-15.239999999999998" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-15.239999999999998" x2="-12.7" y2="15.239999999999998" width="0.254" layer="94"/>+ <text x="-5.0800" y="13.9700" size="1.27" layer="95" align="center">>NAME</text>+ <text x="1.2700" y="13.9700" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="GND" x="-17.78" y="-7.620000000000001" length="middle" direction="pwr"/>+ <pin name="TXD" x="17.78" y="12.7" length="middle" direction="out" rot="R180"/>+ <pin name="RXD" x="-17.78" y="10.16" length="middle" direction="in"/>+ <pin name="V3" x="-17.78" y="-10.16" length="middle" direction="out"/>+ <pin name="UD+" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="UD-" x="17.78" y="-2.540000000000001" length="middle" direction="io" rot="R180"/>+ <pin name="XI" x="-17.78" y="7.619999999999999" length="middle" direction="in"/>+ <pin name="XO" x="17.78" y="10.16" length="middle" direction="out" rot="R180"/>+ <pin name="CTS" x="-17.78" y="5.079999999999999" length="middle" direction="in"/>+ <pin name="DSR" x="-17.78" y="0" length="middle" direction="in"/>+ <pin name="RI" x="-17.78" y="-2.540000000000001" length="middle" direction="in"/>+ <pin name="DCD" x="-17.78" y="2.539999999999999" length="middle" direction="in"/>+ <pin name="DTR" x="17.78" y="7.619999999999999" length="middle" direction="out" rot="R180"/>+ <pin name="RTS" x="17.78" y="5.079999999999999" length="middle" direction="out" rot="R180"/>+ <pin name="R232" x="-17.78" y="12.7" length="middle" direction="in"/>+ <pin name="VCC" x="-17.78" y="-12.7" length="middle" direction="pwr"/>+</symbol>+<symbol name="STM32L431RCT6TR">+ <wire x1="-12.7" y1="40.64" x2="12.7" y2="40.64" width="0.254" layer="94"/>+ <wire x1="12.7" y1="40.64" x2="12.7" y2="-43.18" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-43.18" x2="-12.7" y2="-43.18" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-43.18" x2="-12.7" y2="40.64" width="0.254" layer="94"/>+ <text x="0.0000" y="43.1800" size="1.27" layer="95" align="center">>NAME</text>+ <text x="0.0000" y="-45.7200" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="VBAT" x="-17.78" y="38.1" length="middle" direction="pwr"/>+ <pin name="PC13" x="-17.78" y="35.56" length="middle" direction="io"/>+ <pin name="PC14-OSC32_IN" x="-17.78" y="33.02" length="middle" direction="io"/>+ <pin name="PC15-OSC32_OUT" x="-17.78" y="30.48" length="middle" direction="io"/>+ <pin name="PH0-OSC_IN" x="-17.78" y="27.94" length="middle" direction="io"/>+ <pin name="PH1-OSC_OUT" x="-17.78" y="25.4" length="middle" direction="io"/>+ <pin name="NRST" x="-17.78" y="22.86" length="middle" direction="io"/>+ <pin name="PC0" x="-17.78" y="20.32" length="middle" direction="io"/>+ <pin name="PC1" x="-17.78" y="17.78" length="middle" direction="io"/>+ <pin name="PC2" x="-17.78" y="15.24" length="middle" direction="io"/>+ <pin name="PC3" x="-17.78" y="12.7" length="middle" direction="io"/>+ <pin name="VSSA/VREF-" x="-17.78" y="10.16" length="middle" direction="pwr"/>+ <pin name="VDDA/VREF+" x="-17.78" y="7.62" length="middle" direction="pwr"/>+ <pin name="PA0" x="-17.78" y="5.08" length="middle" direction="io"/>+ <pin name="PA1" x="-17.78" y="2.54" length="middle" direction="io"/>+ <pin name="PA2" x="-17.78" y="0" length="middle" direction="io"/>+ <pin name="PA3" x="-17.78" y="-2.54" length="middle" direction="io"/>+ <pin name="VSS" x="-17.78" y="-5.08" length="middle" direction="pwr"/>+ <pin name="VDD" x="-17.78" y="-7.62" length="middle" direction="pwr"/>+ <pin name="PA4" x="-17.78" y="-10.16" length="middle" direction="io"/>+ <pin name="PA5" x="-17.78" y="-12.7" length="middle" direction="io"/>+ <pin name="PA6" x="-17.78" y="-15.24" length="middle" direction="io"/>+ <pin name="PA7" x="-17.78" y="-17.78" length="middle" direction="io"/>+ <pin name="PC4" x="-17.78" y="-20.32" length="middle" direction="io"/>+ <pin name="PC5" x="-17.78" y="-22.86" length="middle" direction="io"/>+ <pin name="PB0" x="-17.78" y="-25.4" length="middle" direction="io"/>+ <pin name="PB1" x="-17.78" y="-27.94" length="middle" direction="io"/>+ <pin name="PB2" x="-17.78" y="-30.48" length="middle" direction="io"/>+ <pin name="PB10" x="-17.78" y="-33.02" length="middle" direction="io"/>+ <pin name="PB11" x="-17.78" y="-35.56" length="middle" direction="io"/>+ <pin name="VSS@2" x="-17.78" y="-38.1" length="middle" direction="pwr"/>+ <pin name="VDD@2" x="-17.78" y="-40.64" length="middle" direction="pwr"/>+ <pin name="VDD@3" x="17.78" y="38.1" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@3" x="17.78" y="35.56" length="middle" direction="pwr" rot="R180"/>+ <pin name="PB9" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PB8" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PH3-BOOT0" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PB7" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PB6" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PB5" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" 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length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+</symbol>+<symbol name="ABM8-16.000MHZ-B2-T">+ <description>Four pin crystal, GND on pins 2 and 4</description>+ <wire x1="-1.143" y1="2.54" x2="1.143" y2="2.54" width="0.254" layer="94"/>+ <wire x1="1.143" y1="2.54" x2="1.143" y2="-2.54" width="0.254" layer="94"/>+ <wire x1="1.143" y1="-2.54" x2="-1.143" y2="-2.54" width="0.254" layer="94"/>+ <wire x1="-1.143" y1="-2.54" x2="-1.143" y2="2.54" width="0.254" layer="94"/>+ <wire x1="-2.5400" y1="2.2860" x2="-2.5400" y2="3.5560" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="3.5560" x2="2.5400" y2="3.5560" width="0.1524" layer="94"/>+ <wire x1="2.5400" y1="3.5560" x2="2.5400" y2="2.2860" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="0.0000" x2="-2.0320" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="-2.2860" x2="-2.5400" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="-3.5560" x2="2.5400" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="2.5400" y1="-3.5560" x2="2.5400" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-2.0320" y1="-1.2700" x2="-2.0320" y2="1.2700" width="0.1524" layer="94"/>+ <wire x1="0.0000" y1="-3.8100" x2="0.0000" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="2.0320" y1="0.0000" x2="2.5400" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="2.0320" y1="-1.2700" x2="2.0320" y2="1.2700" width="0.1524" layer="94"/>+ <text x="3.1750" y="5.0800" size="1.27" layer="95" align="center">>NAME</text>+ <text x="3.1750" y="3.1750" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="1" x="-3.81" y="0" length="short" direction="pas" visible="pad"/>+ <pin name="G" x="0" y="-5.08" length="short" direction="pas" rot="R90" visible="pad"/>+ <pin name="3" x="3.81" y="0" length="short" direction="pas" rot="R180" visible="pad"/>+ <pin name="G@2" x="0" y="-5.08" length="short" direction="pas" rot="R90" visible="pad"/>+</symbol>+<symbol name="IN-S63BTG">+ <description>Light emitting diode</description>+ <wire x1="-3.0480" y1="-0.7620" x2="-4.5720" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-4.5720" y1="-2.2860" x2="-3.8100" y2="-2.2860" width="0.1524" layer="94"/>+ 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align="center">>NAME</text>+ <text x="0.0000" y="-2.5400" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="K" x="-3.81" y="0" length="short" direction="pas" visible="pad"/>+ <pin name="A" x="3.81" y="0" length="short" direction="pas" rot="R180" visible="pad"/>+</symbol>+</symbols>+<devicesets>+<deviceset name="LAN7800" prefix="U">+ <description>Microchip LAN7800 SuperSpeed USB 3.1 Gen1 to 10/100/1000 Ethernet Controller, QFN-48</description>+ <gates>+ <gate name="G$1" symbol="LAN7800" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="QFN-48_7x7mm">+ <connects>+ <connect gate="G$1" pin="TR0P" pad="1"/>+ <connect gate="G$1" pin="TR0N" pad="2"/>+ <connect gate="G$1" pin="VDD25A" pad="3"/>+ <connect gate="G$1" pin="TR1P" pad="4"/>+ <connect gate="G$1" pin="TR1N" pad="5"/>+ <connect gate="G$1" pin="VDD25A@2" pad="6"/>+ <connect gate="G$1" pin="TR2P" pad="7"/>+ <connect gate="G$1" pin="TR2N" pad="8"/>+ <connect gate="G$1" pin="VDD25A@3" pad="9"/>+ <connect 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package3d_urn="urn:adsk.wipprod:fs.file:vf.GOLD0?version=1"/></package3dinstances>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+<deviceset name="CH340G" prefix="U">+ <description>USB serial converter, UART, SOIC-16</description>+ <gates>+ <gate name="G$1" symbol="CH340G" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="SOIC-16_3.9x9.9mm_P1.27mm">+ <connects>+ <connect gate="G$1" pin="GND" pad="1"/>+ <connect gate="G$1" pin="TXD" pad="2"/>+ <connect gate="G$1" pin="RXD" pad="3"/>+ <connect gate="G$1" pin="V3" pad="4"/>+ <connect gate="G$1" pin="UD+" pad="5"/>+ <connect gate="G$1" pin="UD-" pad="6"/>+ <connect gate="G$1" pin="XI" pad="7"/>+ <connect gate="G$1" pin="XO" pad="8"/>+ <connect gate="G$1" pin="CTS" pad="9"/>+ <connect gate="G$1" pin="DSR" pad="10"/>+ <connect gate="G$1" pin="RI" pad="11"/>+ <connect gate="G$1" pin="DCD" pad="12"/>+ <connect gate="G$1" pin="DTR" pad="13"/>+ <connect gate="G$1" pin="RTS" pad="14"/>+ <connect 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x="1.2700" y="13.9700" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="GND" x="-17.78" y="-7.620000000000001" length="middle" direction="pwr"/>+ <pin name="TXD" x="17.78" y="12.7" length="middle" direction="out" rot="R180"/>+ <pin name="RXD" x="-17.78" y="10.16" length="middle" direction="in"/>+ <pin name="V3" x="-17.78" y="-10.16" length="middle" direction="out"/>+ <pin name="UD+" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="UD-" x="17.78" y="-2.540000000000001" length="middle" direction="io" rot="R180"/>+ <pin name="XI" x="-17.78" y="7.619999999999999" length="middle" direction="in"/>+ <pin name="XO" x="17.78" y="10.16" length="middle" direction="out" rot="R180"/>+ <pin name="CTS" x="-17.78" y="5.079999999999999" length="middle" direction="in"/>+ <pin name="DSR" x="-17.78" y="0" length="middle" direction="in"/>+ <pin name="RI" x="-17.78" y="-2.540000000000001" length="middle" direction="in"/>+ <pin name="DCD" x="-17.78" y="2.539999999999999" length="middle" direction="in"/>+ <pin name="DTR" x="17.78" y="7.619999999999999" length="middle" direction="out" rot="R180"/>+ <pin name="RTS" x="17.78" y="5.079999999999999" length="middle" direction="out" rot="R180"/>+ <pin name="R232" x="-17.78" y="12.7" length="middle" direction="in"/>+ <pin name="VCC" x="-17.78" y="-12.7" length="middle" direction="pwr"/>+</symbol>+<symbol name="STM32L431RCT6TR">+ <wire x1="-12.7" y1="40.64" x2="12.7" y2="40.64" width="0.254" layer="94"/>+ <wire x1="12.7" y1="40.64" x2="12.7" y2="-43.18" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-43.18" x2="-12.7" y2="-43.18" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-43.18" x2="-12.7" y2="40.64" width="0.254" layer="94"/>+ <text x="0.0000" y="43.1800" size="1.27" layer="95" align="center">>NAME</text>+ <text x="0.0000" y="-45.7200" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="VBAT" x="-17.78" y="38.1" length="middle" direction="pwr"/>+ <pin name="PC13" x="-17.78" y="35.56" length="middle" direction="io"/>+ <pin name="PC14-OSC32_IN" x="-17.78" y="33.02" length="middle" direction="io"/>+ <pin name="PC15-OSC32_OUT" x="-17.78" y="30.48" length="middle" direction="io"/>+ <pin name="PH0-OSC_IN" x="-17.78" y="27.94" length="middle" direction="io"/>+ <pin name="PH1-OSC_OUT" x="-17.78" y="25.4" length="middle" direction="io"/>+ <pin name="NRST" x="-17.78" y="22.86" length="middle" direction="io"/>+ <pin name="PC0" x="-17.78" y="20.32" length="middle" direction="io"/>+ <pin name="PC1" x="-17.78" y="17.78" length="middle" direction="io"/>+ <pin name="PC2" x="-17.78" y="15.24" length="middle" direction="io"/>+ <pin name="PC3" x="-17.78" y="12.7" length="middle" direction="io"/>+ <pin name="VSSA/VREF-" x="-17.78" y="10.16" length="middle" direction="pwr"/>+ <pin name="VDDA/VREF+" x="-17.78" y="7.62" length="middle" direction="pwr"/>+ <pin name="PA0" x="-17.78" y="5.08" length="middle" direction="io"/>+ <pin name="PA1" x="-17.78" y="2.54" length="middle" direction="io"/>+ <pin name="PA2" x="-17.78" y="0" length="middle" direction="io"/>+ <pin name="PA3" x="-17.78" y="-2.54" length="middle" direction="io"/>+ <pin name="VSS" x="-17.78" y="-5.08" length="middle" direction="pwr"/>+ <pin name="VDD" x="-17.78" y="-7.62" length="middle" direction="pwr"/>+ <pin name="PA4" x="-17.78" y="-10.16" length="middle" direction="io"/>+ <pin name="PA5" x="-17.78" y="-12.7" length="middle" direction="io"/>+ <pin name="PA6" x="-17.78" y="-15.24" length="middle" direction="io"/>+ <pin name="PA7" x="-17.78" y="-17.78" length="middle" direction="io"/>+ <pin name="PC4" x="-17.78" y="-20.32" length="middle" direction="io"/>+ <pin name="PC5" x="-17.78" y="-22.86" length="middle" direction="io"/>+ <pin name="PB0" x="-17.78" y="-25.4" length="middle" direction="io"/>+ <pin name="PB1" x="-17.78" y="-27.94" length="middle" direction="io"/>+ <pin name="PB2" x="-17.78" y="-30.48" length="middle" direction="io"/>+ <pin name="PB10" x="-17.78" y="-33.02" length="middle" direction="io"/>+ <pin name="PB11" x="-17.78" y="-35.56" length="middle" direction="io"/>+ <pin name="VSS@2" x="-17.78" y="-38.1" length="middle" direction="pwr"/>+ <pin name="VDD@2" x="-17.78" y="-40.64" length="middle" direction="pwr"/>+ <pin name="VDD@3" x="17.78" y="38.1" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@3" x="17.78" y="35.56" length="middle" direction="pwr" rot="R180"/>+ <pin name="PB9" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PB8" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PH3-BOOT0" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PB7" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PB6" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PB5" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@4" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@4" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13" x="17.78" y="-7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+</symbol>+<symbol name="ABM8-16.000MHZ-B2-T">+ <description>Four pin crystal, GND on pins 2 and 4</description>+ <wire x1="-1.143" y1="2.54" x2="1.143" y2="2.54" width="0.254" layer="94"/>+ <wire x1="1.143" y1="2.54" x2="1.143" y2="-2.54" width="0.254" layer="94"/>+ <wire x1="1.143" y1="-2.54" x2="-1.143" y2="-2.54" width="0.254" layer="94"/>+ <wire x1="-1.143" y1="-2.54" x2="-1.143" y2="2.54" width="0.254" layer="94"/>+ <wire x1="-2.5400" y1="2.2860" x2="-2.5400" y2="3.5560" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="3.5560" x2="2.5400" y2="3.5560" width="0.1524" layer="94"/>+ <wire x1="2.5400" y1="3.5560" x2="2.5400" y2="2.2860" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="0.0000" x2="-2.0320" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="-2.2860" x2="-2.5400" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="-2.5400" y1="-3.5560" x2="2.5400" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="2.5400" y1="-3.5560" x2="2.5400" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-2.0320" y1="-1.2700" x2="-2.0320" y2="1.2700" width="0.1524" layer="94"/>+ <wire x1="0.0000" y1="-3.8100" x2="0.0000" y2="-3.5560" width="0.1524" layer="94"/>+ <wire x1="2.0320" y1="0.0000" x2="2.5400" y2="0.0000" width="0.1524" layer="94"/>+ <wire x1="2.0320" y1="-1.2700" x2="2.0320" y2="1.2700" width="0.1524" layer="94"/>+ <text x="3.1750" y="5.0800" size="1.27" layer="95" align="center">>NAME</text>+ <text x="3.1750" y="3.1750" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="1" x="-3.81" y="0" length="short" direction="pas" visible="pad"/>+ <pin name="G" x="0" y="-5.08" length="short" direction="pas" rot="R90" visible="pad"/>+ <pin name="3" x="3.81" y="0" length="short" direction="pas" rot="R180" visible="pad"/>+ <pin name="G@2" x="0" y="-5.08" length="short" direction="pas" rot="R90" visible="pad"/>+</symbol>+<symbol name="IN-S63BTG">+ <description>Light emitting diode</description>+ <wire x1="-3.0480" y1="-0.7620" x2="-4.5720" y2="-2.2860" width="0.1524" layer="94"/>+ <wire x1="-4.5720" y1="-2.2860" x2="-3.8100" y2="-2.2860" width="0.1524" layer="94"/>+ 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align="center">>NAME</text>+ <text x="0.0000" y="-2.5400" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="K" x="-3.81" y="0" length="short" direction="pas" visible="pad"/>+ <pin name="A" x="3.81" y="0" length="short" direction="pas" rot="R180" visible="pad"/>+</symbol>+</symbols>+<devicesets>+<deviceset name="LAN7800" prefix="U">+ <description>Microchip LAN7800 SuperSpeed USB 3.1 Gen1 to 10/100/1000 Ethernet Controller, QFN-48</description>+ <gates>+ <gate name="G$1" symbol="LAN7800" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="QFN-48_7x7mm">+ <connects>+ <connect gate="G$1" pin="TR0P" pad="1"/>+ <connect gate="G$1" pin="TR0N" pad="2"/>+ <connect gate="G$1" pin="VDD25A" pad="3"/>+ <connect gate="G$1" pin="TR1P" pad="4"/>+ <connect gate="G$1" pin="TR1N" pad="5"/>+ <connect gate="G$1" pin="VDD25A@2" pad="6"/>+ <connect gate="G$1" pin="TR2P" pad="7"/>+ <connect gate="G$1" pin="TR2N" pad="8"/>+ <connect gate="G$1" pin="VDD25A@3" pad="9"/>+ <connect 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package3d_urn="urn:adsk.wipprod:fs.file:vf.GOLD0?version=1"/></package3dinstances>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+<deviceset name="CH340G" prefix="U">+ <description>USB serial converter, UART, SOIC-16</description>+ <gates>+ <gate name="G$1" symbol="CH340G" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="SOIC-16_3.9x9.9mm_P1.27mm">+ <connects>+ <connect gate="G$1" pin="GND" pad="1"/>+ <connect gate="G$1" pin="TXD" pad="2"/>+ <connect gate="G$1" pin="RXD" pad="3"/>+ <connect gate="G$1" pin="V3" pad="4"/>+ <connect gate="G$1" pin="UD+" pad="5"/>+ <connect gate="G$1" pin="UD-" pad="6"/>+ <connect gate="G$1" pin="XI" pad="7"/>+ <connect gate="G$1" pin="XO" pad="8"/>+ <connect gate="G$1" pin="CTS" pad="9"/>+ <connect gate="G$1" pin="DSR" pad="10"/>+ <connect gate="G$1" pin="RI" pad="11"/>+ <connect gate="G$1" pin="DCD" pad="12"/>+ <connect gate="G$1" pin="DTR" pad="13"/>+ <connect gate="G$1" pin="RTS" pad="14"/>+ <connect gate="G$1" pin="R232" pad="15"/>+ <connect gate="G$1" pin="VCC" pad="16"/>+ </connects>+<package3dinstances><package3dinstance package3d_urn="urn:adsk.wipprod:fs.file:vf.GOLD1?version=1"/></package3dinstances>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+<deviceset name="STM32L431RCT6TR" prefix="U">+ <description></description>+ <gates>+ <gate name="G$1" symbol="STM32L431RCT6TR" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="LQFP-64_10x10mm_P0.5mm">+ <connects>+ <connect gate="G$1" pin="VBAT" pad="1"/>+ <connect gate="G$1" pin="PC13" pad="2"/>+ <connect gate="G$1" pin="PC14-OSC32_IN" pad="3"/>+ <connect gate="G$1" pin="PC15-OSC32_OUT" pad="4"/>+ <connect gate="G$1" pin="PH0-OSC_IN" pad="5"/>+ <connect gate="G$1" pin="PH1-OSC_OUT" pad="6"/>+ <connect gate="G$1" pin="NRST" pad="7"/>+ <connect gate="G$1" pin="PC0" pad="8"/>+ <connect gate="G$1" pin="PC1" pad="9"/>+ <connect gate="G$1" pin="PC2" pad="10"/>+ <connect gate="G$1" pin="PC3" pad="11"/>+ <connect gate="G$1" pin="VSSA/VREF-" pad="12"/>+ <connect gate="G$1" pin="VDDA/VREF+" pad="13"/>+ <connect gate="G$1" pin="PA0" pad="14"/>+ <connect gate="G$1" pin="PA1" pad="15"/>+ <connect gate="G$1" pin="PA2" pad="16"/>+ <connect gate="G$1" pin="PA3" pad="17"/>+ <connect gate="G$1" pin="VSS" pad="18"/>+ <connect gate="G$1" pin="VDD" pad="19"/>+ <connect gate="G$1" pin="PA4" pad="20"/>+ <connect gate="G$1" pin="PA5" pad="21"/>+ <connect gate="G$1" pin="PA6" pad="22"/>+ <connect gate="G$1" pin="PA7" pad="23"/>+ <connect gate="G$1" pin="PC4" pad="24"/>+ <connect gate="G$1" pin="PC5" pad="25"/>+ <connect gate="G$1" pin="PB0" pad="26"/>+ <connect gate="G$1" pin="PB1" pad="27"/>+ <connect gate="G$1" pin="PB2" pad="28"/>+ <connect gate="G$1" pin="PB10" pad="29"/>+ <connect gate="G$1" pin="PB11" pad="30"/>+ <connect gate="G$1" pin="VSS@2" pad="31"/>+ <connect gate="G$1" pin="VDD@2" pad="32"/>+ <connect gate="G$1" pin="VDD@3" pad="64"/>+ <connect gate="G$1" pin="VSS@3" pad="63"/>+ <connect gate="G$1" pin="PB9" pad="62"/>+ <connect gate="G$1" pin="PB8" pad="61"/>+ <connect gate="G$1" pin="PH3-BOOT0" pad="60"/>+ <connect gate="G$1" pin="PB7" pad="59"/>+ <connect gate="G$1" pin="PB6" pad="58"/>+ <connect gate="G$1" pin="PB5" pad="57"/>+ <connect gate="G$1" pin="PB4" pad="56"/>+ <connect gate="G$1" pin="PB3" pad="55"/>+ <connect gate="G$1" pin="PD2" pad="54"/>+ <connect gate="G$1" pin="PC12" pad="53"/>+ <connect gate="G$1" pin="PC11" pad="52"/>+ <connect gate="G$1" pin="PC10" pad="51"/>+ <connect gate="G$1" pin="PA15" pad="50"/>+ <connect gate="G$1" pin="PA14" pad="49"/>+ <connect gate="G$1" pin="VDD@4" pad="48"/>+ <connect gate="G$1" pin="VSS@4" pad="47"/>+ <connect gate="G$1" pin="PA13" pad="46"/>+ <connect gate="G$1" pin="PA12" pad="45"/>+ <connect gate="G$1" pin="PA11" pad="44"/>+ <connect gate="G$1" pin="PA10" pad="43"/>+ <connect gate="G$1" pin="PA9" pad="42"/>+ <connect gate="G$1" pin="PA8" pad="41"/>+ <connect gate="G$1" pin="PC9" pad="40"/>+ <connect gate="G$1" pin="PC8" pad="39"/>+ <connect gate="G$1" pin="PC7" pad="38"/>+ <connect gate="G$1" pin="PC6" pad="37"/>+ <connect gate="G$1" pin="PB15" pad="36"/>+ <connect gate="G$1" pin="PB14" pad="35"/>+ <connect gate="G$1" pin="PB13" pad="34"/>+ <connect gate="G$1" pin="PB12" pad="33"/>+ </connects>+<package3dinstances><package3dinstance package3d_urn="urn:adsk.wipprod:fs.file:vf.GOLD2?version=1"/></package3dinstances>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+<deviceset name="ABM8-16.000MHZ-B2-T" prefix="Y">+ <description>Four pin crystal, GND on pins 2 and 4</description>+ <gates>+ <gate name="G$1" symbol="ABM8-16.000MHZ-B2-T" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="Crystal_SMD_3225-4Pin_3.2x2.5mm">+ <connects>+ <connect gate="G$1" pin="1" pad="1"/>+ <connect gate="G$1" pin="G" pad="2"/>+ <connect gate="G$1" pin="3" pad="3"/>+ <connect gate="G$1" pin="G@2" pad="4"/>+ </connects>+<package3dinstances><package3dinstance package3d_urn="urn:adsk.wipprod:fs.file:vf.GOLD3?version=1"/></package3dinstances>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+<deviceset name="IN-S63BTG" prefix="D">+ <description>Light emitting diode</description>+ <gates>+ <gate name="G$1" symbol="IN-S63BTG" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="IN-S63BTG">+ <connects>+ <connect gate="G$1" pin="K" pad="1"/>+ <connect gate="G$1" pin="A" pad="2"/>+ </connects>+<package3dinstances><package3dinstance package3d_urn="urn:adsk.wipprod:fs.file:vf.GOLD4?version=1"/></package3dinstances>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+</devicesets>+</library>+</drawing>+</eagle>
rust/lbr/tests/golden/Demo_Board.jsonadded+58@@ -0,0 +1,58 @@+{+ "dev": [+ "LAN7800",+ "CH340G",+ "STM32L431RCT6TR",+ "ABM8-16.000MHZ-B2-T",+ "IN-S63BTG"+ ],+ "dev_pac": {+ "ABM8-16.000MHZ-B2-T": [+ "Crystal_SMD_3225-4Pin_3.2x2.5mm"+ ],+ "CH340G": [+ "SOIC-16_3.9x9.9mm_P1.27mm"+ ],+ "IN-S63BTG": [+ "IN-S63BTG"+ ],+ "LAN7800": [+ "QFN-48_7x7mm"+ ],+ "STM32L431RCT6TR": [+ "LQFP-64_10x10mm_P0.5mm"+ ]+ },+ "dev_sym": {+ "ABM8-16.000MHZ-B2-T": [+ "ABM8-16.000MHZ-B2-T"+ ],+ "CH340G": [+ "CH340G"+ ],+ "IN-S63BTG": [+ "IN-S63BTG"+ ],+ "LAN7800": [+ "LAN7800"+ ],+ "STM32L431RCT6TR": [+ "STM32L431RCT6TR"+ ]+ },+ "p3d": [],+ "pac": [+ "QFN-48_7x7mm",+ "SOIC-16_3.9x9.9mm_P1.27mm",+ "LQFP-64_10x10mm_P0.5mm",+ "Crystal_SMD_3225-4Pin_3.2x2.5mm",+ "IN-S63BTG"+ ],+ "sym": [+ "LAN7800",+ "CH340G",+ "STM32L431RCT6TR",+ "ABM8-16.000MHZ-B2-T",+ "IN-S63BTG"+ ]+}
rust/lbr/tests/golden/Demo_Board.metadata.jsonadded+101@@ -0,0 +1,101 @@+{+ "devicesets": [+ {+ "description": "Microchip LAN7800 SuperSpeed USB 3.1 Gen1 to 10/100/1000 Ethernet Controller, QFN-48",+ "name": "LAN7800",+ "variants": [+ {+ "attributes": {},+ "device": "",+ "fullName": "LAN7800",+ "missing": [+ "MPN",+ "MANUFACTURER",+ "a distributor PN (MOUSER_PN/DIGIKEY_PN/LCSC_PN)"+ ],+ "package": "QFN-48_7x7mm",+ "technology": ""+ }+ ]+ },+ {+ "description": "USB serial converter, UART, SOIC-16",+ "name": "CH340G",+ "variants": [+ {+ "attributes": {},+ "device": "",+ "fullName": "CH340G",+ "missing": [+ "MPN",+ "MANUFACTURER",+ "a distributor PN (MOUSER_PN/DIGIKEY_PN/LCSC_PN)"+ ],+ "package": "SOIC-16_3.9x9.9mm_P1.27mm",+ "technology": ""+ }+ ]+ },+ {+ "description": "",+ "name": "STM32L431RCT6TR",+ "variants": [+ {+ "attributes": {},+ "device": "",+ "fullName": "STM32L431RCT6TR",+ "missing": [+ "MPN",+ "MANUFACTURER",+ "a distributor PN (MOUSER_PN/DIGIKEY_PN/LCSC_PN)"+ ],+ "package": "LQFP-64_10x10mm_P0.5mm",+ "technology": ""+ }+ ]+ },+ {+ "description": "Four pin crystal, GND on pins 2 and 4",+ "name": "ABM8-16.000MHZ-B2-T",+ "variants": [+ {+ "attributes": {},+ "device": "",+ "fullName": "ABM8-16.000MHZ-B2-T",+ "missing": [+ "MPN",+ "MANUFACTURER",+ "a distributor PN (MOUSER_PN/DIGIKEY_PN/LCSC_PN)"+ ],+ "package": "Crystal_SMD_3225-4Pin_3.2x2.5mm",+ "technology": ""+ }+ ]+ },+ {+ "description": "Light emitting diode",+ "name": "IN-S63BTG",+ "variants": [+ {+ "attributes": {},+ "device": "",+ "fullName": "IN-S63BTG",+ "missing": [+ "MPN",+ "MANUFACTURER",+ "a distributor PN (MOUSER_PN/DIGIKEY_PN/LCSC_PN)"+ ],+ "package": "IN-S63BTG",+ "technology": ""+ }+ ]+ }+ ],+ "ok": true,+ "totals": {+ "devicesets": 5,+ "variants": 5,+ "withDistributor": 0,+ "withMpn": 0+ }+}
rust/lbr/tests/golden/IN-S63BTG.jsonadded+22@@ -0,0 +1,22 @@+{+ "dev": [+ "IN-S63BTG"+ ],+ "dev_pac": {+ "IN-S63BTG": [+ "IN-S63BTG"+ ]+ },+ "dev_sym": {+ "IN-S63BTG": [+ "IN-S63BTG"+ ]+ },+ "p3d": [],+ "pac": [+ "IN-S63BTG"+ ],+ "sym": [+ "IN-S63BTG"+ ]+}
rust/lbr/tests/golden/LAN7800.jsonadded+22@@ -0,0 +1,22 @@+{+ "dev": [+ "LAN7800"+ ],+ "dev_pac": {+ "LAN7800": [+ "QFN-48_7x7mm"+ ]+ },+ "dev_sym": {+ "LAN7800": [+ "LAN7800"+ ]+ },+ "p3d": [],+ "pac": [+ "QFN-48_7x7mm"+ ],+ "sym": [+ "LAN7800"+ ]+}
rust/lbr/tests/golden/STM32L431RCT6TR.jsonadded+22@@ -0,0 +1,22 @@+{+ "dev": [+ "STM32L431RCT6TR"+ ],+ "dev_pac": {+ "STM32L431RCT6TR": [+ "LQFP-64_10x10mm_P0.5mm"+ ]+ },+ "dev_sym": {+ "STM32L431RCT6TR": [+ "STM32L431RCT6TR"+ ]+ },+ "p3d": [],+ "pac": [+ "LQFP-64_10x10mm_P0.5mm"+ ],+ "sym": [+ "STM32L431RCT6TR"+ ]+}
rust/lbr/tests/golden/bundle_files.jsonadded+21@@ -0,0 +1,21 @@+{+ "allLbrs": [+ "Demo_Board/Demo_Board.lbr",+ "Demo_Board/parts/ABM8-16.000MHZ-B2-T.lbr",+ "Demo_Board/parts/CH340G.lbr",+ "Demo_Board/parts/IN-S63BTG.lbr",+ "Demo_Board/parts/LAN7800.lbr",+ "Demo_Board/parts/STM32L431RCT6TR.lbr"+ ],+ "extracted": 13,+ "lbr": "Demo_Board/Demo_Board.lbr",+ "models": [+ "Demo_Board/3dmodels/ABM8-16.000MHZ-B2-T.step",+ "Demo_Board/3dmodels/CH340G.step",+ "Demo_Board/3dmodels/IN-S63BTG.step",+ "Demo_Board/3dmodels/LAN7800.step",+ "Demo_Board/3dmodels/STM32L431RCT6TR.step"+ ],+ "zipslipError": "unsafe zip entry: ../evil.lbr",+ "zipslipRefused": true+}
rust/lbr/tests/golden/inject_bindings.jsonadded+26@@ -0,0 +1,26 @@+{+ "first": [+ {+ "package": "QFN-48_7x7mm",+ "wip_urn": "urn:adsk.wipprod:fs.file:vf.GOLD0?version=1"+ },+ {+ "package": "SOIC-16_3.9x9.9mm_P1.27mm",+ "wip_urn": "urn:adsk.wipprod:fs.file:vf.GOLD1?version=1"+ },+ {+ "package": "LQFP-64_10x10mm_P0.5mm",+ "wip_urn": "urn:adsk.wipprod:fs.file:vf.GOLD2?version=1"+ }+ ],+ "second": [+ {+ "package": "Crystal_SMD_3225-4Pin_3.2x2.5mm",+ "wip_urn": "urn:adsk.wipprod:fs.file:vf.GOLD3?version=1"+ },+ {+ "package": "IN-S63BTG",+ "wip_urn": "urn:adsk.wipprod:fs.file:vf.GOLD4?version=1"+ }+ ]+}
rust/lbr/tests/golden/pair_parts.jsonadded+373@@ -0,0 +1,373 @@+{+ "demo_board": {+ "expected": {+ "models": [+ "bundle/3dmodels/ABM8-16.000MHZ-B2-T.step",+ "bundle/3dmodels/CH340G.step",+ "bundle/3dmodels/IN-S63BTG.step",+ "bundle/3dmodels/LAN7800.step",+ "bundle/3dmodels/STM32L431RCT6TR.step"+ ],+ "modelsUnused": [],+ "parts": [+ {+ "device": "",+ "deviceset": "LAN7800",+ "lbrPath": "bundle/Demo_Board.lbr",+ "matchedBy": "deviceset",+ "modelPath": "bundle/3dmodels/LAN7800.step",+ "package": "QFN-48_7x7mm"+ },+ {+ "device": "",+ "deviceset": "CH340G",+ "lbrPath": "bundle/Demo_Board.lbr",+ "matchedBy": "deviceset",+ "modelPath": "bundle/3dmodels/CH340G.step",+ "package": "SOIC-16_3.9x9.9mm_P1.27mm"+ },+ {+ "device": "",+ "deviceset": "STM32L431RCT6TR",+ "lbrPath": "bundle/Demo_Board.lbr",+ "matchedBy": "deviceset",+ "modelPath": "bundle/3dmodels/STM32L431RCT6TR.step",+ "package": "LQFP-64_10x10mm_P0.5mm"+ },+ {+ "device": "",+ "deviceset": "ABM8-16.000MHZ-B2-T",+ "lbrPath": "bundle/Demo_Board.lbr",+ "matchedBy": "deviceset",+ "modelPath": "bundle/3dmodels/ABM8-16.000MHZ-B2-T.step",+ "package": "Crystal_SMD_3225-4Pin_3.2x2.5mm"+ },+ {+ "device": "",+ "deviceset": "IN-S63BTG",+ "lbrPath": "bundle/Demo_Board.lbr",+ "matchedBy": "package",+ "modelPath": "bundle/3dmodels/IN-S63BTG.step",+ "package": "IN-S63BTG"+ }+ ],+ "shared": [],+ "unbound": []+ },+ "lbrPath": "bundle/Demo_Board.lbr",+ "metadata": {+ "devicesets": [+ {+ "description": "Microchip LAN7800 SuperSpeed USB 3.1 Gen1 to 10/100/1000 Ethernet Controller, QFN-48",+ "name": "LAN7800",+ "variants": [+ {+ "attributes": {},+ "device": "",+ "fullName": "LAN7800",+ "missing": [+ "MPN",+ "MANUFACTURER",+ "a distributor PN (MOUSER_PN/DIGIKEY_PN/LCSC_PN)"+ ],+ "package": "QFN-48_7x7mm",+ "technology": ""+ }+ ]+ },+ {+ "description": "USB serial converter, UART, SOIC-16",+ "name": "CH340G",+ "variants": [+ {+ "attributes": {},+ "device": "",+ "fullName": "CH340G",+ "missing": [+ "MPN",+ "MANUFACTURER",+ "a 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],+ "package": "IN-S63BTG",+ "technology": ""+ }+ ]+ }+ ],+ "ok": true,+ "totals": {+ "devicesets": 5,+ "variants": 5,+ "withDistributor": 0,+ "withMpn": 0+ }+ },+ "models": [+ "bundle/3dmodels/ABM8-16.000MHZ-B2-T.step",+ "bundle/3dmodels/CH340G.step",+ "bundle/3dmodels/IN-S63BTG.step",+ "bundle/3dmodels/LAN7800.step",+ "bundle/3dmodels/STM32L431RCT6TR.step"+ ]+ },+ "names": {+ "bad": [+ "",+ " lead",+ "-lead",+ "xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx",+ "bad/slash",+ "tab\there"+ ],+ "norm": {+ "": "",+ "ABM8-16.000MHZ-B2-T": "abm816000mhzb2t",+ "Crystal_GND24": "crystalgnd24",+ "QFN-48_7x7mm": "qfn487x7mm"+ },+ "ok": [+ "Demo Board",+ "a",+ "Adom_Managed.Demo-2"+ ]+ },+ "only_one_of_each": {+ "expected": {+ "models": [+ "o/whatever.step"+ ],+ "modelsUnused": [],+ "parts": [+ {+ "device": "",+ "deviceset": "ONLY",+ "lbrPath": "o/One.lbr",+ "matchedBy": "only-one-of-each",+ "modelPath": "o/whatever.step",+ "package": "PKG"+ }+ ],+ "shared": [],+ "unbound": []+ },+ "lbrPath": "o/One.lbr",+ "metadata": {+ "devicesets": [+ {+ "name": "ONLY",+ "variants": [+ {+ "device": "",+ "package": "PKG"+ }+ ]+ }+ ]+ },+ "models": [+ "o/whatever.step"+ ]+ },+ "variants": {+ "expected": {+ "models": [+ "m/QFN-48_7x7mm.step",+ "m/LAN7800-HV.step",+ "m/qfn48_7x7mm_sb.stp",+ "m/abm8-16000mhz-b2-t.step",+ "m/STM32L431RCT6.step",+ "m/spare.step"+ ],+ "modelsUnused": [+ "m/spare.step"+ ],+ "parts": [+ {+ "device": "",+ "deviceset": "LAN7800",+ "lbrPath": "m/Syn.lbr",+ "matchedBy": "package",+ "modelPath": "m/QFN-48_7x7mm.step",+ "package": "QFN-48_7x7mm"+ },+ {+ "device": "-HV",+ "deviceset": "LAN7800",+ "lbrPath": "m/Syn.lbr",+ "matchedBy": "deviceset+device",+ "modelPath": "m/LAN7800-HV.step",+ "package": "QFN-48_7x7mm-HV"+ },+ {+ "device": "-SB",+ "deviceset": "LAN7800",+ "lbrPath": "m/Syn.lbr",+ "matchedBy": "package-normalised",+ "modelPath": "m/qfn48_7x7mm_sb.stp",+ "package": "QFN-48_7x7mm-SB"+ },+ {+ "device": "",+ "deviceset": "ABM8-16.000MHZ-B2-T",+ "lbrPath": "m/Syn.lbr",+ "matchedBy": "deviceset-normalised",+ "modelPath": "m/abm8-16000mhz-b2-t.step",+ "package": "Crystal_GND24"+ },+ {+ "device": "",+ "deviceset": "STM32L431RCT6TR",+ "lbrPath": "m/Syn.lbr",+ "matchedBy": "deviceset-prefix",+ "modelPath": "m/STM32L431RCT6.step",+ "package": "LQFP-64"+ }+ ],+ "shared": [+ {+ "deviceset": "LAN7800-CLONE",+ "package": "QFN-48_7x7mm",+ "via": "LAN7800"+ }+ ],+ "unbound": [+ {+ "device": "",+ "deviceset": "NOTHING-HERE",+ "package": "SOT-23",+ "why": "no STEP in the bundle named like the package 'SOT-23' or the device 'NOTHING-HERE'"+ },+ {+ "device": "",+ "deviceset": "GATELESS",+ "package": "GATELESS",+ "why": "no STEP in the bundle named like the package '' or the device 'GATELESS'"+ }+ ]+ },+ "lbrPath": "m/Syn.lbr",+ "metadata": {+ "devicesets": [+ {+ "name": "LAN7800",+ "variants": [+ {+ "device": "",+ "package": "QFN-48_7x7mm"+ },+ {+ "device": "-HV",+ "package": "QFN-48_7x7mm-HV"+ },+ {+ "device": "-SB",+ "package": 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rust/lbr/tests/golden/split/IN-S63BTG.lbradded+106@@ -0,0 +1,106 @@+<?xml version='1.0' encoding='utf-8'?>+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no" /></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch" />+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes" />+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes" />+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes" />+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes" />+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes" />+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes" />+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes" />+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes" />+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes" />+<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes" />+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes" />+<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes" />+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes" />+<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes" />+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes" />+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes" />+<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes" />+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes" />+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes" />+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes" />+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes" />+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes" />+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes" />+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes" />+<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="yes" />+<layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="yes" />+<layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="yes" />+<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="yes" />+<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="yes" />+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes" />+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes" />+<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes" />+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes" />+<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes" />+<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes" />+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes" />+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes" />+<layer number="93" name="Pins" color="2" fill="1" visible="no" active="yes" />+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes" />+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes" />+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes" />+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes" />+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes" />+</layers>+<library>+<description>Demo_Board (wiki.adom.inc Cloud Library)</description>+<packages><package name="IN-S63BTG">+ <description>2 pads, 2.5 x 1.0 mm. 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rust/lbr/tests/golden/split/IN-S63BTG__IN-S63BTG.lbradded+106@@ -0,0 +1,106 @@+<?xml version='1.0' encoding='utf-8'?>+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no" /></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch" />+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes" />+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes" />+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes" />+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes" />+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes" />+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes" />+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes" />+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes" />+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes" />+<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes" />+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes" />+<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes" />+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes" />+<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes" />+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes" />+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes" />+<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes" />+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes" />+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes" />+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes" />+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes" />+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes" />+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes" />+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes" />+<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="yes" />+<layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="yes" />+<layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="yes" />+<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="yes" />+<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="yes" />+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes" />+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes" />+<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes" />+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes" />+<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes" />+<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes" />+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes" />+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes" />+<layer number="93" name="Pins" color="2" fill="1" visible="no" active="yes" />+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes" />+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes" />+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes" />+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes" />+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes" />+</layers>+<library>+<description>Demo_Board (wiki.adom.inc Cloud Library)</description>+<packages><package name="IN-S63BTG">+ <description>2 pads, 2.5 x 1.0 mm. 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rust/lbr/tests/golden/split/LAN7800.lbradded+258@@ -0,0 +1,258 @@+<?xml version='1.0' encoding='utf-8'?>+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no" /></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch" />+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes" />+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes" />+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes" />+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes" />+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes" />+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes" />+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes" />+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes" 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direction="io" rot="R180" />+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180" />+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180" />+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180" />+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180" />+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180" />+ <pin name="VDD@4" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180" />+ <pin name="VSS@4" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180" />+ <pin name="PA13" x="17.78" y="-7.62" length="middle" direction="io" rot="R180" />+ <pin name="PA12" x="17.78" y="-10.16" length="middle" direction="io" rot="R180" />+ <pin name="PA11" x="17.78" y="-12.7" length="middle" direction="io" rot="R180" />+ <pin name="PA10" x="17.78" y="-15.24" length="middle" direction="io" rot="R180" />+ <pin name="PA9" x="17.78" y="-17.78" length="middle" direction="io" rot="R180" />+ <pin name="PA8" x="17.78" y="-20.32" length="middle" direction="io" rot="R180" />+ <pin name="PC9" x="17.78" y="-22.86" length="middle" direction="io" rot="R180" />+ <pin name="PC8" x="17.78" y="-25.4" length="middle" direction="io" rot="R180" />+ <pin name="PC7" x="17.78" y="-27.94" length="middle" direction="io" rot="R180" />+ <pin name="PC6" x="17.78" y="-30.48" length="middle" direction="io" rot="R180" />+ <pin name="PB15" x="17.78" y="-33.02" length="middle" direction="io" rot="R180" />+ <pin name="PB14" x="17.78" y="-35.56" length="middle" direction="io" rot="R180" />+ <pin name="PB13" x="17.78" y="-38.1" length="middle" direction="io" rot="R180" />+ <pin name="PB12" x="17.78" y="-40.64" length="middle" direction="io" rot="R180" />+</symbol>+</symbols><devicesets><deviceset name="STM32L431RCT6TR" prefix="U">+ <description />+ <gates>+ <gate name="G$1" symbol="STM32L431RCT6TR" x="0" y="0" />+ </gates>+ <devices>+ <device name="" package="LQFP-64_10x10mm_P0.5mm">+ <connects>+ <connect gate="G$1" pin="VBAT" pad="1" />+ <connect gate="G$1" pin="PC13" pad="2" />+ <connect gate="G$1" pin="PC14-OSC32_IN" pad="3" />+ <connect gate="G$1" pin="PC15-OSC32_OUT" pad="4" />+ <connect gate="G$1" pin="PH0-OSC_IN" pad="5" />+ <connect gate="G$1" pin="PH1-OSC_OUT" pad="6" />+ <connect gate="G$1" pin="NRST" pad="7" />+ <connect gate="G$1" pin="PC0" pad="8" />+ <connect gate="G$1" pin="PC1" pad="9" />+ <connect gate="G$1" pin="PC2" pad="10" />+ <connect gate="G$1" pin="PC3" pad="11" />+ <connect gate="G$1" pin="VSSA/VREF-" pad="12" />+ <connect gate="G$1" pin="VDDA/VREF+" pad="13" />+ <connect gate="G$1" pin="PA0" pad="14" />+ <connect gate="G$1" pin="PA1" pad="15" />+ <connect gate="G$1" pin="PA2" pad="16" />+ <connect gate="G$1" pin="PA3" pad="17" />+ <connect gate="G$1" pin="VSS" pad="18" />+ <connect gate="G$1" pin="VDD" pad="19" />+ <connect gate="G$1" pin="PA4" pad="20" />+ <connect gate="G$1" pin="PA5" pad="21" />+ <connect gate="G$1" pin="PA6" pad="22" />+ <connect gate="G$1" pin="PA7" pad="23" />+ <connect gate="G$1" pin="PC4" pad="24" />+ <connect gate="G$1" pin="PC5" pad="25" />+ <connect gate="G$1" pin="PB0" pad="26" />+ <connect gate="G$1" pin="PB1" pad="27" />+ <connect gate="G$1" pin="PB2" pad="28" />+ <connect gate="G$1" pin="PB10" pad="29" />+ <connect gate="G$1" pin="PB11" pad="30" />+ <connect gate="G$1" pin="VSS@2" pad="31" />+ <connect gate="G$1" pin="VDD@2" pad="32" />+ <connect gate="G$1" pin="VDD@3" pad="64" />+ <connect gate="G$1" pin="VSS@3" pad="63" />+ <connect gate="G$1" pin="PB9" pad="62" />+ <connect gate="G$1" pin="PB8" pad="61" />+ <connect gate="G$1" pin="PH3-BOOT0" pad="60" />+ <connect gate="G$1" pin="PB7" pad="59" />+ <connect gate="G$1" pin="PB6" pad="58" />+ <connect gate="G$1" pin="PB5" pad="57" />+ <connect gate="G$1" pin="PB4" pad="56" />+ <connect gate="G$1" pin="PB3" pad="55" />+ <connect gate="G$1" pin="PD2" pad="54" />+ <connect gate="G$1" pin="PC12" pad="53" />+ <connect gate="G$1" pin="PC11" pad="52" />+ <connect gate="G$1" pin="PC10" pad="51" />+ <connect gate="G$1" pin="PA15" pad="50" />+ <connect gate="G$1" pin="PA14" pad="49" />+ <connect gate="G$1" pin="VDD@4" pad="48" />+ <connect gate="G$1" pin="VSS@4" pad="47" />+ <connect gate="G$1" pin="PA13" pad="46" />+ <connect gate="G$1" pin="PA12" pad="45" />+ <connect gate="G$1" pin="PA11" pad="44" />+ <connect gate="G$1" pin="PA10" pad="43" />+ <connect gate="G$1" pin="PA9" pad="42" />+ <connect gate="G$1" pin="PA8" pad="41" />+ <connect gate="G$1" pin="PC9" pad="40" />+ <connect gate="G$1" pin="PC8" pad="39" />+ <connect gate="G$1" pin="PC7" pad="38" />+ <connect gate="G$1" pin="PC6" pad="37" />+ <connect gate="G$1" pin="PB15" pad="36" />+ <connect gate="G$1" pin="PB14" pad="35" />+ <connect gate="G$1" pin="PB13" pad="34" />+ <connect gate="G$1" pin="PB12" pad="33" />+ </connects>+ <technologies><technology name="" /></technologies>+ </device>+ </devices>+</deviceset>+</devicesets></library>+</drawing>+</eagle>
rust/lbr/tests/golden/split/index.jsonadded+102@@ -0,0 +1,102 @@+{+ "ABM8-16.000MHZ-B2-T": {+ "file": "ABM8-16.000MHZ-B2-T.lbr",+ "package": "Crystal_SMD_3225-4Pin_3.2x2.5mm",+ "packages": [+ "Crystal_SMD_3225-4Pin_3.2x2.5mm"+ ],+ "symbols": [+ "ABM8-16.000MHZ-B2-T"+ ]+ },+ "ABM8-16.000MHZ-B2-T::Crystal_SMD_3225-4Pin_3.2x2.5mm": {+ "file": "ABM8-16.000MHZ-B2-T__Crystal_SMD_3225-4Pin_3.2x2.5mm.lbr",+ "package": "Crystal_SMD_3225-4Pin_3.2x2.5mm",+ "packages": [+ "Crystal_SMD_3225-4Pin_3.2x2.5mm"+ ],+ "symbols": [+ "ABM8-16.000MHZ-B2-T"+ ]+ },+ "CH340G": {+ "file": "CH340G.lbr",+ "package": "SOIC-16_3.9x9.9mm_P1.27mm",+ "packages": [+ "SOIC-16_3.9x9.9mm_P1.27mm"+ ],+ "symbols": [+ "CH340G"+ ]+ },+ "CH340G::SOIC-16_3.9x9.9mm_P1.27mm": {+ "file": "CH340G__SOIC-16_3.9x9.9mm_P1.27mm.lbr",+ "package": "SOIC-16_3.9x9.9mm_P1.27mm",+ "packages": [+ "SOIC-16_3.9x9.9mm_P1.27mm"+ ],+ "symbols": [+ "CH340G"+ ]+ },+ "IN-S63BTG": {+ "file": "IN-S63BTG.lbr",+ "package": "IN-S63BTG",+ "packages": [+ "IN-S63BTG"+ ],+ "symbols": [+ "IN-S63BTG"+ ]+ },+ "IN-S63BTG::IN-S63BTG": {+ "file": "IN-S63BTG__IN-S63BTG.lbr",+ "package": "IN-S63BTG",+ "packages": [+ "IN-S63BTG"+ ],+ "symbols": [+ "IN-S63BTG"+ ]+ },+ "LAN7800": {+ "file": "LAN7800.lbr",+ "package": "QFN-48_7x7mm",+ "packages": [+ "QFN-48_7x7mm"+ ],+ "symbols": [+ "LAN7800"+ ]+ },+ "LAN7800::QFN-48_7x7mm": {+ "file": "LAN7800__QFN-48_7x7mm.lbr",+ "package": "QFN-48_7x7mm",+ "packages": [+ "QFN-48_7x7mm"+ ],+ "symbols": [+ "LAN7800"+ ]+ },+ "STM32L431RCT6TR": {+ "file": "STM32L431RCT6TR.lbr",+ "package": "LQFP-64_10x10mm_P0.5mm",+ "packages": [+ "LQFP-64_10x10mm_P0.5mm"+ ],+ "symbols": [+ "STM32L431RCT6TR"+ ]+ },+ "STM32L431RCT6TR::LQFP-64_10x10mm_P0.5mm": {+ "file": "STM32L431RCT6TR__LQFP-64_10x10mm_P0.5mm.lbr",+ "package": "LQFP-64_10x10mm_P0.5mm",+ "packages": [+ "LQFP-64_10x10mm_P0.5mm"+ ],+ "symbols": [+ "STM32L431RCT6TR"+ ]+ }+}
tests/reports/verb-test-2026-09-03_1559.jsonadded+724@@ -0,0 +1,724 @@+{+ "date": "2026-09-03_1559",+ "target": "ConfRoomROG",+ "tier": "daily",+ "pass": 34,+ "fail": 34,+ "sections": {+ "bridge-lifecycle": {+ "PASS": 6,+ "FAIL": 26,+ "MANUAL": 12,+ "SKIP": 0+ },+ "aps": {+ "PASS": 4,+ "FAIL": 5,+ "MANUAL": 5,+ "SKIP": 0+ },+ "exports": {+ "PASS": 0,+ "FAIL": 1,+ "MANUAL": 2,+ "SKIP": 0+ },+ "gui-driving": {+ "PASS": 13,+ "FAIL": 0,+ "MANUAL": 13,+ "SKIP": 0+ },+ "auth-tokens": {+ "PASS": 1,+ "FAIL": 1,+ "MANUAL": 2,+ "SKIP": 0+ },+ "mcp-server": {+ "PASS": 1,+ "FAIL": 0,+ "MANUAL": 1,+ "SKIP": 0+ },+ "cad-3d-bom": {+ "PASS": 6,+ "FAIL": 1,+ "MANUAL": 0,+ "SKIP": 0+ },+ "python-addin": {+ "PASS": 3,+ "FAIL": 0,+ "MANUAL": 1,+ "SKIP": 0+ }+ },+ "results": [+ {+ "verb": "fusion_action_ledger",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_activate_document",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_addin_status",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_alerts",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_cancel_run",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_create_library",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_install_library_bundle",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_library_manager",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_library_parts",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_live_feed",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_managed_library_create",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_managed_library_link",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_managed_library_pull",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_managed_library_push",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_managed_library_unlink",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_plan_library_import",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_preflight_lbr",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_prove_result",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_reset_workspace",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_restart_for_addin",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_save_to_cloud",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "aps"+ },+ {+ "verb": "fusion_set_driving_badge",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_set_window_sizing",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_take_screenshot",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_verb_times",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_web_signin",+ "status": "FAIL",+ "why": "described but untriaged in tests/run_verb_tests.py",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_load_design_rules",+ "status": "FAIL",+ "why": "in the test plan but MISSING from describe.py - undescribed verbs are invisible to callers",+ "section": "exports"+ },+ {+ "verb": "fusion_readiness",+ "status": "PASS",+ "why": "",+ "sec": 35.2,+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_describe",+ "status": "FAIL",+ "why": "verbs described but UNTRIAGED in test plan: ['fusion_action_ledger', 'fusion_activate_document', 'fusion_addin_status', 'fusion_alerts', 'fusion_cancel_run', 'fusion_create_library']",+ "sec": 0.2,+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_get_app_state",+ "status": "PASS",+ "why": "",+ "sec": 0.3,+ "section": "gui-driving"+ },+ {+ "verb": "fusion_search_cloud_files",+ "status": "PASS",+ "why": "",+ "sec": 2.7,+ "section": "aps"+ },+ {+ "verb": "fusion_walk_cloud_tree",+ "status": "PASS",+ "why": "",+ "sec": 2.6,+ "section": "aps"+ },+ {+ "verb": "fusion_aps_status",+ "status": "PASS",+ "why": "",+ "sec": 0.1,+ "section": "auth-tokens"+ },+ {+ "verb": "fusion_aps_get_browser",+ "status": "PASS",+ "why": "",+ "sec": 0.1,+ "section": "aps"+ },+ {+ "verb": "fusion_aps_search",+ "status": "FAIL",+ "why": "expected success, got error=APS is not_configured \u2014 sign in before cloud file operations. code=None; expected >0 results",+ "sec": 0.6,+ "section": "aps"+ },+ {+ "verb": "fusion_aps_recent",+ "status": "FAIL",+ "why": "expected success, got error=APS is not_configured \u2014 sign in before cloud file operations. code=None; expected >0 results",+ "sec": 0.6,+ "section": "aps"+ },+ {+ "verb": "fusion_aps_browse",+ "status": "FAIL",+ "why": "expected success, got error=APS is not_configured \u2014 sign in before cloud file operations. code=None; missing field 'hubs'",+ "sec": 0.6,+ "section": "aps"+ },+ {+ "verb": "fusion_aps_file_info",+ "status": "FAIL",+ "why": "expected success, got error=APS is not_configured \u2014 sign in before cloud file operations. code=None; missing field 'versionCount'",+ "sec": 0.6,+ "section": "aps"+ },+ {+ "verb": "fusion_aps_get",+ "status": "FAIL",+ "why": "expected success, got error= code=None",+ "sec": 0.1,+ "section": "auth-tokens"+ },+ {+ "verb": "fusion_uninstall",+ "status": "PASS",+ "why": "",+ "sec": 0.2,+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_set_seat_takeover",+ "status": "PASS",+ "why": "",+ "sec": 0.1,+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_aps_create_folder",+ "status": "MANUAL",+ "why": "needs projectId/parentFolderId of the test workspace",+ "section": "aps"+ },+ {+ "verb": "fusion_aps_upload",+ "status": "MANUAL",+ "why": "cloud write; exercised via build flows weekly",+ "section": "aps"+ },+ {+ "verb": "fusion_aps_set_client_id",+ "status": "MANUAL",+ "why": "would clobber org auth config",+ "section": "auth-tokens"+ },+ {+ "verb": "fusion_aps_set_browser",+ "status": "MANUAL",+ "why": "",+ "section": "aps"+ },+ {+ "verb": "fusion_aps_forget_browser",+ "status": "MANUAL",+ "why": "",+ "section": "aps"+ },+ {+ "verb": "fusion_aps_signin",+ "status": "MANUAL",+ "why": "opens a browser on the user's machine",+ "section": "auth-tokens"+ },+ {+ "verb": "fusion_start",+ "status": "PASS",+ "why": "",+ "sec": 1.0,+ "section": "gui-driving"+ },+ {+ "verb": "fusion_get_preferences",+ "status": "PASS",+ "why": "",+ "sec": 0.2,+ "section": "gui-driving"+ },+ {+ "verb": "fusion_set_preference",+ "status": "PASS",+ "why": "",+ "sec": 0.2,+ "section": "gui-driving"+ },+ {+ "verb": "fusion_mcp_status",+ "status": "PASS",+ "why": "",+ "sec": 2.7,+ "section": "mcp-server"+ },+ {+ "verb": "fusion_mcp_enable",+ "status": "MANUAL",+ "why": "drives the prefs UI, takes foreground",+ "section": "mcp-server"+ },+ {+ "verb": "fusion_prefs_open",+ "status": "MANUAL",+ "why": "opens a dialog on the user's screen",+ "section": "gui-driving"+ },+ {+ "verb": "fusion_prefs_close",+ "status": "MANUAL",+ "why": "",+ "section": "gui-driving"+ },+ {+ "verb": "fusion_set_auto_update",+ "status": "PASS",+ "why": "",+ "sec": 0.1,+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_assembly_bom",+ "status": "FAIL",+ "why": "expected a BOM or the budget refusal, got error=No active Fusion Design. code=None",+ "sec": 0.2,+ "section": "cad-3d-bom"+ },+ {+ "verb": "fusion_dismiss_blocking_dialogs",+ "status": "PASS",+ "why": "",+ "sec": 0.5,+ "section": "gui-driving"+ },+ {+ "verb": "fusion_load_design_rules",+ "status": "MANUAL",+ "why": "mutates the board's DRC rules",+ "section": "exports"+ },+ {+ "verb": "fusion_open_cloud_file",+ "status": "PASS",+ "why": "",+ "sec": 56.4,+ "section": "gui-driving"+ },+ {+ "verb": "fusion_show_schematic",+ "status": "PASS",+ "why": "",+ "sec": 18.6,+ "section": "gui-driving"+ },+ {+ "verb": "fusion_show_2d_board",+ "status": "PASS",+ "why": "",+ "sec": 18.3,+ "section": "gui-driving"+ },+ {+ "verb": "fusion_board_info",+ "status": "PASS",+ "why": "",+ "sec": 1.2,+ "section": "gui-driving"+ },+ {+ "verb": "fusion_execute_text_command",+ "status": "PASS",+ "why": "",+ "sec": 3.3,+ "section": "python-addin"+ },+ {+ "verb": "fusion_show_3d_board",+ "status": "PASS",+ "why": "",+ "sec": 26.4,+ "section": "gui-driving"+ },+ {+ "verb": "fusion_inspect_bodies",+ "status": "PASS",+ "why": "",+ "sec": 0.2,+ "section": "cad-3d-bom"+ },+ {+ "verb": "fusion_physical_properties",+ "status": "PASS",+ "why": "",+ "sec": 1.4,+ "section": "cad-3d-bom"+ },+ {+ "verb": "fusion_get_design_info",+ "status": "PASS",+ "why": "",+ "sec": 2.6,+ "section": "cad-3d-bom"+ },+ {+ "verb": "fusion_get_parameters",+ "status": "PASS",+ "why": "",+ "sec": 0.3,+ "section": "cad-3d-bom"+ },+ {+ "verb": "fusion_document_info",+ "status": "PASS",+ "why": "",+ "sec": 0.2,+ "section": "cad-3d-bom"+ },+ {+ "verb": "fusion_run_modeling_script#guard",+ "status": "PASS",+ "why": "",+ "sec": 3.5,+ "section": "python-addin"+ },+ {+ "verb": "fusion_assembly_bom#guard",+ "status": "PASS",+ "why": "",+ "sec": 0.2,+ "section": "cad-3d-bom"+ },+ {+ "verb": "fusion_run_modeling_script",+ "status": "PASS",+ "why": "",+ "sec": 2.6,+ "section": "python-addin"+ },+ {+ "verb": "fusion_electron_select",+ "status": "MANUAL",+ "why": "selection state is user-visible",+ "section": "python-addin"+ },+ {+ "verb": "fusion_open_design",+ "status": "MANUAL",+ "why": "local-file open; superseded by cloud flows",+ "section": "gui-driving"+ },+ {+ "verb": "fusion_close_window#noargs",+ "status": "PASS",+ "why": "",+ "sec": 0.0,+ "section": "gui-driving"+ },+ {+ "verb": "fusion_close_document",+ "status": "MANUAL",+ "why": "",+ "section": "gui-driving"+ },+ {+ "verb": "fusion_close_all_documents",+ "status": "MANUAL",+ "why": "would close the user's own tabs",+ "section": "gui-driving"+ },+ {+ "verb": "fusion_export_obj",+ "status": "MANUAL",+ "why": "build/doc-type dependent (OBJ refused on the 2026-08-14 box); verify quarterly",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_export_fbx",+ "status": "MANUAL",+ "why": "build/doc-type dependent (OBJ refused on the 2026-08-14 box); verify quarterly",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_export_usdz",+ "status": "MANUAL",+ "why": "build/doc-type dependent (OBJ refused on the 2026-08-14 box); verify quarterly",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_export_dxf",+ "status": "MANUAL",+ "why": "build/doc-type dependent (OBJ refused on the 2026-08-14 box); verify quarterly",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_export_dwg",+ "status": "MANUAL",+ "why": "build/doc-type dependent (OBJ refused on the 2026-08-14 box); verify quarterly",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_export_skp",+ "status": "MANUAL",+ "why": "build/doc-type dependent (OBJ refused on the 2026-08-14 box); verify quarterly",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_set_design_rules",+ "status": "MANUAL",+ "why": "mutates the board's DRC rules",+ "section": "exports"+ },+ {+ "verb": "fusion_show_3d_package",+ "status": "MANUAL",+ "why": "enters Package3DEnvironment (exit needs Package3DStop + dialog); tour covers it; attach path in release rehearsals",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_bind_library_3d",+ "status": "MANUAL",+ "why": "cloud f3d mint per run; release rehearsals (needs signed-in session)",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_attach_3d_package",+ "status": "MANUAL",+ "why": "modal Save dialog needs a human eye",+ "section": "gui-driving"+ },+ {+ "verb": "fusion_make_3d_package",+ "status": "MANUAL",+ "why": "cloud upload; run in release rehearsals",+ "section": "gui-driving"+ },+ {+ "verb": "fusion_build_library_3d",+ "status": "MANUAL",+ "why": "long multi-part build; release rehearsals",+ "section": "gui-driving"+ },+ {+ "verb": "fusion_cleanup_cloud_files#guard",+ "status": "PASS",+ "why": "",+ "sec": 0.2,+ "section": "aps"+ },+ {+ "verb": "fusion_cleanup_cloud_files",+ "status": "MANUAL",+ "why": "real cleanup takes explicit lineage urns; used by weekly build rehearsals",+ "section": "aps"+ },+ {+ "verb": "fusion_new_electronics_from_eagle",+ "status": "MANUAL",+ "why": "drives native dialogs",+ "section": "gui-driving"+ },+ {+ "verb": "fusion_screenshot_fusion",+ "status": "PASS",+ "why": "",+ "sec": 6.2,+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_state",+ "status": "PASS",+ "why": "",+ "sec": 7.2,+ "section": "gui-driving"+ },+ {+ "verb": "fusion_demo_progress#unknown",+ "status": "PASS",+ "why": "",+ "sec": 0.1,+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_stop",+ "status": "MANUAL",+ "why": "lifecycle/human-wall verbs; manual tier",+ "section": "gui-driving"+ },+ {+ "verb": "fusion_kill",+ "status": "MANUAL",+ "why": "lifecycle/human-wall verbs; manual tier",+ "section": "gui-driving"+ },+ {+ "verb": "fusion_signin",+ "status": "MANUAL",+ "why": "lifecycle/human-wall verbs; manual tier",+ "section": "gui-driving"+ },+ {+ "verb": "fusion_signin_2fa",+ "status": "MANUAL",+ "why": "lifecycle/human-wall verbs; manual tier",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_demo",+ "status": "MANUAL",+ "why": "lifecycle/human-wall verbs; manual tier",+ "section": "gui-driving"+ },+ {+ "verb": "fusion_install_fusion",+ "status": "MANUAL",+ "why": "lifecycle/human-wall verbs; manual tier",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_notify_owner",+ "status": "MANUAL",+ "why": "lifecycle/human-wall verbs; manual tier",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "fusion_open_by_urn_note",+ "status": "MANUAL",+ "why": "lifecycle/human-wall verbs; manual tier",+ "section": "bridge-lifecycle"+ },+ {+ "verb": "focus_invariance",+ "status": "PASS",+ "why": "",+ "section": "gui-driving"+ }+ ],+ "durationSec": 198.1+}
tools/abrun.pyadded+50@@ -0,0 +1,50 @@+"""Run a shell command on the box via ab, PowerShell-etiquette compliant.++John's rules (2026-08-15): shell commands driven through the bridge must (1) always+exit with a real exit code, and (2) NEVER blip a console window into the user's+foreground. So:+- PowerShell goes through run_script (base64 script -> temp .ps1, no shell-string+ parsing) with -NoProfile -NonInteractive semantics and an explicit `exit $LASTEXITCODE`+ appended, instead of shell_execute'ing a `powershell -Command` one-liner.+- cmd one-liners keep shell_execute but should be rare; prefer the bridge's own file+ verbs (read_file/write_file/pull_file) which spawn nothing at all.++Usage: python3 tools/abrun.py <command> [reason] [--ps]+ --ps treat <command> as a PowerShell SCRIPT body (run_script path)+"""+import base64+import json+import subprocess+import sys++args = [a for a in sys.argv[1:] if a != "--ps"]+use_ps = "--ps" in sys.argv[1:]+cmd = args[0]+reason = args[1] if len(args) > 1 else "fusion-bridge maintenance"++if use_ps:+ script = cmd.rstrip() + "\nexit $LASTEXITCODE\n"+ payload = json.dumps({+ "interpreter": "powershell",+ "scriptBase64": base64.b64encode(script.encode()).decode(),+ "reason": reason,+ })+ verb = "run_script"+else:+ payload = json.dumps({"command": cmd, "reason": reason})+ verb = "shell_execute"++p = subprocess.run(["adom-bridge-cli", "--target", "AdomLapper",+ "--ai-thread", "fusion-bridge maintenance", verb, payload],+ capture_output=True, text=True, timeout=180)+try:+ d = json.loads(p.stdout)+ data = d.get("data") or d+ rc = data.get("exitCode")+ print((data.get("stdout") or data.get("stderr") or "(empty)").strip()[:6000])+ if rc not in (0, None):+ print(f"[exitCode {rc}]", file=sys.stderr)+ sys.exit(int(rc) if isinstance(rc, int) and 0 < rc < 256 else 1)+except Exception:+ print(p.stdout[:400] or p.stderr[:400])+ sys.exit(1)
tools/release-files.txt+1−1@@ -1,6 +1,6 @@ BRIDGE_VERSION LICENSE-ad_client.py+ab_client.py library_bundle.py addin/AdomBridge/AdomBridge.manifest addin/AdomBridge/AdomBridge.py