component
FT232HL-REEL
Public Made by Adomby adom
FTDI USB Converters, LQFP-48(7x7). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+374−8@@ -1,13 +1,384 @@ {+ "schema_version": 1,+ "type": "component", "slug": "ft232hl-reel",+ "title": "FT232HL-REEL",+ "brief": "FTDI USB Converters, LQFP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "FTDI USB Converters, LQFP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "interface", "ft232hl-reel" ],+ "component": {+ "mpn": "FT232HL-REEL",+ "manufacturer": "FTDI",+ "package": "LQFP-48(7x7)",+ "pin_count": 48,+ "category": "Interface",+ "subcategory": "USB Converters",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/399319f3264f4fe2b32da5617add55e3.pdf",+ "parts": {+ "symbol": "ft232hl-reel.kicad_sym",+ "footprint": "ft232hl-reel.kicad_mod",+ "model_3d": "ft232hl-reel.glb",+ "model_3d_step": "ft232hl-reel.step",+ "lbr": "ft232hl-reel.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "OSCI",+ "type": "input",+ "description": "Oscillator input. Connect the 12 MHz crystal reference across OSCI/OSCO (with load caps), or drive from an external clock source."+ },+ {+ "number": "2",+ "name": "OSCO",+ "type": "output",+ "description": "Oscillator output for the 12 MHz crystal. Connect to the far side of the crystal with its load capacitor to GND; leave floating when using an external clock on OSCI."+ },+ {+ "number": "3",+ "name": "VPHY",+ "type": "power_in",+ "description": "+3.3V input, internal USB PHY supply. Must NOT be connected directly to the USB VBUS supply; use a 3.3V regulator and filter with an LC filter (see section 6.1)."+ },+ {+ "number": "4",+ "name": "AGND",+ "type": "power_in",+ "description": "0V analog ground. Tie all AGND pins to the board ground plane."+ },+ {+ "number": "5",+ "name": "REF",+ "type": "passive",+ "description": "Analog current reference. Connect a 12K\u03a9 1% resistor from this pin to GND to set the internal bias current."+ },+ {+ "number": "6",+ "name": "DM",+ "type": "bidirectional",+ "description": "USB 2.0 differential data signal minus (D-). Connect to the USB connector D- through the recommended series/EMI network."+ },+ {+ "number": "7",+ "name": "DP",+ "type": "bidirectional",+ "description": "USB 2.0 differential data signal plus (D+). Connect to the USB connector D+ through the recommended series/EMI network."+ },+ {+ "number": "8",+ "name": "VPLL",+ "type": "power_in",+ "description": "+3.3V input, internal PLL supply. Recommended to be filtered with an LC filter from the same 3.3V rail as VPHY (see section 6.1)."+ },+ {+ "number": "9",+ "name": "AGND",+ "type": "power_in",+ "description": "0V analog ground."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "0V digital ground."+ },+ {+ "number": "11",+ "name": "GND",+ "type": "power_in",+ "description": "0V digital ground."+ },+ {+ "number": "12",+ "name": "VCCIO",+ "type": "power_in",+ "description": "+3.3V I/O interface power supply input. Sets the output voltage level for all ADBUS and ACBUS pins."+ },+ {+ "number": "13",+ "name": "ADBUS0",+ "type": "bidirectional",+ "description": "Bus A bit 0. Default UART: TXD (async serial transmit). Reconfigurable to D0 (FT245 sync/async FIFO, bit-bang, CPU FIFO), TCK/SK (MPSSE JTAG/SPI clock), FSDI (fast serial data in) or MIOSI0 (FT1248)."+ },+ {+ "number": "14",+ "name": "ADBUS1",+ "type": "bidirectional",+ "description": "Bus A bit 1. Default UART: RXD (async serial receive). Reconfigurable to D1 (FIFO/bit-bang), TDI/DO (MPSSE), FSCLK (fast serial clock) or MIOSI1 (FT1248)."+ },+ {+ "number": "15",+ "name": "ADBUS2",+ "type": "bidirectional",+ "description": "Bus A bit 2. Default UART: RTS# (request-to-send, active low). Reconfigurable to D2, TDO/DI (MPSSE), FSDO or MIOSI2 (FT1248)."+ },+ {+ "number": "16",+ "name": "ADBUS3",+ "type": "bidirectional",+ "description": "Bus A bit 3. Default UART: CTS# (clear-to-send input, active low). Reconfigurable to D3, TMS/CS (MPSSE), FSCTS or MIOSI3 (FT1248)."+ },+ {+ "number": "17",+ "name": "ADBUS4",+ "type": "bidirectional",+ "description": "Bus A bit 4. Default UART: DTR# (data-terminal-ready output, active low). Reconfigurable to D4, GPIOL0 (MPSSE), fast-serial TriSt-UP, or MIOSI4 (FT1248)."+ },+ {+ "number": "18",+ "name": "ADBUS5",+ "type": "bidirectional",+ "description": "Bus A bit 5. Default UART: DSR# (data-set-ready input, active low). Reconfigurable to D5, GPIOL1 (MPSSE), TriSt-UP or MIOSI5 (FT1248)."+ },+ {+ "number": "19",+ "name": "ADBUS6",+ "type": "bidirectional",+ "description": "Bus A bit 6. Default UART: DCD# (data-carrier-detect input, active low). Reconfigurable to D6, GPIOL2 (MPSSE), TriSt-UP or MIOSI6 (FT1248)."+ },+ {+ "number": "20",+ "name": "ADBUS7",+ "type": "bidirectional",+ "description": "Bus A bit 7. Default UART: RI# (ring indicator input, active low). Taking RI# low can wake the PC USB host from suspend when remote wake-up is enabled in EEPROM. Reconfigurable to D7, GPIOL3 (MPSSE) or MIOSI7 (FT1248)."+ },+ {+ "number": "21",+ "name": "ACBUS0",+ "type": "bidirectional",+ "description": "Configurable ACBUS I/O pin. Default TXDEN (RS485 driver enable) when EEPROM sets that option, otherwise TriState with 75K\u03a9 pull-up to VCCIO. EEPROM-selectable to PWREN#, TXLED#, RXLED#, TX&RXLED#, SLEEP#, CLK30/15/7.5, DRIVE0/1 (see Table 3.5)."+ },+ {+ "number": "22",+ "name": "GND",+ "type": "power_in",+ "description": "0V digital ground."+ },+ {+ "number": "23",+ "name": "GND",+ "type": "power_in",+ "description": "0V digital ground."+ },+ {+ "number": "24",+ "name": "VCCIO",+ "type": "power_in",+ "description": "+3.3V I/O interface power supply input. Sets output level for the ADBUS/ACBUS pins on this side of the die."+ },+ {+ "number": "25",+ "name": "ACBUS1",+ "type": "bidirectional",+ "description": "Configurable ACBUS I/O pin. Default tri-state input with 75K\u03a9 pull-up to VCCIO; commonly used for TXE#, WRSTB#, GPIOH1, A0 (CPU FIFO) or SS_n (FT1248). EEPROM-selectable to any ACBUS signal in Table 3.5."+ },+ {+ "number": "26",+ "name": "ACBUS2",+ "type": "bidirectional",+ "description": "Configurable ACBUS I/O pin. Default tri-state input with 75K\u03a9 pull-up to VCCIO; RD#, RDSTB#, GPIOH2 or MISO (FT1248) in the various modes. EEPROM-selectable to any ACBUS signal in Table 3.5."+ },+ {+ "number": "27",+ "name": "ACBUS3",+ "type": "bidirectional",+ "description": "Configurable ACBUS I/O pin. Default RXLED# when EEPROM selects it, else tri-state pull-up. In other modes: WR#, GPIOH3 or ACBUS3 (FT1248)."+ },+ {+ "number": "28",+ "name": "ACBUS4",+ "type": "bidirectional",+ "description": "Configurable ACBUS I/O pin. Default TXLED# when EEPROM selects it, else SIWU# (Send-Immediate/Wake-Up input) in most FIFO/serial modes, or GPIOH4 in MPSSE."+ },+ {+ "number": "29",+ "name": "ACBUS5",+ "type": "bidirectional",+ "description": "Configurable ACBUS I/O pin. In Sync FIFO mode: CLKOUT (60 MHz FIFO clock output). Otherwise tri-state pull-up input or GPIOH5 (MPSSE)."+ },+ {+ "number": "30",+ "name": "ACBUS6",+ "type": "bidirectional",+ "description": "Configurable ACBUS I/O pin. In Sync FIFO mode: OE# (output enable, active low). Otherwise tri-state pull-up input or GPIOH6 (MPSSE)."+ },+ {+ "number": "31",+ "name": "ACBUS7",+ "type": "bidirectional",+ "description": "Configurable ACBUS I/O pin. Default PWRSAV# / PWRSAV# in most modes, or WRSAV# (UART) / GPIOH7 (MPSSE). Defaults to GPIO line with an internal 75K\u03a9 pull-down to GND (can be switched to USBVCC mode via EEPROM)."+ },+ {+ "number": "32",+ "name": "ACBUS8",+ "type": "bidirectional",+ "description": "Configurable ACBUS I/O pin. Default tri-state input with 75K\u03a9 pull-up to VCCIO; EEPROM-selectable to any ACBUS signal in Table 3.5 (bit-bang capable)."+ },+ {+ "number": "33",+ "name": "ACBUS9",+ "type": "bidirectional",+ "description": "Configurable ACBUS I/O pin. Default tri-state input with 75K\u03a9 pull-up to VCCIO; EEPROM-selectable to any ACBUS signal in Table 3.5 (bit-bang capable)."+ },+ {+ "number": "34",+ "name": "RESET#",+ "type": "input",+ "description": "Chip reset input, active low. Tie to VCCIO through a pull-up (typically 10K\u03a9) or leave high for normal operation."+ },+ {+ "number": "35",+ "name": "GND",+ "type": "power_in",+ "description": "0V digital ground."+ },+ {+ "number": "36",+ "name": "GND",+ "type": "power_in",+ "description": "0V digital ground."+ },+ {+ "number": "37",+ "name": "VCCA",+ "type": "power_out",+ "description": "+1.8V LDO output for the analog core. Do not use as a supply for external circuitry; terminate with a 0.1uF ceramic capacitor to GND."+ },+ {+ "number": "38",+ "name": "VCCCORE",+ "type": "power_out",+ "description": "+1.8V LDO output for the digital core. Do not use as a supply for external circuitry; terminate with a 0.1uF ceramic capacitor to GND."+ },+ {+ "number": "39",+ "name": "VCCD",+ "type": "bidirectional",+ "description": "+3.3V output OR input. If VREGIN (pin 40) is driven at +5.0V, VCCD becomes an LDO OUTPUT (~3.3V, decouple with 0.1uF/4.7uF). If VREGIN is driven at +3.3V, VCCD becomes an INPUT that must be tied to the 3.3V rail."+ },+ {+ "number": "40",+ "name": "VREGIN",+ "type": "power_in",+ "description": "+5.0V or +3.3V power supply input to the internal LDO. Feed from the USB VBUS (via a bulk cap) in bus-powered designs, or from a regulated 3.3V rail in self-powered designs."+ },+ {+ "number": "41",+ "name": "AGND",+ "type": "power_in",+ "description": "0V analog ground."+ },+ {+ "number": "42",+ "name": "TEST",+ "type": "input",+ "description": "IC test pin. Must be tied to GND for normal operation; leaving it floating puts the FT232H into a factory test mode."+ },+ {+ "number": "43",+ "name": "EEDATA",+ "type": "bidirectional",+ "description": "Serial data to/from the external 93C46/93C56/93C66 EEPROM. Connect directly to the EEPROM DI pin AND to DO through a 2.2K\u03a9 series resistor; also pull DO up to VCCD with 10K\u03a9. Tri-stated during device reset."+ },+ {+ "number": "44",+ "name": "EECLK",+ "type": "output",+ "description": "Clock output to the external EEPROM (SK pin). Tri-stated during device reset; drives the EEPROM SPI clock otherwise."+ },+ {+ "number": "45",+ "name": "EECS",+ "type": "bidirectional",+ "description": "EEPROM chip-select output (SPI CS). Tri-stated during device reset. If no EEPROM is fitted the FT232H uses its default USB descriptors."+ },+ {+ "number": "46",+ "name": "VCCIO",+ "type": "power_in",+ "description": "+3.3V I/O interface power supply input. Decouple with 0.1uF to GND."+ },+ {+ "number": "47",+ "name": "GND",+ "type": "power_in",+ "description": "0V digital ground."+ },+ {+ "number": "48",+ "name": "GND",+ "type": "power_in",+ "description": "0V digital ground."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/399319f3264f4fe2b32da5617add55e3.pdf",+ "pages": 65,+ "sha256": "7976683a05f00181",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 48,+ "described": 48,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "FTDI",+ "Package": "LQFP-48(7x7)",+ "Category": "Interface",+ "Pins": "48"+ }+ },+ "variants": [+ {+ "mpn": "FT232HL-Reel",+ "kind": "packaging"+ },+ {+ "mpn": "FT232HL-Tray",+ "kind": "unknown"+ },+ {+ "mpn": "FT232HQ-Reel",+ "kind": "unknown"+ },+ {+ "mpn": "FT232HQ-Tray",+ "kind": "unknown"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "ft232hl-reel"+ ],+ "discovery_pitch": "FT232HL-REEL (FTDI) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +396,5 @@ "docs/ft232hl-reel-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }