component
FP6381AS5CTR
Public Made by Adomby adom
Fitipower Integrated Tech DC-DC Converters, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C148091). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+26−6
fp6381as5ctr.lbr+20−2@@ -59,6 +59,18 @@ <smd name="3" x="-1.1375" y="-0.9500" dx="1.3250" dy="0.6000" layer="1"/> <smd name="4" x="1.1375" y="-0.9500" dx="1.3250" dy="0.6000" layer="1"/> <smd name="5" x="1.1375" y="0.9500" dx="1.3250" dy="0.6000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-1.4500" y="1.5100"/>+ <vertex x="-1.6900" y="1.8400"/>+ <vertex x="-1.2100" y="1.8400"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-0.4000" y="1.4500"/>+ <vertex x="0.8000" y="1.4500"/>+ <vertex x="0.8000" y="-1.4500"/>+ <vertex x="-0.8000" y="-1.4500"/>+ <vertex x="-0.8000" y="1.0500"/>+ </polygon> <wire x1="-0.9100" y1="1.5600" x2="0.9100" y2="1.5600" width="0.1200" layer="21"/> <wire x1="-0.9100" y1="1.5100" x2="-0.9100" y2="1.5600" width="0.1200" layer="21"/> <wire x1="-0.9100" y1="-1.5600" x2="-0.9100" y2="-1.5100" width="0.1200" layer="21"/>@@ -68,7 +80,7 @@ <wire x1="0.9100" y1="-1.5600" x2="-0.9100" y2="-1.5600" width="0.1200" layer="21"/> <text x="0" y="2.212" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-2.212" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-1.4500" y="1.5100"/><vertex x="-1.6900" y="1.8400"/><vertex x="-1.2100" y="1.8400"/></polygon></package>+</package> </packages> <symbols> <symbol name="FP6381AS5CTR">@@ -100,7 +112,13 @@ <connect gate="G$1" pin="FB" pad="5"/> <connect gate="G$1" pin="VIN" pad="4"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="FP6381AS5CTR" constant="no"/>+ <attribute name="MANUFACTURER" value="Fitipower Integrated Tech" constant="no"/>+ <attribute name="LCSC_PN" value="C148091" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>
page.json+6−4@@ -26,7 +26,9 @@ "model_3d_step": "fp6381as5ctr.step", "lbr": "fp6381as5ctr.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C148091"+ }, "pins": [ { "number": "1",@@ -44,19 +46,19 @@ "number": "3", "name": "LX", "type": "output",- "description": "Power switching output node. Connect the external inductor between LX and the output filter capacitor. Rated to VIN+0.3V max. Internal 100Ω discharge resistance when disabled."+ "description": "Power switching output node. Connect the external inductor between LX and the output filter capacitor. Rated to VIN+0.3V max. Internal 100\u03a9 discharge resistance when disabled." }, { "number": "4", "name": "VIN", "type": "power_in",- "description": "Power supply input pin, 2.5V to 6V operating range (6.5V absolute max). Place input decoupling capacitor (e.g. 4.7µF MLCC) as close as possible from VIN to GND to minimize noise."+ "description": "Power supply input pin, 2.5V to 6V operating range (6.5V absolute max). Place input decoupling capacitor (e.g. 4.7\u00b5F MLCC) as close as possible from VIN to GND to minimize noise." }, { "number": "5", "name": "FB", "type": "input",- "description": "Voltage feedback input pin. Connect FB to VOUT through a resistive divider; the internal error amplifier regulates FB to VREF = 0.6V (typ, 0.588V-0.612V). Input leakage <= 1µA."+ "description": "Voltage feedback input pin. Connect FB to VOUT through a resistive divider; the internal error amplifier regulates FB to VREF = 0.6V (typ, 0.588V-0.612V). Input leakage <= 1\u00b5A." } ], "provenance": {