component
FM25CL64B-GTR
Public Made by Adomby adom
Infineon FRAM, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+116−8@@ -1,13 +1,126 @@ {+ "schema_version": 1,+ "type": "component", "slug": "fm25cl64b-gtr",+ "title": "FM25CL64B-GTR",+ "brief": "Infineon FRAM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Infineon FRAM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "memory", "fm25cl64b-gtr" ],+ "component": {+ "mpn": "FM25CL64B-GTR",+ "manufacturer": "Infineon",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Memory",+ "subcategory": "FRAM",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/dc6c1cf04e7c4f23ac673c6696435ee2.pdf",+ "parts": {+ "symbol": "fm25cl64b-gtr.kicad_sym",+ "footprint": "fm25cl64b-gtr.kicad_mod",+ "model_3d": "fm25cl64b-gtr.glb",+ "model_3d_step": "fm25cl64b-gtr.step",+ "lbr": "fm25cl64b-gtr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "CS",+ "type": "input",+ "description": "Chip Select (active LOW). When HIGH, the device enters low-power standby mode, ignores other inputs, and tri-states the output. A falling edge on CS internally activates the SCK signal and must occur before every opcode."+ },+ {+ "number": "2",+ "name": "SO",+ "type": "output",+ "description": "Serial Output (MISO). Driven during a read and tri-stated at all other times, including when HOLD is LOW. Data transitions on the falling edge of SCK."+ },+ {+ "number": "3",+ "name": "WP",+ "type": "input",+ "description": "Write Protect (active LOW). Prevents write operations to the Status Register when WPEN=1. Must be tied to VDD if not used."+ },+ {+ "number": "4",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference for the device. Must be connected to system ground."+ },+ {+ "number": "5",+ "name": "SI",+ "type": "input",+ "description": "Serial Input (MOSI). All data is input on this pin, sampled on the rising edge of SCK. Should always be driven to a valid logic level to meet IDD specs. May be tied to SO for a single-pin data interface."+ },+ {+ "number": "6",+ "name": "SCK",+ "type": "input",+ "description": "Serial Clock. All I/O activity is synchronized to this clock. Inputs are latched on the rising edge and outputs occur on the falling edge. Clock frequency 0 to 20 MHz; may be interrupted at any time."+ },+ {+ "number": "7",+ "name": "HOLD",+ "type": "input",+ "description": "HOLD (active LOW). When LOW, suspends the current SPI operation; device ignores transitions on SCK and CS. Transitions must occur while SCK is LOW. Must be tied to VDD if not used."+ },+ {+ "number": "8",+ "name": "VDD",+ "type": "power_in",+ "description": "Power supply input to the device. Operating range 2.7 V to 3.65 V."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/dc6c1cf04e7c4f23ac673c6696435ee2.pdf",+ "pages": 21,+ "sha256": "7c6df2f70b3e907d",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Infineon",+ "Package": "SOIC-8",+ "Category": "Memory",+ "Pins": "8"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "fm25cl64b-gtr"+ ],+ "discovery_pitch": "FM25CL64B-GTR (Infineon) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +138,5 @@ "docs/fm25cl64b-gtr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }