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Set visibility: public

Ray ·e697c7a3c1 · ·parent 8c37fa1
1 file changed +12−9
page.json+12−9
@@ -38,7 +38,7 @@         "number": "2",         "name": "XOUT",         "type": "output",-        "description": "12MHz crystal oscillator output. Connects to one terminal of the 12MHz crystal (16-20pF load, 50\u03a9 ESR max, \u00b150ppm)."+        "description": "12MHz crystal oscillator output. Connects to one terminal of the 12MHz crystal (16-20pF load, 50Ω ESR max, ±50ppm)."       },       {         "number": "3",@@ -110,7 +110,7 @@         "number": "14",         "name": "REXT",         "type": "passive",-        "description": "External bias resistor pin. Connect a 2.7k\u03a9 \u00b11% resistor to VSS to establish the internal bias reference."+        "description": "External bias resistor pin. Connect a 2.7kΩ ±1% resistor to VSS to establish the internal bias reference."       },       {         "number": "15",@@ -122,13 +122,13 @@         "number": "16",         "name": "DPU",         "type": "bidirectional",-        "description": "USB Upstream Facing Port D+ (differential plus). Includes integrated 1.5k\u03a9 upstream pull-up."+        "description": "USB Upstream Facing Port D+ (differential plus). Includes integrated 1.5kΩ upstream pull-up."       },       {         "number": "17",         "name": "XRSTJ",         "type": "input",-        "description": "Active-low external reset. Pull up to 3.3V for normal operation; the internal POR handles power-up. To force a reset, drive low for at least 10\u03bcs. Schmitt-trigger, 5V-tolerant."+        "description": "Active-low external reset. Pull up to 3.3V for normal operation; the internal POR handles power-up. To force a reset, drive low for at least 10μs. Schmitt-trigger, 5V-tolerant."       },       {         "number": "18",@@ -146,13 +146,13 @@         "number": "20",         "name": "VDD5",         "type": "power_in",-        "description": "5V power input to the integrated 5V\u21923.3V regulator. Leave No-Connection if an external 3.3V source is used on VD33F."+        "description": "5V power input to the integrated 5V→3.3V regulator. Leave No-Connection if an external 3.3V source is used on VD33F."       },       {         "number": "21",         "name": "VD33F",         "type": "power_in",-        "description": "3.3V rail - filter capacitor pin for the embedded 5V\u21923.3V regulator, or 3.3V input from an external source when VDD5 is unused."+        "description": "3.3V rail - filter capacitor pin for the embedded 5V→3.3V regulator, or 3.3V input from an external source when VDD5 is unused."       },       {         "number": "22",@@ -164,7 +164,7 @@         "number": "23",         "name": "LED1/EESCL",         "type": "bidirectional",-        "description": "LED indicator for Ports 1 and 3 (or joint indicator when LED2/JLEDEN is strapped high at POR). Also functions as the external EEPROM I\u00b2C clock (SCL). I/O with 8mA drive strength."+        "description": "LED indicator for Ports 1 and 3 (or joint indicator when LED2/JLEDEN is strapped high at POR). Also functions as the external EEPROM I²C clock (SCL). I/O with 8mA drive strength."       },       {         "number": "24",@@ -188,7 +188,7 @@         "number": "27",         "name": "TESTJ/EESDA",         "type": "bidirectional",-        "description": "Active-low test-mode enable at POR (factory test only - leave No-Connection in end applications) or external EEPROM I\u00b2C serial data (SDA). Open-drain output with internal pull-up, 4mA sink."+        "description": "Active-low test-mode enable at POR (factory test only - leave No-Connection in end applications) or external EEPROM I²C serial data (SDA). Open-drain output with internal pull-up, 4mA sink."       },       {         "number": "28",@@ -258,5 +258,8 @@     "docs/fe1-1s-bsop28bcn-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file