component
FE1.1S-BSOP28BCN
Public Made by Adomby adom
Terminus Tech FE1 1S BSOP28BCN USB Converters, SSOP-28-150mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C9359). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+31−11
fe1-1s-bsop28bcn.lbr+20−2@@ -82,6 +82,18 @@ <smd name="26" x="3.5000" y="2.9250" dx="1.9000" dy="0.4000" layer="1"/> <smd name="27" x="3.5000" y="3.5750" dx="1.9000" dy="0.4000" layer="1"/> <smd name="28" x="3.5000" y="4.2250" dx="1.9000" dy="0.4000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-3.5000" y="4.6900"/>+ <vertex x="-3.8400" y="5.1600"/>+ <vertex x="-3.1600" y="5.1600"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-1.6500" y="5.1000"/>+ <vertex x="2.6500" y="5.1000"/>+ <vertex x="2.6500" y="-5.1000"/>+ <vertex x="-2.6500" y="-5.1000"/>+ <vertex x="-2.6500" y="4.1000"/>+ </polygon> <wire x1="-2.7600" y1="5.2100" x2="2.7600" y2="5.2100" width="0.1200" layer="21"/> <wire x1="-2.7600" y1="4.6850" x2="-2.7600" y2="5.2100" width="0.1200" layer="21"/> <wire x1="-2.7600" y1="-5.2100" x2="-2.7600" y2="-4.6850" width="0.1200" layer="21"/>@@ -90,7 +102,7 @@ <wire x1="2.7600" y1="-5.2100" x2="-2.7600" y2="-5.2100" width="0.1200" layer="21"/> <text x="0" y="5.810" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-5.810" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-3.5000" y="4.6900"/><vertex x="-3.8400" y="5.1600"/><vertex x="-3.1600" y="5.1600"/></polygon></package>+</package> </packages> <symbols> <symbol name="FE1.1S-BSOP28BCN">@@ -168,7 +180,13 @@ <connect gate="G$1" pin="DPU" pad="16"/> <connect gate="G$1" pin="DMU" pad="15"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="FE1.1S-BSOP28BCN" constant="no"/>+ <attribute name="MANUFACTURER" value="Terminus Tech FE1 1S BSOP28BCN" constant="no"/>+ <attribute name="LCSC_PN" value="C9359" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>
page.json+11−9@@ -26,7 +26,9 @@ "model_3d_step": "fe1-1s-bsop28bcn.step", "lbr": "fe1-1s-bsop28bcn.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C9359"+ }, "pins": [ { "number": "1",@@ -38,7 +40,7 @@ "number": "2", "name": "XOUT", "type": "output",- "description": "12MHz crystal oscillator output. Connects to one terminal of the 12MHz crystal (16-20pF load, 50Ω ESR max, ±50ppm)."+ "description": "12MHz crystal oscillator output. Connects to one terminal of the 12MHz crystal (16-20pF load, 50\u03a9 ESR max, \u00b150ppm)." }, { "number": "3",@@ -110,7 +112,7 @@ "number": "14", "name": "REXT", "type": "passive",- "description": "External bias resistor pin. Connect a 2.7kΩ ±1% resistor to VSS to establish the internal bias reference."+ "description": "External bias resistor pin. Connect a 2.7k\u03a9 \u00b11% resistor to VSS to establish the internal bias reference." }, { "number": "15",@@ -122,13 +124,13 @@ "number": "16", "name": "DPU", "type": "bidirectional",- "description": "USB Upstream Facing Port D+ (differential plus). Includes integrated 1.5kΩ upstream pull-up."+ "description": "USB Upstream Facing Port D+ (differential plus). Includes integrated 1.5k\u03a9 upstream pull-up." }, { "number": "17", "name": "XRSTJ", "type": "input",- "description": "Active-low external reset. Pull up to 3.3V for normal operation; the internal POR handles power-up. To force a reset, drive low for at least 10μs. Schmitt-trigger, 5V-tolerant."+ "description": "Active-low external reset. Pull up to 3.3V for normal operation; the internal POR handles power-up. To force a reset, drive low for at least 10\u03bcs. Schmitt-trigger, 5V-tolerant." }, { "number": "18",@@ -146,13 +148,13 @@ "number": "20", "name": "VDD5", "type": "power_in",- "description": "5V power input to the integrated 5V→3.3V regulator. Leave No-Connection if an external 3.3V source is used on VD33F."+ "description": "5V power input to the integrated 5V\u21923.3V regulator. Leave No-Connection if an external 3.3V source is used on VD33F." }, { "number": "21", "name": "VD33F", "type": "power_in",- "description": "3.3V rail - filter capacitor pin for the embedded 5V→3.3V regulator, or 3.3V input from an external source when VDD5 is unused."+ "description": "3.3V rail - filter capacitor pin for the embedded 5V\u21923.3V regulator, or 3.3V input from an external source when VDD5 is unused." }, { "number": "22",@@ -164,7 +166,7 @@ "number": "23", "name": "LED1/EESCL", "type": "bidirectional",- "description": "LED indicator for Ports 1 and 3 (or joint indicator when LED2/JLEDEN is strapped high at POR). Also functions as the external EEPROM I²C clock (SCL). I/O with 8mA drive strength."+ "description": "LED indicator for Ports 1 and 3 (or joint indicator when LED2/JLEDEN is strapped high at POR). Also functions as the external EEPROM I\u00b2C clock (SCL). I/O with 8mA drive strength." }, { "number": "24",@@ -188,7 +190,7 @@ "number": "27", "name": "TESTJ/EESDA", "type": "bidirectional",- "description": "Active-low test-mode enable at POR (factory test only - leave No-Connection in end applications) or external EEPROM I²C serial data (SDA). Open-drain output with internal pull-up, 4mA sink."+ "description": "Active-low test-mode enable at POR (factory test only - leave No-Connection in end applications) or external EEPROM I\u00b2C serial data (SDA). Open-drain output with internal pull-up, 4mA sink." }, { "number": "28",