← Commit history

Initial commit: component/fdv301n

Ray ·15e08879e6 ·1mo ago
2 files changed +152
README.mdadded+39
@@ -0,0 +1,39 @@+# FDV301N++**onsemi** · MOSFETs · SOT-23++FDV301N from onsemi, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | G | input | Gate; logic-level drive, VGS(th) 0.70-1.06 V, max VGSS ±8 V, gate-source Zener for ESD ruggedness (>6 kV HBM). |+| 2 | S | passive | Source; body-diode anode, continuous diode forward current IS = 0.29 A, VSD = 0.8-1.2 V at IS = 0.29 A. |+| 3 | D | passive | Drain; VDSS = 25 V, ID continuous = 0.22 A (0.5 A peak), RDS(on) = 5 Ω max at VGS = 2.7 V / 4 Ω max at VGS = 4.5 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOT-23 |+| Category | Transistors/Thyristors |+| Pins | 3 |++## CAD (KiCad official)++- Symbol: `FDV301N`+- Footprint: `Package_TO_SOT_SMD:SOT-23`+- 3D model: SOT-23 (KiCad packages3D, STEP)+- 3D model files: `fdv301n-etched.step` / `fdv301n-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fdv301n.step` / `fdv301n.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586172171408719872) (5 pp, sha256 `61444360dd8a9c01`, retrieved 2026-09-17, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-sonnet-4-6` (text+vision), consensus `claude-opus-4-7` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/fdv301n-datasheet.pdf)
page.jsonadded+113
@@ -0,0 +1,113 @@+{+  "slug": "fdv301n",+  "version": "0.1.0",+  "type": "component",+  "description": "onsemi MOSFETs, SOT-23. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "transistors-thyristors",+    "fdv301n",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "fdv301n.kicad_sym",+    "fdv301n.kicad_mod",+    "fdv301n.glb",+    "fdv301n.step",+    "fdv301n.lbr",+    "docs/hero.png",+    "docs/fdv301n-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "FDV301N",+    "manufacturer": "onsemi",+    "package": "SOT-23",+    "pin_count": 3,+    "category": "Transistors/Thyristors",+    "subcategory": "MOSFETs",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586172171408719872",+    "parts": {+      "symbol": "fdv301n.kicad_sym",+      "footprint": "fdv301n.kicad_mod",+      "model_3d": "fdv301n-etched.glb",+      "model_3d_plain": "fdv301n.glb",+      "model_3d_step": "fdv301n-etched.step",+      "model_3d_step_plain": "fdv301n.step",+      "lbr": "fdv301n.lbr"+    },+    "distributor_links": {+      "lcsc": "C15310"+    },+    "pins": [+      {+        "number": "1",+        "name": "G",+        "type": "input",+        "description": "Gate; logic-level drive, VGS(th) 0.70-1.06 V, max VGSS ±8 V, gate-source Zener for ESD ruggedness (>6 kV HBM)."+      },+      {+        "number": "2",+        "name": "S",+        "type": "passive",+        "description": "Source; body-diode anode, continuous diode forward current IS = 0.29 A, VSD = 0.8-1.2 V at IS = 0.29 A."+      },+      {+        "number": "3",+        "name": "D",+        "type": "passive",+        "description": "Drain; VDSS = 25 V, ID continuous = 0.22 A (0.5 A peak), RDS(on) = 5 Ω max at VGS = 2.7 V / 4 Ω max at VGS = 4.5 V."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-sonnet-4-6",+        "primary_mode": "text+vision",+        "consensus_model": "claude-opus-4-7",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "vision extraction: provenance cannot be text-verified; needs consensus"+        ],+        "pages_sent": 5,+        "cost_usd": 0.2055,+        "at": "2026-09-17T22:19:50"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586172171408719872",+        "pages": 5,+        "sha256": "61444360dd8a9c01",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 3,+        "described": 3,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file