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Set visibility: public

Ray ·b71bd8a1c7 ·4d ago ·parent ae3f597
1 file changed +8−5
page.json+8−5
@@ -95,7 +95,7 @@         "number": "8",         "name": "A3/C5/VDAC",         "type": "input",-        "description": "ADC-A input 3 / ADC-C input 5 / Optional external reference voltage for on-chip CMPSS DAC, requires minimum 1\u00b5F capacitor when used as DAC reference"+        "description": "ADC-A input 3 / ADC-C input 5 / Optional external reference voltage for on-chip CMPSS DAC, requires minimum 1µF capacitor when used as DAC reference"       },       {         "number": "9",@@ -143,7 +143,7 @@         "number": "16",         "name": "VREFHI",         "type": "input",-        "description": "ADC high reference voltage, place minimum 2.2\u00b5F capacitor between VREFHI and VREFLO close to device"+        "description": "ADC high reference voltage, place minimum 2.2µF capacitor between VREFHI and VREFLO close to device"       },       {         "number": "17",@@ -179,7 +179,7 @@         "number": "22",         "name": "VDDA",         "type": "power_in",-        "description": "3.3V analog power supply pin, place minimum 2.2\u00b5F decoupling capacitor on each pin"+        "description": "3.3V analog power supply pin, place minimum 2.2µF decoupling capacitor on each pin"       },       {         "number": "23",@@ -275,7 +275,7 @@         "number": "38",         "name": "TMS",         "type": "bidirectional",-        "description": "JTAG test mode select with internal pull-up resistor; recommended 2.2k\u03a9 external pull-up to VDDIO for normal operation"+        "description": "JTAG test mode select with internal pull-up resistor; recommended 2.2kΩ external pull-up to VDDIO for normal operation"       },       {         "number": "39",@@ -511,5 +511,8 @@     "docs/f280023pmsr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file