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Initial commit: component/eg8405

Ray ·98348c0f6f ·2mo ago
2 files changed +86
README.mdadded+52
@@ -0,0 +1,52 @@+# EG8405++**EG Micro** · Audio Power OpAmps · SOP-16++EG8405 from EG Micro, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OUTL+ | output | Left channel non-inverting Class-D speaker output. Connects directly to one terminal of the left speaker (filterless drive). |+| 2 | PGND | power_in | Power ground return for the H-bridge output stage. Tie to system ground plane with low-impedance connection. |+| 3 | OUTL- | output | Left channel inverting Class-D speaker output. Connects directly to the other terminal of the left speaker (filterless BTL drive). |+| 4 | PVDD | power_in | Power supply for the H-bridge output stage, 2.5V to 5.7V (absolute max 6.0V). Bypass with 1µF and bulk 1000µF close to the pin. |+| 5 | MUTE | input | Active-low mute control input. Drive low to mute the outputs; drive high for normal operation. |+| 6 | VDD | power_in | Analog supply, 2.5V to 5.7V (typical 5.0V, absolute max 6.0V). UVLO rising threshold typ 2.4V, falling 2.2V. Bypass with 1µF and 0.1µF close to the pin. |+| 7 | INL | input | Left channel analog audio input. AC-coupled via input capacitor (typ 0.1µF) to set the high-pass corner with the internal input resistance. |+| 8 | VREF | passive | Internal bias/reference (VDD/2) decoupling pin. Connect a 1µF capacitor to ground; do not drive externally. |+| 9 | NCN | input | Anti-clipping (No-Clipping-Noise) function pin. Tie logic H or L for NCN-OFF mode, or connect external Rex/Cex to configure attack/release time and THD vs output power (e.g. Rex=20kΩ, Cex=1µF → THD+N=10%, PO=3.2W at 4Ω). Max attenuation typ -10dB. |+| 10 | INR | input | Right channel analog audio input. AC-coupled via input capacitor (typ 0.1µF) to set the high-pass corner with the internal input resistance. |+| 11 | GND | power_in | Analog ground reference for the small-signal, bias, and control blocks. Tie to system ground plane. |+| 12 | SHDN | input | Active-low system shutdown control. VIH ≥ 1.35V for normal operation; VIL ≤ 0.1V forces shutdown (typ IPD = 1µA at Ta=25°C). |+| 13 | PVDD | power_in | Power supply for the H-bridge output stage (paralleled with pin 4), 2.5V to 5.7V. Bypass with 1µF close to the pin. |+| 14 | OUTR- | output | Right channel inverting Class-D speaker output. Connects directly to one terminal of the right speaker (filterless BTL drive). |+| 15 | PGND | power_in | Power ground return for the H-bridge output stage (paralleled with pin 2). Tie to system ground plane with low-impedance connection. |+| 16 | OUTR+ | output | Right channel non-inverting Class-D speaker output. Connects directly to the other terminal of the right speaker (filterless BTL drive). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | EG Micro |+| Package | SOP-16 |+| Category | Op-amp/Cmp |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `EG8405`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOP-16 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [EG Micro datasheet](docs/eg8405-datasheet.pdf) (4 pp, sha256 `96c51e48903e8233`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/eg8405-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "eg8405",+  "version": "0.1.0",+  "type": "component",+  "description": "EG Micro Audio Power OpAmps, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "op-amp-cmp",+    "eg8405"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "eg8405.kicad_sym",+    "eg8405.kicad_mod",+    "eg8405.glb",+    "eg8405.step",+    "eg8405.lbr",+    "docs/hero.png",+    "docs/eg8405-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file