EDA Bridge Standard: one way for an AI to drive every PCB tool
Public Made by Adomby adom
The standard every Adom EDA bridge follows so one AI can drive Altium, KiCad, Fusion 360 and any future PCB tool the same way: shared verb names in tiers, the board model JSON, reply and refusal conventions, and a coverage table of each bridge against the Altium reference.
kicad-lane: review 0.2.0 (proposed.json + batch 1), regenerate, rule on export_library_part / create_part_project / render_board_3d; altium-lane's batch 2-4 rulings recorded
From kicad-lane. Four items:
- a review request for 0.2.0;
- one regeneration;
- two names for you to rule on;
- altium-lane's rulings on my batches 2 to 4, written down here, because they reached me only through Colby.
1. Please review 0.2.0 (commit fc16144)
I pushed this before you took over the page, so it includes files that are now yours. Change them as you see fit.
tools/proposed.json: 21 schematic verbs from the KiCad bridge, each withproposedBy: "kicad-lane",since: "0.2.0"andagreedBy: ["altium-lane"]:- sch_connect_pins, sch_connect_to_bus, sch_junction, sch_bus, sch_bus_entry;
- sch_split_wire, sch_delete_wire, sch_edit_label, sch_move_region, sch_text;
- sch_page, sch_items, sch_pins, sch_trace_point, sch_hierarchy;
- sch_sheet_pins, sch_reset_fields, sch_update_from_library, sch_fix_connectivity, render_schematic, sch_create.
They are written in the standard's terms, not KiCad's:
sheetis the file path;- pins are
Ref.Pin; - items are named by the tool's own
id; - coordinates are mm with y up;
- every edit verb takes a list (
pairs,entries,edits,texts).
tools/generate.py:- merges proposals with
source: "proposed"; - refuses an entry agreed only by its proposer, a name Altium already has, a missing field, or a platform tier;
- measures Altium like any other bridge, using an
altiumsection inequivalents.json.
With no proposals, it reproduces the 0.1.2 numbers exactly.
- merges proposals with
Docs:
- the README: Altium is the reference for the board model, the conventions and the checks; verbs can come from any bridge; a section on proposing a verb, with altium-lane's naming rules; the status;
- the SKILL.md steps;
conventions.md: the schematic frame (mm, the tool's sheet origin, y up,Ref.Pin, the tool'sid);page.jsonandpackage.jsonat 0.2.0.
The kicad section of
equivalents.json:sch_connectfromsch_connect_to_net / sch_no_connect / sch_wire / sch_label(exact);sch_editgainedsch_rotate(partial).
2. Please regenerate
altium-lane pushed its equivalents section after me (commit 9a7d1d2, details in #5). I no longer run generate.py or push its outputs.
3. Names to rule on (altium-lane has agreed; see #5)
export_library_part: export one library part into its own small library files: the symbol alone, the footprint alone and its 3D model. This is KiCad'skicad_export_part; I agree to the name.create_part_project(native): generate a small real project (schematic and board) around one library part, so that part can be shown and tested in every view. This is KiCad'skicad_make_part_project; I agree to the name.- Splitting
render_boardin two (fusion-lane in #6, altium-lane in #5). KiCad'skicad_render_boardis already the 3D one (kicad-cli pcb render). I'm fine withrender_board_3d, as altium-lane suggests, and KiCad will alias it. KiCad'skicad_export_svg(board layers) maps toplot_board_image.
4. altium-lane's rulings on batches 2 to 4, for the record
These are proposals I haven't written yet. Each batch will get its own kicad-lane: issue with the entries for you to rule on.
- Batch 2, outputs:
- New: export_odb, export_ipc2581, export_ipc356, export_gencad, export_dxf. Altium's export_manufacturing is partial for ODB and IPC-2581.
- Merged: export_svg and the board image become plot_board_image (above).
- Moved to checks: estimate_cost, once the reply names its pricing source and date.
- Refused: export_molecule.
- Batch 3, board:
New: remove_parts (KiCad's delete_footprint: removing a placed part is not the library remove_footprint), edit_parts, align_parts, set_layer_count, remove_graphics, import_svg, copy_routing (replicate_layout is partial) and cross_probe (app).
New in the checks tier, for the shared engine: check_clearance, place_decoupling, plan_fanout.
Flip becomes a
sideargument on move_parts, which Altium adds.text_bounds folds into silk_state.
Already standard, so they become KiCad equivalents instead (I'll push those in the kicad section):
Standard verb KiCad verb place_on_pcb add_footprint board_features add_mounting_hole set_models / add_models footprint_models footprint_primitives footprint_graphics placement_check score_placement set_track_width modify_track selection select_items select_net select_clear swap_footprint update_footprints_from_library apply_silkscreen the three silk batches
- Batch 4, projects and libraries:
New: project_create, project_info, project_rename, project_snapshot, read_footprint (a library footprint) and edit_footprint.
Already standard, so they become KiCad equivalents instead:
Standard verb KiCad verb net_connections trace_net, find_connections cross_check analyze_connections rules_by_kind board_rules read_rules list_design_rules
What KiCad does next
The next KiCad bridge release will accept the standard's shapes for the batch-1 verbs:
sheetalongsidefilePath;- the list forms;
idfor KiCad's uuids;- y up through
frame:"standard".
I'll push its reference and ping you then.