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EDA Bridge Standard: one way for an AI to drive every PCB tool
Public Made by Adomby adom
The standard every Adom EDA bridge follows so one AI can drive Altium, KiCad, Fusion 360 and any future PCB tool the same way: shared verb names in tiers, the board model JSON, reply and refusal conventions, and a coverage table of each bridge against the Altium reference.
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standard 0.29.0: export_3d, import_design, edit_pours join (#29)
5 files changed
+176−10
README.md+3−2@@ -61,11 +61,11 @@ verb by verb: [docs/coverage.md](docs/coverage.md). | Tier | Verbs | Altium | KiCad | Fusion 360 | |---|---|---|---|---| | **core** | 95 | 95 | 95 | 93 |-| **native** | 49 | 49 | 49 | 46 |+| **native** | 52 | 49 | 49 | 49 | | **checks** | 38 | 38 | 38 | 38 | | **app** | 65 | 65 | 54 | 56 | | **platform** | 18 | 18 | 0 | 1 |-| standard (all but platform) | 247 | 247 | 236 | 233 |+| standard (all but platform) | 250 | 247 | 236 | 236 | <!-- coverage:end --> The **checks** tier is where the other bridges are furthest behind, and it is the cheapest to close: those verbs are@@ -158,6 +158,7 @@ Decisions so far (proposals from the KiCad and Fusion bridges, 2026-10-27; issue ## Status +Version 0.29.0: three verbs from fusion-lane join the standard (#29): `export_3d`, `import_design` and `edit_pours` (native). 250 verbs. Version 0.28.2: the reference is Altium bridge 0.2.86, which answers all 247 standard verbs (sch_batch and log_tail added). Version 0.28.1: coverage reads Fusion 360 bridge 1.13.31 (engine 0.23.0, sends sheetDrawing). Version 0.28.0: engine 0.23.0: `schematic_review` reads a sheet's drawing (`sheetDrawing`, kicad-lane's shape, #29) for dangling wire ends, floating labels and overlapping symbols; `placement_check` counts a body-less SMD test point as flat under a raised module.
docs/coverage.md+6−3@@ -1,17 +1,17 @@ # Coverage: every standard verb on each bridge -Altium bridge 0.2.86 (the reference), KiCad bridge 1.0.92, Fusion 360 bridge 1.13.31. 62 verbs came from other bridges' proposals (tools/proposed/); they are marked *proposed*.+Altium bridge 0.2.86 (the reference), KiCad bridge 1.0.92, Fusion 360 bridge 1.13.31. 65 verbs came from other bridges' proposals (tools/proposed/); they are marked *proposed*. `exact` is the same job under the same or an equivalent name; `partial` does part of it or does it differently (`verbs/coverage.json` names what in `note`); `unsupported` answers `not_supported` for the whole job and is not counted; blank is missing. Generated by `tools/generate.py` from `verbs/coverage.json`; do not edit by hand. | Tier | Verbs | Altium | KiCad | Fusion 360 | |---|---|---|---|---| | **core** | 95 | 95 | 95 | 93 |-| **native** | 49 | 49 | 49 | 46 |+| **native** | 52 | 49 | 49 | 49 | | **checks** | 38 | 38 | 38 | 38 | | **app** | 65 | 65 | 54 | 56 | | **platform** | 18 | 18 | 0 | 1 |-| standard (all but platform) | 247 | 247 | 236 | 233 |+| standard (all but platform) | 250 | 247 | 236 | 236 | ## core @@ -131,6 +131,8 @@ Wraps the EDA tool's own feature (its DRC, ERC, Gerbers, pours, Update PCB). Eve | `component_classes` | List, make or remove component classes on the board, each optionally with a room: a placement area that keeps its parts together (fitted around the parts or... | `altium_component_classes` | `kicad_component_classes` | unsupported | | `create_part_project` *proposed* | Generate a small real project (schematic and board) around one library part, so the part can be shown and tested in every view: schematic, 2D board and 3D... | `altium_create_part_project` | `kicad_create_part_project` (partial) | `fusion_make_test_project` (partial) | | `diff_pairs` | Differential pairs on the current board: list them, define one from two nets (replacing a pair of that name), or remove one. Altium's differential-pair... | `altium_diff_pairs` | `kicad_diff_pairs` (partial) | `fusion_diff_pairs` (partial) |+| `edit_pours` *proposed* | Change existing pours in place without redrawing them: clearance, minimum width, thermal relief (on/off, spoke width, gap), priority or rank, the net, and... | | | `fusion_change_pours` (partial) |+| `export_3d` *proposed* | Export the board's 3D model in a mesh or CAD format other than STEP (export_step has STEP), through the tool's own exporter, with an optional web-optimized... | | | `fusion_export_cloud_file` (partial) | | `export_bom` | Bill of materials export: altium_run_outjob with the assembly OutJob and the 'Folder Structure' medium as defaults. | `altium_export_bom` | `kicad_export_bom_csv` (partial) | `fusion_export_bom` | | `export_dxf` *proposed* | Export chosen board layers to DXF, one file per layer (the outline, panel drawings, stencils, enclosure work). | `altium_export_dxf` | `kicad_export_dxf` | `fusion_export_dxf` | | `export_gencad` *proposed* | Export the board as GenCAD 1.4, the input of test-fixture tools and some assembly houses' CAM. | `altium_export_gencad` | `kicad_export_gencad` | `fusion_export_gencad` |@@ -143,6 +145,7 @@ Wraps the EDA tool's own feature (its DRC, ERC, Gerbers, pours, Update PCB). Eve | `export_pdf` | Every sheet of a project as one PDF, plus on request the board's composite print, Altium's assembly drawings (top and bottom, designators on the parts) and... | `altium_export_pdf` | `kicad_export_pdf` | `fusion_export_pdf` (partial) | | `export_pos` *proposed* | Export the pick-and-place (component position, CPL) file of a board, optionally in a fab's assembly format (JLCPCB's columns). | `altium_export_pos` | `kicad_export_pos` | `fusion_export_cpl` (partial) | | `export_step` | Headless STEP export of a board. Default lane 'outjob': Altium's own ExportSTEP output run from a throwaway project in %TEMP% that points at the board - no... | `altium_export_step` | `kicad_export_step` | `fusion_export_step` |+| `import_design` *proposed* | Bring a design from another tool into a NEW native design with the parts instantiated: an EAGLE .sch with its paired .brd, a KiCad project, or an Altium... | | | `fusion_new_electronics_from_eagle` (partial) | | `install_library` | Register a library file in Altium's Installed Libraries (IntegratedLibraryManager.InstallLibrary) so its parts appear in the Components panel. | `altium_install_library` | `kicad_install_library` | `fusion_install_library_bundle` (partial) | | `install_library_bundle` | One-click install of a wiki library bundle (zip of .SchLib/.PcbLib): unpack, register, open the library, prove it with a frame. | `altium_install_library_bundle` | `kicad_install_library_bundle` | `fusion_install_library_bundle` | | `list_installed_libraries` | Every library in Altium's Installed Libraries list (read-only). | `altium_list_installed_libraries` | `kicad_list_installed_libraries` | `fusion_list_installed_libraries` (partial) |
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "eda-bridge-standard",- "version": "0.28.2",+ "version": "0.29.0", "type": "skill", "title": "EDA Bridge Standard: one way for an AI to drive every PCB tool", "description": "The standard every Adom EDA bridge follows so one AI can drive Altium, KiCad, Fusion 360 and any future PCB tool the same way: shared verb names in tiers, the board model JSON, reply and refusal conventions, and a coverage table of each bridge against the Altium reference.",
verbs/coverage.json+38−2@@ -1,10 +1,10 @@ {- "standard": "0.28.2",+ "standard": "0.29.0", "reference": { "bridge": "altium", "version": "0.2.86" },- "proposed": 62,+ "proposed": 65, "compared": { "kicad": "1.0.92", "fusion360": "1.13.31"@@ -1848,6 +1848,30 @@ "note": "lists pairs by net names (NAME_P/NAME_N, P/N, +/-, DP/DN): Fusion has no pair object, so define and remove are refused with how to rename the nets" } },+ {+ "name": "edit_pours",+ "tier": "native",+ "source": "proposed",+ "altium": null,+ "kicad": null,+ "fusion360": {+ "verb": "fusion_change_pours",+ "match": "partial",+ "note": "each pour's minimum width (EAGLE's pen width) and clearance (isolate), refilled and read back; thermals, rank and net are not changed yet"+ }+ },+ {+ "name": "export_3d",+ "tier": "native",+ "source": "proposed",+ "altium": null,+ "kicad": null,+ "fusion360": {+ "verb": "fusion_export_cloud_file",+ "match": "partial",+ "note": "the board's 3D PCB design in stl, iges, sat or f3d (obj, 3mf, fbx and usdz through fusion_export_obj, fusion_export_3mf, fusion_export_fbx, fusion_export_usdz; a web glb through fusion_export_optimized_glb); vrml and ply are not offered"+ }+ }, { "name": "export_bom", "tier": "native",@@ -2056,6 +2080,18 @@ "match": "exact" } },+ {+ "name": "import_design",+ "tier": "native",+ "source": "proposed",+ "altium": null,+ "kicad": null,+ "fusion360": {+ "verb": "fusion_new_electronics_from_eagle",+ "match": "partial",+ "note": "format eagle only: an EAGLE .sch and its .brd into a new Fusion electronics design with the parts instantiated (Fusion's own import, run in the background)"+ }+ }, { "name": "install_library", "tier": "native",
verbs/standard.json+128−2@@ -1,10 +1,10 @@ {- "standard": "0.28.2",+ "standard": "0.29.0", "reference": { "bridge": "altium", "version": "0.2.86" },- "proposed": 62,+ "proposed": 65, "compared": { "kicad": "1.0.92", "fusion360": "1.13.31"@@ -4123,6 +4123,91 @@ "longRunning": false, "timeoutSeconds": 90 },+ {+ "name": "edit_pours",+ "tier": "native",+ "source": "proposed",+ "summary": "Change existing pours in place without redrawing them: clearance, minimum width, thermal relief (on/off, spoke width, gap), priority or rank, the net, and whether islands are kept. The copper is refilled and read back.",+ "input": {+ "pours": "[{id or net+layer, clearanceMm?, minWidthMm?, thermals?: {on, spokeMm, gapMm}, priority?, net?, keepIslands?}] (required)",+ "expectedRevision": "string",+ "dryRun": "bool"+ },+ "output": {+ "edited": "[{id, before, after}]",+ "pourState": "the pours after refill, as pour_state answers",+ "revision": "string",+ "mutated": "bool"+ },+ "hint": "pour_state lists the pours and their ids first. One undo step; a pour that refills to nothing is reported, not hidden.",+ "pitfalls": [+ "Changing the net of a pour reconnects copper: run_drc afterwards."+ ],+ "related": [+ "pour_state",+ "apply_pours",+ "remove_pours",+ "repour"+ ],+ "example": {+ "pours": [+ {+ "net": "GND",+ "layer": "B.Cu",+ "clearanceMm": 0.3+ }+ ]+ },+ "longRunning": false,+ "timeoutSeconds": 120,+ "proposedBy": "fusion-lane",+ "since": "0.28.1",+ "agreedBy": [+ "standard-lane",+ "kicad-lane"+ ]+ },+ {+ "name": "export_3d",+ "tier": "native",+ "source": "proposed",+ "summary": "Export the board's 3D model in a mesh or CAD format other than STEP (export_step has STEP), through the tool's own exporter, with an optional web-optimized glb. format is an open list; each bridge answers the ones its tool writes.",+ "input": {+ "filePath": "the board (optional; default the open board)",+ "format": "the file format, an open list (stl, obj, glb, 3mf, iges, vrml, ply, brep, xao, u3d, ...); required",+ "outputPath": "the file to write",+ "components": "bool, default true: parts' 3D models too, not only the bare board",+ "web": "bool (glb only): optimized for a web viewer (merged meshes, compressed)"+ },+ "output": {+ "path": "the file written",+ "format": "string",+ "bytes": "int",+ "components": "bool"+ },+ "hint": "One call per format. A format the tool cannot write is refused by name with not_supported, never faked through another format.",+ "pitfalls": [+ "Mesh formats are triangulated: use export_step for mechanical CAD that needs exact surfaces."+ ],+ "related": [+ "export_step",+ "render_board_3d",+ "bodies"+ ],+ "example": {+ "format": "glb",+ "outputPath": "C:/out/board.glb",+ "web": true+ },+ "longRunning": false,+ "timeoutSeconds": 300,+ "proposedBy": "fusion-lane",+ "since": "0.28.1",+ "agreedBy": [+ "standard-lane",+ "kicad-lane"+ ]+ }, { "name": "export_bom", "tier": "native",@@ -4576,6 +4661,47 @@ "longRunning": false, "timeoutSeconds": 360 },+ {+ "name": "import_design",+ "tier": "native",+ "source": "proposed",+ "summary": "Bring a design from another tool into a NEW native design with the parts instantiated: an EAGLE .sch with its paired .brd, a KiCad project, or an Altium project, through the tool's own importer.",+ "input": {+ "format": "the source tool, an open list (eagle, kicad, altium, pads, cadstar, fabmaster, pcad, ...); required",+ "filePath": "the schematic or project file (required)",+ "boardPath": "the paired board file, when the format keeps it separate",+ "name": "the new design's name"+ },+ "output": {+ "design": "the new design or project",+ "parts": "int",+ "nets": "int",+ "warnings": "[string]: what the importer could not bring over"+ },+ "hint": "The import makes a new design and never changes the source files. Check the result with schematic_review and cross_check.",+ "pitfalls": [+ "A format the tool has no importer for is refused by name with not_supported.",+ "A tool whose command-line importer reads only the board (KiCad's kicad-cli pcb import) says that the schematic was not imported and how to bring it."+ ],+ "related": [+ "import_kicad",+ "cross_check",+ "schematic_review"+ ],+ "example": {+ "format": "eagle",+ "filePath": "C:/proj/board.sch",+ "boardPath": "C:/proj/board.brd"+ },+ "longRunning": true,+ "timeoutSeconds": 600,+ "proposedBy": "fusion-lane",+ "since": "0.28.1",+ "agreedBy": [+ "standard-lane",+ "kicad-lane"+ ]+ }, { "name": "install_library", "tier": "native",