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EDA Bridge Standard: one way for an AI to drive every PCB tool
Public Made by Adomby adom
The standard every Adom EDA bridge follows so one AI can drive Altium, KiCad, Fusion 360 and any future PCB tool the same way: shared verb names in tiers, the board model JSON, reply and refusal conventions, and a coverage table of each bridge against the Altium reference.
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kicad-lane: #29 proposals: verb_times, prewarm, render_board, align_footprints, export_pos, edit_placed_footprint (agreedBy pending)
1 file changed
+215
tools/proposed/kicad-lane.json+215@@ -2076,5 +2076,220 @@ "altium-lane", "fusion-lane" ]+ },+ {+ "name": "verb_times",+ "tier": "platform",+ "summary": "Measured run times of this bridge's verbs on this machine: per verb the count, p50, p90, max, last and failures, from its own run log, slowest p90 first.",+ "input": {+ "limit": "int, default 40: how many verbs"+ },+ "output": {+ "verbs": "[{verb, count, p50Sec, p90Sec, maxSec, lastSec, failures}]",+ "since": "when the log starts"+ },+ "hint": "p90 is the headline: a p50 of 15 s next to a p90 of 400 s is two code paths under one name. failures counts runs that returned success:false; a verb that fails fast is a different bug from a slow one.",+ "pitfalls": [+ "Times are this machine's: a slower box or a bigger board moves them."+ ],+ "related": [+ "prewarm"+ ],+ "example": {+ "limit": 20+ },+ "proposedBy": "kicad-lane",+ "since": "0.25.1",+ "agreedBy": []+ },+ {+ "name": "prewarm",+ "tier": "platform",+ "summary": "Get this machine ready for a fast first call: detect the tool, seed its first-run settings, dismiss first-run wizards and repair what the first real call would otherwise do slowly. Idempotent.",+ "input": {},+ "output": {+ "steps": "[{step, done, skipped?, why?}]",+ "ready": "bool"+ },+ "hint": "The bridge host may run it once after an install or update; running it again changes nothing. Everything it does is what the first real verb would otherwise do in the user's face.",+ "pitfalls": [+ "It never opens a document or takes the foreground."+ ],+ "related": [+ "verb_times"+ ],+ "example": {},+ "proposedBy": "kicad-lane",+ "since": "0.25.1",+ "agreedBy": []+ },+ {+ "name": "render_board",+ "tier": "native",+ "summary": "A rendered 3D picture (PNG or JPG) of a board from one side, made by the tool's own renderer with no window: optionally framed on parts, turned for an isometric view, raytraced.",+ "input": {+ "filePath": "the board (required)",+ "side": "top | bottom | left | right | front | back, default top",+ "width": "px, default 1600",+ "height": "px, default 900",+ "quality": "basic | high (raytraced)",+ "background": "default | transparent | opaque",+ "zoom": "float",+ "perspective": "bool",+ "format": "png | jpg",+ "refs": "[ref]: frame these parts (camera on their pads' centre, zoomed to them)",+ "marginMm": "mm round framed parts, default 2",+ "rotate": "'x,y,z' degrees, e.g. '-45,0,45' for isometric",+ "outputDir": "folder for the image"+ },+ "output": {+ "path": "the image",+ "framed": "{refs, pivot, zoom} when refs was given"+ },+ "hint": "One call per side (top and bottom for a review). refs frames parts for a close look; quality high raytraces and takes longer.",+ "pitfalls": [+ "The picture is of the saved board file: unsaved edits are not in it."+ ],+ "related": [+ "zoom_to",+ "library_views",+ "render_schematic"+ ],+ "example": {+ "filePath": "C:/proj/board.kicad_pcb",+ "side": "top",+ "refs": [+ "J1"+ ],+ "rotate": "-45,0,45"+ },+ "proposedBy": "kicad-lane",+ "since": "0.25.1",+ "agreedBy": []+ },+ {+ "name": "align_footprints",+ "tier": "core",+ "summary": "Align placed parts on a common left, right, top, bottom or centre line, or distribute them evenly, by courtyard box or anchor, through the bridge's checked move (revision, courtyard collisions, board outline, one undo step).",+ "input": {+ "filePath": "the board (required)",+ "refs": "[ref], at least two (required)",+ "mode": "left | right | top | bottom | centerX | centerY | distributeX | distributeY (required)",+ "by": "courtyard | anchor, default courtyard",+ "to": "mm: the line to align on; default the group's own edge or centre",+ "gap": "mm between neighbours (distribute)",+ "expectedRevision": "string",+ "dryRun": "bool",+ "allowOverlap": "bool, default false",+ "allowOutside": "bool, default false"+ },+ "output": {+ "moves": "[{ref, from, to}]",+ "revision": "string",+ "mutated": "bool"+ },+ "hint": "Without to, left and top take the group's minimum edge, right and bottom its maximum, centerX and centerY the mean centre; distribute keeps the outer two in place unless gap is given.",+ "pitfalls": [+ "A move that would collide or leave the outline is refused unless allowOverlap or allowOutside."+ ],+ "related": [+ "move_footprint",+ "placement_check",+ "find_space"+ ],+ "example": {+ "filePath": "C:/proj/board.kicad_pcb",+ "refs": [+ "C1",+ "C2",+ "C3"+ ],+ "mode": "distributeX",+ "gap": 1.0+ },+ "proposedBy": "kicad-lane",+ "since": "0.25.1",+ "agreedBy": []+ },+ {+ "name": "export_pos",+ "tier": "native",+ "summary": "Export the pick-and-place (component position, CPL) file of a board, optionally in a fab's assembly format (JLCPCB's columns).",+ "input": {+ "filePath": "the board (required)",+ "side": "both | front | back, default both",+ "format": "csv | ascii | gerber, default csv",+ "units": "mm | in, default mm",+ "smdOnly": "bool",+ "excludeDnp": "bool, default true",+ "fab": "jlcpcb: also write the fab's own CPL columns",+ "outputDir": "folder"+ },+ "output": {+ "files": "[path]",+ "parts": "int per side"+ },+ "hint": "Pair it with a BOM and Gerbers for an assembly order; export_manufacturing writes all three in one call.",+ "pitfalls": [+ "Rotations follow the tool's convention; a fab may need its own offsets per package."+ ],+ "related": [+ "export_manufacturing",+ "bom",+ "assembly_check"+ ],+ "example": {+ "filePath": "C:/proj/board.kicad_pcb",+ "fab": "jlcpcb"+ },+ "proposedBy": "kicad-lane",+ "since": "0.25.1",+ "agreedBy": []+ },+ {+ "name": "edit_placed_footprint",+ "tier": "core",+ "summary": "Edit parts placed on a board: value, reference, any field (add, change, remove), DNP, exclude from BOM or position files, the mounting type, and the lock. (edit_footprint edits a library footprint; this edits the board's copies.)",+ "input": {+ "filePath": "the board (required)",+ "refs": "[ref] or ref (required)",+ "value": "string",+ "newReference": "string",+ "fields": "{name: value | null to remove}",+ "dnp": "bool",+ "excludeFromBom": "bool",+ "excludeFromPosFiles": "bool",+ "attributes": "{type: smd | through_hole | unspecified, ...}",+ "locked": "bool",+ "expectedRevision": "string",+ "dryRun": "bool"+ },+ "output": {+ "edited": "[{ref, before, after}]",+ "revision": "string",+ "mutated": "bool"+ },+ "hint": "One undo step live, or one write. The schematic is not changed: the next update from the schematic overwrites value and fields that differ there.",+ "pitfalls": [+ "A mandatory field (Reference, Value, Footprint) cannot be removed."+ ],+ "related": [+ "edit_footprint",+ "sheet_params",+ "part_parameters"+ ],+ "example": {+ "filePath": "C:/proj/board.kicad_pcb",+ "refs": [+ "R7"+ ],+ "dnp": true,+ "fields": {+ "LCSC": "C25804"+ }+ },+ "proposedBy": "kicad-lane",+ "since": "0.25.1",+ "agreedBy": [] } ]