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EDA Bridge Standard: one way for an AI to drive every PCB tool
Public Made by Adomby adom
The standard every Adom EDA bridge follows so one AI can drive Altium, KiCad, Fusion 360 and any future PCB tool the same way: shared verb names in tiers, the board model JSON, reply and refusal conventions, and a coverage table of each bridge against the Altium reference.
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kicad-lane: simulate output notSimulated [ref] (#23, from Altium 0.2.82)
1 file changed
+3−1
tools/proposed/kicad-lane.json+3−1@@ -2000,13 +2000,15 @@ "output": { "signals": "[{signal: \"V(OUT)\", x: [..], y: [..], xUnit: s|Hz|V, yUnit: V|A|dB, phase?: [..] (AC, degrees, unwrapped)}]; an op gives one point per signal", "missing": "[probe]: probes the run did not have",+ "notSimulated": "[ref]: parts the run left out for want of a simulation model, when the sheet is only partly modelled, so a reader knows the result covers only part of the circuit (empty when every part was simulated)", "available": "[signal name]", "engine": "the simulator and its version, e.g. \"ngspice 46 (KiCad 10.0.7)\"" }, "hint": "AC signals are the magnitude in dB with phase in degrees beside it. Every part needs a simulation model: passives work from their values, sources come from the tool's simulation library, ICs need a model file.", "pitfalls": [ "simulation_failed carries the simulator's own message: a part without a model, a node with no DC path to ground, or a bad analysis.",- "points thins the reply, not the run: a long transient with a tiny step still takes its time."+ "points thins the reply, not the run: a long transient with a tiny step still takes its time.",+ "A partly modelled sheet still runs and names the parts it left out in notSimulated; a sheet with no modelled parts refuses with no_model." ], "related": [ "export_spice",