EDA Bridge Standard: one way for an AI to drive every PCB tool

@@ -871,7 +871,7 @@    "summary": "Make a part's 3D body from its package family and its datasheet dimensions (chip, SOIC, QFN, QFP, BGA, SOT-23, DFN, MELF, electrolytic can, crystal, pin header and others), to IPC-7351 proportions, optionally with a marking on its top, and write it as a STEP file.",    "input": {     "family": "chip | soic | qfn | qfp | bga | sot23 | dfn | melf | ecap | crystal | header and others (required; an unknown one is answered with the families the bridge supports)",-    "dimensionsMm": "{letter: mm}: the package drawing's JEDEC letters (A height, D body length, E lead span, E1 body width, b lead width, e pitch, L lead length) plus pins; a missing one takes the family's default",+    "dimensionsMm": "{letter: mm}: the package drawing's JEDEC letters (A height, D body length, E lead span, E1 body width, b lead width, e pitch, L lead length; D2 and E2 the exposed pad's length and width, drawn when given) plus pins, always the part's total pin count for any family (a bridge converts it to its generator's own per-side or per-pair count); a missing one takes the family's default",     "marking": "text on the top face (an MPN or a value code); a newline starts a second line",     "markingStyle": "raised | engraved (default raised)",     "outputPath": "the .step file to write (required)"@@ -887,7 +887,8 @@    "hint": "The body is in the package's own frame (IPC-7351 zero orientation, seated on z = 0), ready for add_body. Compare bboxMm with the datasheet's body size before attaching it.",    "pitfalls": [     "A wrong dimension gives a plausible but wrong body: nothing checks it against a datasheet.",-    "A marking is real geometry: very small text on a small package is unreadable, which is not an error."+    "A marking is real geometry: very small text on a small package is unreadable, which is not an error.",+    "pins is the total: QFN-32 is pins 32, not 8 per side."    ],    "related": [     "add_body",