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regenerate after altium-lane d007880 (altium 0.2.76 reference with the 14 batch-1 sch_* wiring verbs): Altium 200 of 236

Colby Knox ·79815c5bc6 ·14d ago ·parent d007880
3 files changed +69−30
README.md+2−2
@@ -47,12 +47,12 @@ verb by verb: [docs/coverage.md](docs/coverage.md). <!-- coverage:start (tools/generate.py writes this) --> | Tier | Verbs | Altium | KiCad | Fusion 360 | |---|---|---|---|---|-| **core** | 93 | 64 | 72 | 29 |+| **core** | 93 | 77 | 72 | 29 | | **native** | 46 | 35 | 35 | 18 | | **checks** | 37 | 32 | 11 | 4 | | **app** | 60 | 56 | 25 | 35 | | **platform** | 19 | 19 | 0 | 0 |-| standard (all but platform) | 236 | 187 | 143 | 86 |+| standard (all but platform) | 236 | 200 | 143 | 86 | <!-- coverage:end -->  The **checks** tier is where the other bridges are furthest behind, and it is the cheapest to close: those verbs are
docs/coverage.md+15−15
@@ -6,12 +6,12 @@ Generated by `tools/generate.py` from `verbs/coverage.json`; do not edit by hand  | Tier | Verbs | Altium | KiCad | Fusion 360 | |---|---|---|---|---|-| **core** | 93 | 64 | 72 | 29 |+| **core** | 93 | 77 | 72 | 29 | | **native** | 46 | 35 | 35 | 18 | | **checks** | 37 | 32 | 11 | 4 | | **app** | 60 | 56 | 25 | 35 | | **platform** | 19 | 19 | 0 | 0 |-| standard (all but platform) | 236 | 187 | 143 | 86 |+| standard (all but platform) | 236 | 200 | 143 | 86 |  ## core @@ -76,30 +76,30 @@ Read and edit the design. Every bridge provides these: they are how an AI sees a | `route_net` | Route one net as tracks, segment by segment; a waypoint on another layer drops a via there. One undo step, read back. | `altium_route_net` | `kicad_route_net / kicad_add_track` | `fusion_route_net` | | `routing_state` | The WHOLE current board as data, in mm: tracks, arcs, vias, pads (with owner and net), components (ref, x, y, rotation, side), polygon pours, the outline,... | `altium_routing_state` | `kicad_routing_state` | `fusion_routing_state` | | `rules_by_kind` | The current board's ENABLED design rules grouped by rule kind (Clearance, Width, RoutingVias, ...), each group sorted by priority. Shaped from one... | `altium_rules_by_kind` | `kicad_board_rules` (partial) | `fusion_rules_by_kind` |-| `sch_bus` *proposed* | Draw a bus as a polyline (one bus segment per pair of points), optionally with a bus label such as D[0..7] or a group {SDA SCL} at its first point. One undo... |  | `kicad_sch_bus` |  |-| `sch_bus_entry` *proposed* | Add 45-degree bus entries: the short diagonal that joins a member wire's end to a bus. One undo step. |  | `kicad_sch_bus_entry` |  |+| `sch_bus` *proposed* | Draw a bus as a polyline (one bus segment per pair of points), optionally with a bus label such as D[0..7] or a group {SDA SCL} at its first point. One undo... | `altium_sch_bus` | `kicad_sch_bus` |  |+| `sch_bus_entry` *proposed* | Add 45-degree bus entries: the short diagonal that joins a member wire's end to a bus. One undo step. | `altium_sch_bus_entry` | `kicad_sch_bus_entry` |  | | `sch_connect` | Connect pins of placed parts: a wire stub from each pin's outer end plus a net label (kind label), a power port (kind power: GND-like nets get a ground... | `altium_sch_connect` | `kicad_sch_connect_to_net / kicad_sch_no_connect / kicad_sch_wire / kicad_sch_label` |  |-| `sch_connect_pins` *proposed* | Wire pins to pins on a sheet by Ref.Pin: an L-shaped route (one horizontal and one vertical leg) for each pair, with a junction dot wherever a route meets... |  | `kicad_sch_connect_pins` |  |-| `sch_connect_to_bus` *proposed* | Fan pins onto a bus: for each pin a wire running to the bus, a 45-degree bus entry onto it and a member label (D0, D1 ...) on the wire. One undo step. |  | `kicad_sch_connect_to_bus` |  |+| `sch_connect_pins` *proposed* | Wire pins to pins on a sheet by Ref.Pin: an L-shaped route (one horizontal and one vertical leg) for each pair, with a junction dot wherever a route meets... | `altium_sch_connect_pins` | `kicad_sch_connect_pins` |  |+| `sch_connect_to_bus` *proposed* | Fan pins onto a bus: for each pin a wire running to the bus, a 45-degree bus entry onto it and a member label (D0, D1 ...) on the wire. One undo step. | `altium_sch_connect_to_bus` | `kicad_sch_connect_to_bus` |  | | `sch_create` *proposed* | Create an empty schematic sheet with a paper size and title block; optionally add it to a project as a child sheet of the root. It places no parts or nets... | `altium_sch_sheet_symbol` (partial) | `kicad_sch_create` |  |-| `sch_delete_wire` *proposed* | Delete wires or bus segments by id, by their two ends, or every wire through a point, and remove junction dots that no longer join three or more items. One... |  | `kicad_sch_delete_wire` |  |+| `sch_delete_wire` *proposed* | Delete wires or bus segments by id, by their two ends, or every wire through a point, and remove junction dots that no longer join three or more items. One... | `altium_sch_delete_wire` | `kicad_sch_delete_wire` |  | | `sch_edit` | Change placed parts on a sheet: move (to x,y mil), moveBy (dx,dy), rotate (degrees), rename (designator), re-comment (comment), delete. One undo step. | `altium_sch_edit` | `kicad_sch_set_property / kicad_sch_move / kicad_sch_delete / kicad_sch_rotate` (partial) |  |-| `sch_edit_label` *proposed* | Edit net labels: rotate, move to a point or by a delta, rename, or move every label of a net at once. One undo step. |  | `kicad_sch_edit_label` |  |-| `sch_fix_connectivity` *proposed* | Snap near-miss wire ends onto the pin, label, sheet pin or wire end they almost touch, within a tolerance. dryRun (the default) lists the moves;... |  | `kicad_sch_fix_connectivity` |  |+| `sch_edit_label` *proposed* | Edit net labels: rotate, move to a point or by a delta, rename, or move every label of a net at once. One undo step. | `altium_sch_edit_label` | `kicad_sch_edit_label` |  |+| `sch_fix_connectivity` *proposed* | Snap near-miss wire ends onto the pin, label, sheet pin or wire end they almost touch, within a tolerance. dryRun (the default) lists the moves;... | `altium_sch_fix_connectivity` | `kicad_sch_fix_connectivity` |  | | `sch_hierarchy` *proposed* | The sheet tree of a design, recursively: each sheet's name, file, id, instance path, page number, position, size and pins. renumber:true renumbers pages... |  | `kicad_sch_hierarchy` |  |-| `sch_items` *proposed* | List a sheet's wiring items with ids and coordinates: wires, buses, bus entries, net labels (local, global, hierarchical), power ports, junctions,... |  | `kicad_sch_items` |  |-| `sch_junction` *proposed* | Add junction dots at points, or remove dots by id or point. One undo step. |  | `kicad_sch_junction` |  |-| `sch_move_region` *proposed* | Move everything inside a box by (dx, dy): parts, wire ends inside the box (wires crossing its edge stretch), labels, junctions, no-connect markers, texts,... |  | `kicad_sch_move_region` |  |+| `sch_items` *proposed* | List a sheet's wiring items with ids and coordinates: wires, buses, bus entries, net labels (local, global, hierarchical), power ports, junctions,... | `altium_sch_items` | `kicad_sch_items` |  |+| `sch_junction` *proposed* | Add junction dots at points, or remove dots by id or point. One undo step. | `altium_sch_junction` | `kicad_sch_junction` |  |+| `sch_move_region` *proposed* | Move everything inside a box by (dx, dy): parts, wire ends inside the box (wires crossing its edge stretch), labels, junctions, no-connect markers, texts,... | `altium_sch_move_region` | `kicad_sch_move_region` |  | | `sch_page` *proposed* | Read or set a sheet's page: paper size, orientation and title block (title, date, revision, company, comment lines). |  | `kicad_sch_page` |  | | `sch_pins` *proposed* | Every pin of the named parts on a sheet: its absolute position (rotation and mirror applied), number, name, electrical type, the side it leaves the body,... | `altium_read_sheet_file` (partial) | `kicad_sch_pins` |  | | `sch_place_part` | Place a component from a .SchLib onto an EXISTING sheet at a position, with its library parameters (MPN, Manufacturer, distributor numbers) and its... | `altium_sch_place_part` | `kicad_sch_place_symbol` |  | | `sch_reset_fields` *proposed* | Put parts' designator and value text (or the named fields) back where the library symbol places them, through each part's rotation and mirror. One undo step. |  | `kicad_sch_reset_fields` |  | | `sch_sheet_pins` *proposed* | A sheet symbol's pins: list, add, edit (rename, kind, move along an edge) or delete. import:true adds a pin for every hierarchical port inside the child... | `altium_sch_sheet_symbol` (partial) | `kicad_sch_sheet_pins` |  | | `sch_sheet_symbol` | Make a design hierarchical: a sheet symbol on the parent sheet for a child sheet, its entries joined to the parent's nets, and matching ports on the child.... | `altium_sch_sheet_symbol` | `kicad_sch_sheet` (partial) |  |-| `sch_split_wire` *proposed* | Split the wire through a point into two wires there, with a junction dot at the cut, so a new branch can end on a wire end. One undo step. |  | `kicad_sch_split_wire` |  |+| `sch_split_wire` *proposed* | Split the wire through a point into two wires there, with a junction dot at the cut, so a new branch can end on a wire end. One undo step. | `altium_sch_split_wire` | `kicad_sch_split_wire` |  | | `sch_swap_part` | Replace a placed part with another library part (a different value, package or symbol) at the same place, designator and rotation, keeping its connections:... | `altium_sch_swap_part` | `kicad_sch_replace_symbol` (partial) |  |-| `sch_text` *proposed* | Add free text to a sheet (a note, a title, a design comment) with size, angle, justification, bold and italic. Text has no electrical meaning. One undo step. |  | `kicad_sch_text` |  |-| `sch_trace_point` *proposed* | Everything electrically connected at a point on a sheet: the wires, labels, pins, junctions, sheet pins and no-connect markers there, and for each net they... |  | `kicad_sch_trace_point` |  |+| `sch_text` *proposed* | Add free text to a sheet (a note, a title, a design comment) with size, angle, justification, bold and italic. Text has no electrical meaning. One undo step. | `altium_sch_text` | `kicad_sch_text` |  |+| `sch_trace_point` *proposed* | Everything electrically connected at a point on a sheet: the wires, labels, pins, junctions, sheet pins and no-connect markers there, and for each net they... | `altium_sch_trace_point` | `kicad_sch_trace_point` |  | | `schematic_data` | Components on a schematic sheet (filePath, else the CURRENT sheet) with their pins (number, name, electrical type), position and orientation. designator... | `altium_schematic_data` | `kicad_sch_components` (partial) |  | | `set_layer_count` *proposed* | Set the board's copper layer count (2, 4, 6 or 8): the layer table and the stack-up, keeping the board thickness. |  | `kicad_set_layer_count` |  | | `set_models` | Replace every footprint model on a SchLib component with ONE PCBLIB model (set_params footprint and add_models APPEND, which is how a symbol ends up with two). | `altium_set_models` | `kicad_footprint_models` (partial) |  |
verbs/coverage.json+52−13
@@ -816,7 +816,10 @@    "name": "sch_bus",    "tier": "core",    "source": "proposed",-   "altium": null,+   "altium": {+    "verb": "altium_sch_bus",+    "match": "exact"+   },    "kicad": {     "verb": "kicad_sch_bus",     "match": "exact"@@ -827,7 +830,10 @@    "name": "sch_bus_entry",    "tier": "core",    "source": "proposed",-   "altium": null,+   "altium": {+    "verb": "altium_sch_bus_entry",+    "match": "exact"+   },    "kicad": {     "verb": "kicad_sch_bus_entry",     "match": "exact"@@ -852,7 +858,10 @@    "name": "sch_connect_pins",    "tier": "core",    "source": "proposed",-   "altium": null,+   "altium": {+    "verb": "altium_sch_connect_pins",+    "match": "exact"+   },    "kicad": {     "verb": "kicad_sch_connect_pins",     "match": "exact"@@ -863,7 +872,10 @@    "name": "sch_connect_to_bus",    "tier": "core",    "source": "proposed",-   "altium": null,+   "altium": {+    "verb": "altium_sch_connect_to_bus",+    "match": "exact"+   },    "kicad": {     "verb": "kicad_sch_connect_to_bus",     "match": "exact"@@ -888,7 +900,10 @@    "name": "sch_delete_wire",    "tier": "core",    "source": "proposed",-   "altium": null,+   "altium": {+    "verb": "altium_sch_delete_wire",+    "match": "exact"+   },    "kicad": {     "verb": "kicad_sch_delete_wire",     "match": "exact"@@ -913,7 +928,10 @@    "name": "sch_edit_label",    "tier": "core",    "source": "proposed",-   "altium": null,+   "altium": {+    "verb": "altium_sch_edit_label",+    "match": "exact"+   },    "kicad": {     "verb": "kicad_sch_edit_label",     "match": "exact"@@ -924,7 +942,10 @@    "name": "sch_fix_connectivity",    "tier": "core",    "source": "proposed",-   "altium": null,+   "altium": {+    "verb": "altium_sch_fix_connectivity",+    "match": "exact"+   },    "kicad": {     "verb": "kicad_sch_fix_connectivity",     "match": "exact"@@ -946,7 +967,10 @@    "name": "sch_items",    "tier": "core",    "source": "proposed",-   "altium": null,+   "altium": {+    "verb": "altium_sch_items",+    "match": "exact"+   },    "kicad": {     "verb": "kicad_sch_items",     "match": "exact"@@ -957,7 +981,10 @@    "name": "sch_junction",    "tier": "core",    "source": "proposed",-   "altium": null,+   "altium": {+    "verb": "altium_sch_junction",+    "match": "exact"+   },    "kicad": {     "verb": "kicad_sch_junction",     "match": "exact"@@ -968,7 +995,10 @@    "name": "sch_move_region",    "tier": "core",    "source": "proposed",-   "altium": null,+   "altium": {+    "verb": "altium_sch_move_region",+    "match": "exact"+   },    "kicad": {     "verb": "kicad_sch_move_region",     "match": "exact"@@ -1057,7 +1087,10 @@    "name": "sch_split_wire",    "tier": "core",    "source": "proposed",-   "altium": null,+   "altium": {+    "verb": "altium_sch_split_wire",+    "match": "exact"+   },    "kicad": {     "verb": "kicad_sch_split_wire",     "match": "exact"@@ -1082,7 +1115,10 @@    "name": "sch_text",    "tier": "core",    "source": "proposed",-   "altium": null,+   "altium": {+    "verb": "altium_sch_text",+    "match": "exact"+   },    "kicad": {     "verb": "kicad_sch_text",     "match": "exact"@@ -1093,7 +1129,10 @@    "name": "sch_trace_point",    "tier": "core",    "source": "proposed",-   "altium": null,+   "altium": {+    "verb": "altium_sch_trace_point",+    "match": "exact"+   },    "kicad": {     "verb": "kicad_sch_trace_point",     "match": "exact"